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video: hx8394: Add panel driver for hannstar,hsd060bhw4
The driver is for panels based on the Himax HX8394 controller, such as the HannStar HSD060BHW4 720x1440 TFT LCD panel that uses a MIPI-DSI interface. This panel is used in Pinephone Pro. Signed-off-by: Ondrej Jirman <megi@xff.cz> Cc: Anatolij Gustschin <agust@denx.de>
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3 changed files with 246 additions and 0 deletions
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@ -477,6 +477,14 @@ config VIDEO_LCD_ENDEAVORU
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using the same DSI command sequence. The panel has a 720x1280
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resolution and uses 24 bit RGB per pixel.
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config VIDEO_LCD_HIMAX_HX8394
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bool "Himax HX8394 DSI LCD panel support"
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depends on PANEL && BACKLIGHT
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select VIDEO_MIPI_DSI
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help
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Say Y here if you want to enable support for Himax HX8394
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dsi 4dl panel.
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config VIDEO_LCD_ORISETECH_OTM8009A
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bool "OTM8009A DSI LCD panel support"
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select VIDEO_MIPI_DSI
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@ -54,6 +54,7 @@ obj-$(CONFIG_VIDEO_IPUV3) += imx/
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obj-$(CONFIG_VIDEO_IVYBRIDGE_IGD) += ivybridge_igd.o
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obj-$(CONFIG_VIDEO_LCD_ANX9804) += anx9804.o
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obj-$(CONFIG_VIDEO_LCD_ENDEAVORU) += endeavoru-panel.o
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obj-$(CONFIG_VIDEO_LCD_HIMAX_HX8394) += himax-hx8394.o
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obj-$(CONFIG_VIDEO_LCD_HITACHI_TX18D42VM) += hitachi_tx18d42vm_lcd.o
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obj-$(CONFIG_VIDEO_LCD_ORISETECH_OTM8009A) += orisetech_otm8009a.o
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obj-$(CONFIG_VIDEO_LCD_RAYDIUM_RM68200) += raydium-rm68200.o
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237
drivers/video/himax-hx8394.c
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237
drivers/video/himax-hx8394.c
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@ -0,0 +1,237 @@
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// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (C) 2022 Ondrej Jirman <megi@xff.cz>
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*/
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#include <common.h>
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#include <backlight.h>
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#include <dm.h>
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#include <mipi_dsi.h>
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#include <panel.h>
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#include <asm/gpio.h>
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#include <dm/device_compat.h>
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#include <linux/delay.h>
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#include <power/regulator.h>
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struct hx8394_panel_priv {
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struct udevice *reg_vcc;
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struct udevice *reg_iovcc;
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struct gpio_desc reset;
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struct udevice *backlight;
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};
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static const struct display_timing default_timing = {
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.pixelclock.typ = 74250000,
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.hactive.typ = 720,
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.hfront_porch.typ = 40,
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.hback_porch.typ = 40,
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.hsync_len.typ = 46,
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.vactive.typ = 1440,
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.vfront_porch.typ = 7,
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.vback_porch.typ = 9,
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.vsync_len.typ = 7,
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.flags = DISPLAY_FLAGS_VSYNC_LOW | DISPLAY_FLAGS_HSYNC_LOW,
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};
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#define dsi_dcs_write_seq(device, seq...) do { \
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static const u8 d[] = { seq }; \
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int ret; \
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ret = mipi_dsi_dcs_write_buffer(device, d, ARRAY_SIZE(d)); \
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if (ret < 0) \
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return ret; \
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} while (0)
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static int hx8394_init_sequence(struct udevice *dev)
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{
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struct mipi_dsi_panel_plat *plat = dev_get_plat(dev);
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struct mipi_dsi_device *device = plat->device;
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int ret;
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dsi_dcs_write_seq(device, 0xb9, 0xff, 0x83, 0x94);
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dsi_dcs_write_seq(device, 0xb1, 0x48, 0x11, 0x71, 0x09, 0x32, 0x24,
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0x71, 0x31, 0x55, 0x30);
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dsi_dcs_write_seq(device, 0xba, 0x63, 0x03, 0x68, 0x6b, 0xb2, 0xc0);
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dsi_dcs_write_seq(device, 0xb2, 0x00, 0x80, 0x78, 0x0c, 0x07);
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dsi_dcs_write_seq(device, 0xb4, 0x12, 0x63, 0x12, 0x63, 0x12, 0x63,
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0x01, 0x0c, 0x7c, 0x55, 0x00, 0x3f, 0x12, 0x6b, 0x12,
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0x6b, 0x12, 0x6b, 0x01, 0x0c, 0x7c);
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dsi_dcs_write_seq(device, 0xd3, 0x00, 0x00, 0x00, 0x00, 0x3c, 0x1c,
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0x00, 0x00, 0x32, 0x10, 0x09, 0x00, 0x09, 0x32, 0x15,
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0xad, 0x05, 0xad, 0x32, 0x00, 0x00, 0x00, 0x00, 0x37,
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0x03, 0x0b, 0x0b, 0x37, 0x00, 0x00, 0x00, 0x0c, 0x40);
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dsi_dcs_write_seq(device, 0xd5, 0x19, 0x19, 0x18, 0x18, 0x1b, 0x1b,
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0x1a, 0x1a, 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06,
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0x07, 0x20, 0x21, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18,
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0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x24, 0x25, 0x18,
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0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18,
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0x18, 0x18);
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dsi_dcs_write_seq(device, 0xd6, 0x18, 0x18, 0x19, 0x19, 0x1b, 0x1b,
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0x1a, 0x1a, 0x07, 0x06, 0x05, 0x04, 0x03, 0x02, 0x01,
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0x00, 0x25, 0x24, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18,
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0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x21, 0x20, 0x18,
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0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18,
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0x18, 0x18);
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dsi_dcs_write_seq(device, 0xe0, 0x00, 0x04, 0x0c, 0x12, 0x14, 0x18,
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0x1a, 0x18, 0x31, 0x3f, 0x4d, 0x4c, 0x54, 0x65, 0x6b,
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0x70, 0x7f, 0x82, 0x7e, 0x8a, 0x99, 0x4a, 0x48, 0x49,
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0x4b, 0x4a, 0x4c, 0x4b, 0x7f, 0x00, 0x04, 0x0c, 0x11,
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0x13, 0x17, 0x1a, 0x18, 0x31, 0x3f, 0x4d, 0x4c, 0x54,
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0x65, 0x6b, 0x70, 0x7f, 0x82, 0x7e, 0x8a, 0x99, 0x4a,
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0x48, 0x49, 0x4b, 0x4a, 0x4c, 0x4b, 0x7f);
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dsi_dcs_write_seq(device, 0xcc, 0x0b);
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dsi_dcs_write_seq(device, 0xc0, 0x1f, 0x31);
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dsi_dcs_write_seq(device, 0xb6, 0x7d, 0x7d);
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dsi_dcs_write_seq(device, 0xd4, 0x02);
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dsi_dcs_write_seq(device, 0xbd, 0x01);
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dsi_dcs_write_seq(device, 0xb1, 0x00);
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dsi_dcs_write_seq(device, 0xbd, 0x00);
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dsi_dcs_write_seq(device, 0xc6, 0xed);
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ret = mipi_dsi_dcs_exit_sleep_mode(device);
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if (ret)
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return ret;
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/* Panel is operational 120 msec after reset */
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mdelay(120);
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ret = mipi_dsi_dcs_set_display_on(device);
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if (ret)
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return ret;
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return 0;
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}
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static int hx8394_panel_enable_backlight(struct udevice *dev)
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{
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struct mipi_dsi_panel_plat *plat = dev_get_plat(dev);
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struct mipi_dsi_device *device = plat->device;
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struct hx8394_panel_priv *priv = dev_get_priv(dev);
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int ret;
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ret = mipi_dsi_attach(device);
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if (ret < 0) {
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printf("mipi_dsi_attach failed %d\n", ret);
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return ret;
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}
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ret = hx8394_init_sequence(dev);
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if (ret) {
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printf("hx8394_init_sequence failed %d\n", ret);
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return ret;
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}
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if (priv->backlight) {
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ret = backlight_enable(priv->backlight);
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if (ret) {
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printf("backlight enabled failed %d\n", ret);
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return ret;
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}
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backlight_set_brightness(priv->backlight, 60);
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}
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mdelay(10);
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return 0;
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}
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static int hx8394_panel_get_display_timing(struct udevice *dev,
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struct display_timing *timings)
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{
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memcpy(timings, &default_timing, sizeof(*timings));
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return 0;
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}
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static int hx8394_panel_of_to_plat(struct udevice *dev)
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{
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struct hx8394_panel_priv *priv = dev_get_priv(dev);
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int ret;
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if (CONFIG_IS_ENABLED(DM_REGULATOR)) {
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ret = device_get_supply_regulator(dev, "vcc-supply",
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&priv->reg_vcc);
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if (ret && ret != -ENOENT) {
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dev_err(dev, "Warning: cannot get vcc supply\n");
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return ret;
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}
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ret = device_get_supply_regulator(dev, "iovcc-supply",
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&priv->reg_iovcc);
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if (ret && ret != -ENOENT) {
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dev_err(dev, "Warning: cannot get iovcc supply\n");
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return ret;
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}
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}
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ret = uclass_get_device_by_phandle(UCLASS_PANEL_BACKLIGHT, dev,
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"backlight", &priv->backlight);
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if (ret)
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dev_warn(dev, "failed to get backlight\n");
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ret = gpio_request_by_name(dev, "reset-gpios", 0, &priv->reset,
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GPIOD_IS_OUT);
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if (ret) {
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dev_err(dev, "warning: cannot get reset GPIO (%d)\n", ret);
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if (ret != -ENOENT)
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return ret;
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}
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return 0;
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}
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static int hx8394_panel_probe(struct udevice *dev)
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{
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struct hx8394_panel_priv *priv = dev_get_priv(dev);
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struct mipi_dsi_panel_plat *plat = dev_get_plat(dev);
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int ret;
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dm_gpio_set_value(&priv->reset, true);
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if (CONFIG_IS_ENABLED(DM_REGULATOR)) {
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dev_dbg(dev, "enable vcc '%s'\n", priv->reg_vcc->name);
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ret = regulator_set_enable(priv->reg_vcc, true);
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if (ret)
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return ret;
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dev_dbg(dev, "enable iovcc '%s'\n", priv->reg_iovcc->name);
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ret = regulator_set_enable(priv->reg_iovcc, true);
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if (ret) {
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regulator_set_enable(priv->reg_vcc, false);
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return ret;
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}
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}
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mdelay(5);
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dm_gpio_set_value(&priv->reset, false);
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mdelay(180);
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/* fill characteristics of DSI data link */
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plat->lanes = 4;
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plat->format = MIPI_DSI_FMT_RGB888;
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plat->mode_flags = MIPI_DSI_MODE_VIDEO |
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MIPI_DSI_MODE_VIDEO_BURST;
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return 0;
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}
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static const struct panel_ops hx8394_panel_ops = {
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.enable_backlight = hx8394_panel_enable_backlight,
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.get_display_timing = hx8394_panel_get_display_timing,
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};
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static const struct udevice_id hx8394_panel_ids[] = {
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{ .compatible = "hannstar,hsd060bhw4" },
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{ }
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};
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U_BOOT_DRIVER(hx8394_panel) = {
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.name = "hx8394_panel",
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.id = UCLASS_PANEL,
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.of_match = hx8394_panel_ids,
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.ops = &hx8394_panel_ops,
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.of_to_plat = hx8394_panel_of_to_plat,
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.probe = hx8394_panel_probe,
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.plat_auto = sizeof(struct mipi_dsi_panel_plat),
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.priv_auto = sizeof(struct hx8394_panel_priv),
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};
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