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video: rockchip: dw_mipi_dsi: Fix GRF access
Use proper register base and access method to access GRF registers. GRF registers start at a completely different base, and need special access method, that sets the change mask in the 16 MSBs. Signed-off-by: Ondrej Jirman <megi@xff.cz>
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parent
7c5f278a03
commit
bd6375c551
1 changed files with 10 additions and 6 deletions
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@ -18,6 +18,7 @@
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#include <panel.h>
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#include <phy-mipi-dphy.h>
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#include <reset.h>
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#include <syscon.h>
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#include <video_bridge.h>
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#include <dm/device_compat.h>
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#include <dm/lists.h>
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@ -30,6 +31,9 @@
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#include <dm/device-internal.h>
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#include <linux/bitops.h>
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#include <asm/arch-rockchip/clock.h>
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#include <asm/arch-rockchip/hardware.h>
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#define USEC_PER_SEC 1000000L
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/*
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@ -197,6 +201,7 @@ struct dw_rockchip_dsi_priv {
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struct mipi_dsi_device device;
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void __iomem *base;
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struct udevice *panel;
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void __iomem *grf;
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/* Optional external dphy */
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struct phy phy;
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@ -752,16 +757,13 @@ static int dw_mipi_dsi_rockchip_set_bl(struct udevice *dev, int percent)
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static void dw_mipi_dsi_rockchip_config(struct dw_rockchip_dsi_priv *dsi)
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{
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if (dsi->cdata->lanecfg1_grf_reg)
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dsi_write(dsi, dsi->cdata->lanecfg1_grf_reg,
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dsi->cdata->lanecfg1);
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rk_setreg(dsi->grf + dsi->cdata->lanecfg1_grf_reg, dsi->cdata->lanecfg1);
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if (dsi->cdata->lanecfg2_grf_reg)
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dsi_write(dsi, dsi->cdata->lanecfg2_grf_reg,
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dsi->cdata->lanecfg2);
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rk_setreg(dsi->grf + dsi->cdata->lanecfg2_grf_reg, dsi->cdata->lanecfg2);
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if (dsi->cdata->enable_grf_reg)
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dsi_write(dsi, dsi->cdata->enable_grf_reg,
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dsi->cdata->enable);
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rk_setreg(dsi->grf + dsi->cdata->enable_grf_reg, dsi->cdata->enable);
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}
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static int dw_mipi_dsi_rockchip_bind(struct udevice *dev)
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@ -794,6 +796,8 @@ static int dw_mipi_dsi_rockchip_probe(struct udevice *dev)
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return -EINVAL;
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}
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priv->grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
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i = 0;
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while (cdata[i].reg) {
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if (cdata[i].reg == (fdt_addr_t)priv->base) {
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