mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-09-23 08:01:59 +00:00
- fix video console default font selection
- add panel driver for HannStar HSD060BHW4
- fix backlight pwm integer overflow in duty
cycle calculation
- fix dw_mipi_dsi hsync/vsync settings
- various other fixes for rockchip dw_mipi_dsi
-----BEGIN PGP SIGNATURE-----
iGwEABECACwWIQSC4hxrSoIUVfFO0kRM6ATMmsalXAUCZLQ+Zw4cYWd1c3RAZGVu
eC5kZQAKCRBM6ATMmsalXIRqAJ96wTtFbAkYonbZ/VIKCm8jAub4NACcDyPMftHg
fyrlaPRwsrP87AssDio=
=t8mW
-----END PGP SIGNATURE-----
Merge tag 'video-20230714' of https://source.denx.de/u-boot/custodians/u-boot-video
- fix video console default font selection
- add panel driver for HannStar HSD060BHW4
- fix backlight pwm integer overflow in duty
cycle calculation
- fix dw_mipi_dsi hsync/vsync settings
- various other fixes for rockchip dw_mipi_dsi
This commit is contained in:
Tom Rini
commit
aa817dfcaf
8 changed files with 278 additions and 20 deletions
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@ -477,6 +477,14 @@ config VIDEO_LCD_ENDEAVORU
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using the same DSI command sequence. The panel has a 720x1280
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resolution and uses 24 bit RGB per pixel.
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config VIDEO_LCD_HIMAX_HX8394
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bool "Himax HX8394 DSI LCD panel support"
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depends on PANEL && BACKLIGHT
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select VIDEO_MIPI_DSI
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help
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Say Y here if you want to enable support for Himax HX8394
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dsi 4dl panel.
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config VIDEO_LCD_ORISETECH_OTM8009A
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bool "OTM8009A DSI LCD panel support"
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select VIDEO_MIPI_DSI
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@ -54,6 +54,7 @@ obj-$(CONFIG_VIDEO_IPUV3) += imx/
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obj-$(CONFIG_VIDEO_IVYBRIDGE_IGD) += ivybridge_igd.o
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obj-$(CONFIG_VIDEO_LCD_ANX9804) += anx9804.o
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obj-$(CONFIG_VIDEO_LCD_ENDEAVORU) += endeavoru-panel.o
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obj-$(CONFIG_VIDEO_LCD_HIMAX_HX8394) += himax-hx8394.o
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obj-$(CONFIG_VIDEO_LCD_HITACHI_TX18D42VM) += hitachi_tx18d42vm_lcd.o
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obj-$(CONFIG_VIDEO_LCD_ORISETECH_OTM8009A) += orisetech_otm8009a.o
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obj-$(CONFIG_VIDEO_LCD_RAYDIUM_RM68200) += raydium-rm68200.o
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@ -201,6 +201,12 @@ int console_simple_select_font(struct udevice *dev, const char *name, uint size)
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{
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struct video_fontdata *font;
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if (!name) {
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if (fonts->name)
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console_set_font(dev, fonts);
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return 0;
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}
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for (font = fonts; font->name; font++) {
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if (!strcmp(name, font->name)) {
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console_set_font(dev, font);
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@ -538,9 +538,9 @@ static void dw_mipi_dsi_dpi_config(struct dw_mipi_dsi *dsi,
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break;
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}
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if (device->mode_flags & DISPLAY_FLAGS_VSYNC_HIGH)
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if (timings->flags & DISPLAY_FLAGS_VSYNC_LOW)
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val |= VSYNC_ACTIVE_LOW;
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if (device->mode_flags & DISPLAY_FLAGS_HSYNC_HIGH)
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if (timings->flags & DISPLAY_FLAGS_HSYNC_LOW)
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val |= HSYNC_ACTIVE_LOW;
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dsi_write(dsi, DSI_DPI_VCID, DPI_VCID(dsi->channel));
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237
drivers/video/himax-hx8394.c
Normal file
237
drivers/video/himax-hx8394.c
Normal file
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@ -0,0 +1,237 @@
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// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (C) 2022 Ondrej Jirman <megi@xff.cz>
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*/
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#include <common.h>
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#include <backlight.h>
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#include <dm.h>
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#include <mipi_dsi.h>
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#include <panel.h>
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#include <asm/gpio.h>
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#include <dm/device_compat.h>
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#include <linux/delay.h>
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#include <power/regulator.h>
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struct hx8394_panel_priv {
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struct udevice *reg_vcc;
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struct udevice *reg_iovcc;
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struct gpio_desc reset;
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struct udevice *backlight;
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};
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static const struct display_timing default_timing = {
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.pixelclock.typ = 74250000,
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.hactive.typ = 720,
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.hfront_porch.typ = 40,
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.hback_porch.typ = 40,
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.hsync_len.typ = 46,
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.vactive.typ = 1440,
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.vfront_porch.typ = 7,
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.vback_porch.typ = 9,
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.vsync_len.typ = 7,
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.flags = DISPLAY_FLAGS_VSYNC_LOW | DISPLAY_FLAGS_HSYNC_LOW,
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};
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#define dsi_dcs_write_seq(device, seq...) do { \
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static const u8 d[] = { seq }; \
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int ret; \
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ret = mipi_dsi_dcs_write_buffer(device, d, ARRAY_SIZE(d)); \
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if (ret < 0) \
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return ret; \
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} while (0)
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static int hx8394_init_sequence(struct udevice *dev)
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{
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struct mipi_dsi_panel_plat *plat = dev_get_plat(dev);
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struct mipi_dsi_device *device = plat->device;
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int ret;
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dsi_dcs_write_seq(device, 0xb9, 0xff, 0x83, 0x94);
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dsi_dcs_write_seq(device, 0xb1, 0x48, 0x11, 0x71, 0x09, 0x32, 0x24,
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0x71, 0x31, 0x55, 0x30);
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dsi_dcs_write_seq(device, 0xba, 0x63, 0x03, 0x68, 0x6b, 0xb2, 0xc0);
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dsi_dcs_write_seq(device, 0xb2, 0x00, 0x80, 0x78, 0x0c, 0x07);
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dsi_dcs_write_seq(device, 0xb4, 0x12, 0x63, 0x12, 0x63, 0x12, 0x63,
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0x01, 0x0c, 0x7c, 0x55, 0x00, 0x3f, 0x12, 0x6b, 0x12,
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0x6b, 0x12, 0x6b, 0x01, 0x0c, 0x7c);
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dsi_dcs_write_seq(device, 0xd3, 0x00, 0x00, 0x00, 0x00, 0x3c, 0x1c,
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0x00, 0x00, 0x32, 0x10, 0x09, 0x00, 0x09, 0x32, 0x15,
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0xad, 0x05, 0xad, 0x32, 0x00, 0x00, 0x00, 0x00, 0x37,
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0x03, 0x0b, 0x0b, 0x37, 0x00, 0x00, 0x00, 0x0c, 0x40);
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dsi_dcs_write_seq(device, 0xd5, 0x19, 0x19, 0x18, 0x18, 0x1b, 0x1b,
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0x1a, 0x1a, 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06,
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0x07, 0x20, 0x21, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18,
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0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x24, 0x25, 0x18,
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0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18,
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0x18, 0x18);
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dsi_dcs_write_seq(device, 0xd6, 0x18, 0x18, 0x19, 0x19, 0x1b, 0x1b,
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0x1a, 0x1a, 0x07, 0x06, 0x05, 0x04, 0x03, 0x02, 0x01,
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0x00, 0x25, 0x24, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18,
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0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x21, 0x20, 0x18,
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0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18,
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0x18, 0x18);
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dsi_dcs_write_seq(device, 0xe0, 0x00, 0x04, 0x0c, 0x12, 0x14, 0x18,
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0x1a, 0x18, 0x31, 0x3f, 0x4d, 0x4c, 0x54, 0x65, 0x6b,
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0x70, 0x7f, 0x82, 0x7e, 0x8a, 0x99, 0x4a, 0x48, 0x49,
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0x4b, 0x4a, 0x4c, 0x4b, 0x7f, 0x00, 0x04, 0x0c, 0x11,
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0x13, 0x17, 0x1a, 0x18, 0x31, 0x3f, 0x4d, 0x4c, 0x54,
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0x65, 0x6b, 0x70, 0x7f, 0x82, 0x7e, 0x8a, 0x99, 0x4a,
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0x48, 0x49, 0x4b, 0x4a, 0x4c, 0x4b, 0x7f);
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dsi_dcs_write_seq(device, 0xcc, 0x0b);
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dsi_dcs_write_seq(device, 0xc0, 0x1f, 0x31);
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dsi_dcs_write_seq(device, 0xb6, 0x7d, 0x7d);
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dsi_dcs_write_seq(device, 0xd4, 0x02);
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dsi_dcs_write_seq(device, 0xbd, 0x01);
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dsi_dcs_write_seq(device, 0xb1, 0x00);
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dsi_dcs_write_seq(device, 0xbd, 0x00);
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dsi_dcs_write_seq(device, 0xc6, 0xed);
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ret = mipi_dsi_dcs_exit_sleep_mode(device);
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if (ret)
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return ret;
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/* Panel is operational 120 msec after reset */
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mdelay(120);
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ret = mipi_dsi_dcs_set_display_on(device);
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if (ret)
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return ret;
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return 0;
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}
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static int hx8394_panel_enable_backlight(struct udevice *dev)
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{
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struct mipi_dsi_panel_plat *plat = dev_get_plat(dev);
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struct mipi_dsi_device *device = plat->device;
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struct hx8394_panel_priv *priv = dev_get_priv(dev);
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int ret;
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ret = mipi_dsi_attach(device);
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if (ret < 0) {
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printf("mipi_dsi_attach failed %d\n", ret);
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return ret;
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}
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ret = hx8394_init_sequence(dev);
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if (ret) {
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printf("hx8394_init_sequence failed %d\n", ret);
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return ret;
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}
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if (priv->backlight) {
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ret = backlight_enable(priv->backlight);
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if (ret) {
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printf("backlight enabled failed %d\n", ret);
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return ret;
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}
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backlight_set_brightness(priv->backlight, 60);
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}
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mdelay(10);
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return 0;
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}
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static int hx8394_panel_get_display_timing(struct udevice *dev,
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struct display_timing *timings)
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{
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memcpy(timings, &default_timing, sizeof(*timings));
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return 0;
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}
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static int hx8394_panel_of_to_plat(struct udevice *dev)
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{
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struct hx8394_panel_priv *priv = dev_get_priv(dev);
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int ret;
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if (CONFIG_IS_ENABLED(DM_REGULATOR)) {
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ret = device_get_supply_regulator(dev, "vcc-supply",
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&priv->reg_vcc);
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if (ret && ret != -ENOENT) {
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dev_err(dev, "Warning: cannot get vcc supply\n");
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return ret;
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}
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ret = device_get_supply_regulator(dev, "iovcc-supply",
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&priv->reg_iovcc);
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if (ret && ret != -ENOENT) {
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dev_err(dev, "Warning: cannot get iovcc supply\n");
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return ret;
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}
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}
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ret = uclass_get_device_by_phandle(UCLASS_PANEL_BACKLIGHT, dev,
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"backlight", &priv->backlight);
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if (ret)
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dev_warn(dev, "failed to get backlight\n");
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ret = gpio_request_by_name(dev, "reset-gpios", 0, &priv->reset,
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GPIOD_IS_OUT);
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if (ret) {
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dev_err(dev, "warning: cannot get reset GPIO (%d)\n", ret);
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if (ret != -ENOENT)
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return ret;
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}
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return 0;
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}
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static int hx8394_panel_probe(struct udevice *dev)
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{
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struct hx8394_panel_priv *priv = dev_get_priv(dev);
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struct mipi_dsi_panel_plat *plat = dev_get_plat(dev);
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int ret;
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dm_gpio_set_value(&priv->reset, true);
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if (CONFIG_IS_ENABLED(DM_REGULATOR)) {
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dev_dbg(dev, "enable vcc '%s'\n", priv->reg_vcc->name);
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ret = regulator_set_enable(priv->reg_vcc, true);
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if (ret)
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return ret;
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dev_dbg(dev, "enable iovcc '%s'\n", priv->reg_iovcc->name);
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ret = regulator_set_enable(priv->reg_iovcc, true);
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if (ret) {
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regulator_set_enable(priv->reg_vcc, false);
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return ret;
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}
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}
|
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mdelay(5);
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dm_gpio_set_value(&priv->reset, false);
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mdelay(180);
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/* fill characteristics of DSI data link */
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plat->lanes = 4;
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plat->format = MIPI_DSI_FMT_RGB888;
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plat->mode_flags = MIPI_DSI_MODE_VIDEO |
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MIPI_DSI_MODE_VIDEO_BURST;
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return 0;
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}
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|
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static const struct panel_ops hx8394_panel_ops = {
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.enable_backlight = hx8394_panel_enable_backlight,
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.get_display_timing = hx8394_panel_get_display_timing,
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};
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static const struct udevice_id hx8394_panel_ids[] = {
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{ .compatible = "hannstar,hsd060bhw4" },
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{ }
|
||||
};
|
||||
|
||||
U_BOOT_DRIVER(hx8394_panel) = {
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.name = "hx8394_panel",
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.id = UCLASS_PANEL,
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.of_match = hx8394_panel_ids,
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.ops = &hx8394_panel_ops,
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.of_to_plat = hx8394_panel_of_to_plat,
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.probe = hx8394_panel_probe,
|
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.plat_auto = sizeof(struct mipi_dsi_panel_plat),
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.priv_auto = sizeof(struct hx8394_panel_priv),
|
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};
|
||||
|
|
@ -63,7 +63,7 @@ static int set_pwm(struct pwm_backlight_priv *priv)
|
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int ret;
|
||||
|
||||
if (priv->period_ns) {
|
||||
duty_cycle = priv->period_ns * (priv->cur_level - priv->min_level) /
|
||||
duty_cycle = (u64)priv->period_ns * (priv->cur_level - priv->min_level) /
|
||||
(priv->max_level - priv->min_level);
|
||||
ret = pwm_set_config(priv->pwm, priv->channel, priv->period_ns,
|
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duty_cycle);
|
||||
|
|
|
|||
|
|
@ -18,6 +18,7 @@
|
|||
#include <panel.h>
|
||||
#include <phy-mipi-dphy.h>
|
||||
#include <reset.h>
|
||||
#include <syscon.h>
|
||||
#include <video_bridge.h>
|
||||
#include <dm/device_compat.h>
|
||||
#include <dm/lists.h>
|
||||
|
|
@ -30,6 +31,9 @@
|
|||
#include <dm/device-internal.h>
|
||||
#include <linux/bitops.h>
|
||||
|
||||
#include <asm/arch-rockchip/clock.h>
|
||||
#include <asm/arch-rockchip/hardware.h>
|
||||
|
||||
#define USEC_PER_SEC 1000000L
|
||||
|
||||
/*
|
||||
|
|
@ -197,6 +201,7 @@ struct dw_rockchip_dsi_priv {
|
|||
struct mipi_dsi_device device;
|
||||
void __iomem *base;
|
||||
struct udevice *panel;
|
||||
void __iomem *grf;
|
||||
|
||||
/* Optional external dphy */
|
||||
struct phy phy;
|
||||
|
|
@ -344,7 +349,7 @@ static int dsi_phy_init(void *priv_data)
|
|||
struct dw_rockchip_dsi_priv *dsi = dev_get_priv(dev);
|
||||
int ret, i, vco;
|
||||
|
||||
if (&dsi->phy) {
|
||||
if (dsi->phy.dev) {
|
||||
ret = generic_phy_configure(&dsi->phy, &dsi->phy_opts);
|
||||
if (ret) {
|
||||
dev_err(dsi->dsi_host,
|
||||
|
|
@ -460,7 +465,7 @@ static int dsi_phy_init(void *priv_data)
|
|||
dw_mipi_dsi_phy_write(dsi, HS_TX_DATA_LANE_EXIT_STATE_TIME_CONTROL,
|
||||
BIT(5) | ns2bc(dsi, 100));
|
||||
|
||||
return ret;
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void dsi_phy_post_set_mode(void *priv_data, unsigned long mode_flags)
|
||||
|
|
@ -505,7 +510,6 @@ dw_mipi_dsi_get_lane_mbps(void *priv_data, struct display_timing *timings,
|
|||
unsigned int _prediv, best_prediv;
|
||||
unsigned long _fbdiv, best_fbdiv;
|
||||
unsigned long min_delta = ULONG_MAX;
|
||||
unsigned int pllref_clk;
|
||||
|
||||
bpp = mipi_dsi_pixel_format_to_bpp(format);
|
||||
if (bpp < 0) {
|
||||
|
|
@ -527,7 +531,7 @@ dw_mipi_dsi_get_lane_mbps(void *priv_data, struct display_timing *timings,
|
|||
}
|
||||
|
||||
/* for external phy only the mipi_dphy_config is necessary */
|
||||
if (&dsi->phy) {
|
||||
if (dsi->phy.dev) {
|
||||
phy_mipi_dphy_get_default_config(timings->pixelclock.typ * 10 / 8,
|
||||
bpp, lanes,
|
||||
&dsi->phy_opts);
|
||||
|
|
@ -537,7 +541,7 @@ dw_mipi_dsi_get_lane_mbps(void *priv_data, struct display_timing *timings,
|
|||
return 0;
|
||||
}
|
||||
|
||||
pllref_clk = clk_get_rate(dsi->ref);
|
||||
fin = clk_get_rate(dsi->ref);
|
||||
fout = target_mbps * USEC_PER_SEC;
|
||||
|
||||
/* constraint: 5Mhz <= Fref / N <= 40MHz */
|
||||
|
|
@ -753,16 +757,13 @@ static int dw_mipi_dsi_rockchip_set_bl(struct udevice *dev, int percent)
|
|||
static void dw_mipi_dsi_rockchip_config(struct dw_rockchip_dsi_priv *dsi)
|
||||
{
|
||||
if (dsi->cdata->lanecfg1_grf_reg)
|
||||
dsi_write(dsi, dsi->cdata->lanecfg1_grf_reg,
|
||||
dsi->cdata->lanecfg1);
|
||||
rk_setreg(dsi->grf + dsi->cdata->lanecfg1_grf_reg, dsi->cdata->lanecfg1);
|
||||
|
||||
if (dsi->cdata->lanecfg2_grf_reg)
|
||||
dsi_write(dsi, dsi->cdata->lanecfg2_grf_reg,
|
||||
dsi->cdata->lanecfg2);
|
||||
rk_setreg(dsi->grf + dsi->cdata->lanecfg2_grf_reg, dsi->cdata->lanecfg2);
|
||||
|
||||
if (dsi->cdata->enable_grf_reg)
|
||||
dsi_write(dsi, dsi->cdata->enable_grf_reg,
|
||||
dsi->cdata->enable);
|
||||
rk_setreg(dsi->grf + dsi->cdata->enable_grf_reg, dsi->cdata->enable);
|
||||
}
|
||||
|
||||
static int dw_mipi_dsi_rockchip_bind(struct udevice *dev)
|
||||
|
|
@ -795,6 +796,8 @@ static int dw_mipi_dsi_rockchip_probe(struct udevice *dev)
|
|||
return -EINVAL;
|
||||
}
|
||||
|
||||
priv->grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
|
||||
|
||||
i = 0;
|
||||
while (cdata[i].reg) {
|
||||
if (cdata[i].reg == (fdt_addr_t)priv->base) {
|
||||
|
|
@ -815,25 +818,27 @@ static int dw_mipi_dsi_rockchip_probe(struct udevice *dev)
|
|||
* NULL if it's not initialized.
|
||||
*/
|
||||
ret = generic_phy_get_by_name(dev, "dphy", &priv->phy);
|
||||
if ((ret) && (ret != -ENODEV)) {
|
||||
if (ret && ret != -ENODATA) {
|
||||
dev_err(dev, "failed to get mipi dphy: %d\n", ret);
|
||||
return -EINVAL;
|
||||
return ret;
|
||||
}
|
||||
|
||||
priv->pclk = devm_clk_get(dev, "pclk");
|
||||
if (IS_ERR(priv->pclk)) {
|
||||
ret = PTR_ERR(priv->pclk);
|
||||
dev_err(dev, "peripheral clock get error %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
/* Get a ref clock only if not using an external phy. */
|
||||
if (&priv->phy) {
|
||||
if (priv->phy.dev) {
|
||||
dev_dbg(dev, "setting priv->ref to NULL\n");
|
||||
priv->ref = NULL;
|
||||
|
||||
} else {
|
||||
priv->ref = devm_clk_get(dev, "ref");
|
||||
if (ret) {
|
||||
if (IS_ERR(priv->ref)) {
|
||||
ret = PTR_ERR(priv->ref);
|
||||
dev_err(dev, "pll reference clock get error %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
|
|
@ -841,7 +846,8 @@ static int dw_mipi_dsi_rockchip_probe(struct udevice *dev)
|
|||
|
||||
priv->rst = devm_reset_control_get_by_index(device->dev, 0);
|
||||
if (IS_ERR(priv->rst)) {
|
||||
dev_err(dev, "missing dsi hardware reset\n");
|
||||
ret = PTR_ERR(priv->rst);
|
||||
dev_err(dev, "missing dsi hardware reset %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -432,7 +432,7 @@ int rk_vop_probe(struct udevice *dev)
|
|||
ret = reset_assert(&ahb_rst);
|
||||
if (ret) {
|
||||
dev_err(dev, "failed to assert ahb reset (ret=%d)\n", ret);
|
||||
return ret;
|
||||
return ret;
|
||||
}
|
||||
udelay(20);
|
||||
|
||||
|
|
|
|||
Loading…
Reference in a new issue