Commit graph

13 commits

Author SHA1 Message Date
Taras Kondratiuk
40aadf9201 ARM: OMAP4470: Add voltage and dpll data
OMAP4470 reference design uses TWL6032 PMIC
with a following connection scheme:
  VDD_CORE = TWL6032 SMPS2
  VDD_MPU  = TWL6032 SMPS1
  VDD_IVA  = TWL6032 SMPS5

Set voltage and frequency values according to
OMAP4470 Data Manual Operating Condition Addendum v0.7

Signed-off-by: Taras Kondratiuk <taras@ti.com>
2013-08-28 11:44:58 -04:00
Wolfgang Denk
1a4596601f Add GPL-2.0+ SPDX-License-Identifier to source files
Signed-off-by: Wolfgang Denk <wd@denx.de>
[trini: Fixup common/cmd_io.c]
Signed-off-by: Tom Rini <trini@ti.com>
2013-07-24 09:44:38 -04:00
Lokesh Vutla
4ca94d8186 ARM: OMAP4+: pmic: Make generic bus init and write functions
Voltage scaling can be done in two ways:
-> Using SR I2C
-> Using GP I2C
In order to support both, have a function pointer in pmic_data
so that we can call as per our requirement.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2013-06-10 08:43:09 -04:00
Lokesh Vutla
af1d002f89 ARM: OMAP2+: Rename asm/arch/clocks.h asm/arch/clock.h
To be consistent with other ARM platforms,
renaming asm/arch-omap*/clocks.h to asm/arch-omap*/clock.h

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2013-06-10 08:43:09 -04:00
SRICHARAN R
f92f2277a6 ARM: OMAP4/5: Make OMAPx_SRAM_SCRATCH_ defines common
These defines are same across OMAP4/5. So move them to
omap_common.h. This is required for the patches that
follow.

Signed-off-by: Sricharan R <r.sricharan@ti.com>
2013-05-10 08:25:56 -04:00
Lubomir Popov
a1c8fb9132 OMAP4: Fix bug in omap4460_volts struct
The omap4460_volts struct was incorrectly referencing tps62361
instead of twl6030 as PMIC for the core and mm voltages (the
tps is used for mpu supply only). This shall lead to bad OPP
settings while booting kernel. Fixing it.

Fix some comments as well.

Signed-off-by: Lubomir Popov <lpopov@mm-sol.com>
2013-04-10 13:05:32 -04:00
Lokesh Vutla
ea8eff1fe0 arm: dra7xx: clock: Add the dplls data
A new DPLL DDR is added in DRA7XX socs. Now clocks to
EMIF CD is from DPLL DDR. So DPLL DDR should be locked
before initializing RAM.
Also adding other dpll data which are different from OMAP5 ES2.0.
SYS_CLK running at 20MHz is introduced in DRA7xx socs.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: R Sricharan <r.sricharan@ti.com>
Reviewed-by: Tom Rini <trini@ti.com>
2013-03-11 11:06:11 -04:00
Lokesh Vutla
d4e4129c31 arm: dra7xx: clock: Add the prcm changes
PRCM register addresses are changed from OMAP5 ES2.0 to DRA7XX.
So adding the necessary register changes for DRA7XX socs.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: R Sricharan <r.sricharan@ti.com>
2013-03-11 11:06:11 -04:00
SRICHARAN R
47abc3df70 ARM: OMAP4/5: clocks: Add the required OPP settings as per the latest addendum
Change OPP settings as per the latest 0.5 version of
addendum for OMAP5430 ES2.0. omap4/hw_data.c is touched
here to add dummy dividers.

While here correcting OPP_NOM mpu, core frequency for
OMAP4430 ES2.x

Note that OMAP5430 ES1.0 support is still kept alive and
would be removed in a cleanup later.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: R Sricharan <r.sricharan@ti.com>
Cc: Tom Rini <trini@ti.com>
Cc: Nishanth Menon <nm@ti.com>
2013-03-11 11:06:10 -04:00
Lokesh Vutla
c43c8339fe ARM: OMAP4+: Make control module register structure generic
A seperate omap_sys_ctrl_regs structure is defined for
omap4 & 5. If there is any change in control module for
any of the ES versions, a new structure needs to be created.
In order to remove this dependency, making the register
structure generic for all the omap4+ boards.

Signed-off-by: R Sricharan <r.sricharan@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@ti.com>
2013-03-11 11:06:10 -04:00
SRICHARAN R
3fcdd4a5f8 ARM: OMAP4+: Clean up the pmic code
The pmic code is duplicated for OMAP 4 and 5.
Instead move the data to Soc specific place and
share the code.

Signed-off-by: R Sricharan <r.sricharan@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@ti.com>
2013-03-11 11:06:10 -04:00
SRICHARAN R
ee9447bfe3 ARM: OMAP4+: Cleanup the clocks layer
Currently there is quite a lot of code which
is duplicated in the clocks code for OMAP 4 and 5
Socs. Avoiding this here by moving the clocks
data to a SOC specific place and the sharing the
common code.

This helps in addition of a new Soc with minimal
changes.

Signed-off-by: R Sricharan <r.sricharan@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@ti.com>
2013-03-11 11:06:09 -04:00
SRICHARAN R
01b753ff7b ARM: OMAP4+: Change the PRCM structure prototype common for all Socs
The current PRCM structure prototype directly matches the hardware
register layout. So there is a need to change this for every new silicon
revision which has register space changes.

Avoiding this by making the prototye generic and populating the register
addresses seperately for all Socs.

Signed-off-by: R Sricharan <r.sricharan@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2013-03-11 11:06:09 -04:00