Commit graph

563 commits

Author SHA1 Message Date
Pratyush Yadav
6b808e0864 mtd: spi-nor-core: Enable octal DTR mode when possible
Allow flashes to specify a hook to enable octal DTR mode. Use this hook
whenever possible to get optimal transfer speeds.

Signed-off-by: Pratyush Yadav <p.yadav@ti.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2021-06-28 12:03:57 +05:30
Pratyush Yadav
b862765c7c mtd: spi-nor-core: Prepare Read SR and FSR for Octal DTR mode
The xSPI Profile 1.0 table specifies how many dummy cycles and address
bytes are needed for the Read Status Register command in Octal DTR mode.
Use that information to send the correct Read SR command.

Some controllers might have trouble reading just 1 byte in DTR mode. So,
when we are in DTR mode read 2 bytes and discard the second. This shows
no side effects with the two flashes I tested: Micron mt35xu512aba and
Cypress s28hs512t.

Update Read FSR to mimic Read SR because they share the same
characteristics.

Signed-off-by: Pratyush Yadav <p.yadav@ti.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2021-06-28 12:02:39 +05:30
Pratyush Yadav
4d40e82663 mtd: spi-nor-core: Parse xSPI Profile 1.0 table
This table is indication that the flash is xSPI compliant and hence
supports octal DTR mode. Extract information like the fast read opcode,
the number of dummy cycles needed for a Read Status Register command,
and the number of address bytes needed for a Read Status Register
command.

The default dummy cycles for a fast octal DTR read are set to 20. Since
there is no simple way of determining the dummy cycles needed for the
fast read command, flashes that use a different value should update it
in their flash-specific hooks.

Signed-off-by: Pratyush Yadav <p.yadav@ti.com>
Acked-by: Jagan Teki <jagan@amarulasolutions.com>
2021-06-28 12:02:01 +05:30
Pratyush Yadav
9ec5ea0127 mtd: spi-nor-core: Get command opcode extension type from BFPT
Some devices in DTR mode expect an extra command byte called the
extension. The extension can either be same as the opcode, bitwise
inverse of the opcode, or another additional byte forming a 16-byte
opcode. Get the extension type from the BFPT. For now, only flashes with
"repeat" and "inverse" extensions are supported.

Signed-off-by: Pratyush Yadav <p.yadav@ti.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2021-06-28 12:01:15 +05:30
Pratyush Yadav
22ae535b7d mtd: spi-nor-core: prepare BFPT parsing for JESD216 rev D
JESD216 rev D makes BFPT 20 DWORDs. Update the BFPT size define to
reflect that.

The check for rev A or later compared the BFPT header length with the
maximum BFPT length, BFPT_DWORD_MAX. Since BFPT_DWORD_MAX was 16, and so
was the BFPT length for both rev A and B, this check worked fine. But
now, since BFPT_DWORD_MAX is 20, it means this check will also stop BFPT
parsing for rev A or B, since their length is 16.

So, instead check for BFPT_DWORD_MAX_JESD216 to stop BFPT parsing for
the first JESD216 version, and check for BFPT_DWORD_MAX_JESD216B for the
next two versions.

Signed-off-by: Pratyush Yadav <p.yadav@ti.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2021-06-28 12:01:00 +05:30
Pratyush Yadav
95954f55e9 mtd: spi-nor-core: Add support for DTR protocol
Double Transfer Rate (DTR) is SPI protocol in which data is transferred
on each clock edge as opposed to on each clock cycle. Make
framework-level changes to allow supporting flashes in DTR mode.

Right now, mixed DTR modes are not supported. So, for example a mode
like 4S-4D-4D will not work. All phases need to be either DTR or STR.

Signed-off-by: Pratyush Yadav <p.yadav@ti.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2021-06-28 12:00:32 +05:30
Pratyush Yadav
6182d15b3e mtd: spi-nor-core: Do not set data direction when there is no data
Even when spi_nor_write_reg() has no data to write, like when executing
a write enable operation, it sets the data direction to
SPI_MEM_DATA_OUT. This trips up spi_mem_check_buswidth() because it
expects a data phase when there is none. Make sure the data direction is
set to SPI_MEM_NO_DATA when there is no data to write.

Signed-off-by: Pratyush Yadav <p.yadav@ti.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2021-06-28 11:59:47 +05:30
Pratyush Yadav
71025f013c mtd: spi-nor-core: Rework hwcaps selection
The spi-mem layer provides a spi_mem_supports_op() function to check
whether a specific operation is supported by the controller or not.
This is much more accurate than the hwcaps selection logic based on
SPI_{RX,TX}_ flags.

Rework the hwcaps selection logic to use spi_mem_supports_op().

To make sure the build doesn't break for boards not using CONFIG_DM_SPI,
add a simple SPI_{RX,TX}_ based hwcaps selection logic in spi-mem-nodm
similar to spi_mem_default_supports_op(). This change is only
compile-tested.

To avoid SPL size problems on the x530 board, the old hwcaps selection
is still kept around. Leaving the code in-place was getting difficult to
read and understand, so the code is restructured to have it all in one
isolated function. As a result of this, the parameter hwcaps to
spi_nor_setup() is no longer needed. Remove it.

Based on the Linux commit c76f5089796a (mtd: spi-nor: Rework hwcaps
selection for the spi-mem case, 2019-08-06)

Signed-off-by: Pratyush Yadav <p.yadav@ti.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2021-06-28 11:59:35 +05:30
Pratyush Yadav
8702188ce5 mtd: spi-nor-core: Introduce flash-specific fixup hooks
Sometimes the information in a flash's SFDP tables is wrong. Sometimes
some information just can't be expressed in the SFDP table. So,
introduce the fixup hooks to allow tailoring settings for a specific
flash.

Three hooks are added: default_init, post_sfdp, and post_bfpt. These
allow tweaking the flash settings at different point in the probe
sequence. Since the hooks reside in nor->info, set that value just
before the call to spi_nor_init_params().

The hooks and at what points they are executed mimics Linux's spi-nor
framework. One major difference is that Linux puts the struct
spi_nor_fixups in nor->info. This is not possible in U-Boot because the
spi-nor-ids list is shared between spi-nor-core.c and spi-nor-tiny.c.
Since spi-nor-tiny shouldn't have those fixup hooks populated, add a
separate function that lets flashes populate their fixup hooks.

Signed-off-by: Pratyush Yadav <p.yadav@ti.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2021-06-28 11:59:10 +05:30
Pratyush Yadav
e2e31fa680 mtd: spi-nor-core: Move SFDP related declarations to top
These structures will be used in a later commit inside another structure
definition. Also take the declarations out of the ifdef since they won't
affect the final binary anyway and will be used in a later commit.

Signed-off-by: Pratyush Yadav <p.yadav@ti.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2021-06-28 11:58:46 +05:30
Pratyush Yadav
18b0de0f3b mtd: spi-nor-core: Add a ->setup() hook
nor->setup() can be used by flashes to configure settings in case they
have any peculiarities that can't be easily expressed by the generic
spi-nor framework. This includes things like different opcodes, dummy
cycles, page size, uniform/non-uniform sector sizes, etc.

Move related declarations to avoid forward declarations.

Inspired by the Linux kernel's setup() hook.

Signed-off-by: Pratyush Yadav <p.yadav@ti.com>
Acked-by: Jagan Teki <jagan@amarulasolutions.com>
2021-06-28 11:58:10 +05:30
Pratyush Yadav
1af0334ab4 mtd: spi-nor-core: Fix address width on flash chips > 16MB
If a flash chip has more than 16MB capacity but its BFPT reports
BFPT_DWORD1_ADDRESS_BYTES_3_OR_4, the spi-nor framework defaults to 3.

The check in spi_nor_scan() doesn't catch it because addr_width did get
set. This fixes that check.

Ported from Kernel commit 324f78dfb442b82365548b657ec4e6974c677502.

Signed-off-by: Pratyush Yadav <p.yadav@ti.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2021-06-28 11:57:46 +05:30
Marek Behún
2d1a9a6b26 mtd: spi-nor: fill-in mtd->dev member
Fill in mtd->dev member with nor->dev.

This can be used by MTD OF partition parser.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com>
Tested-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Cc: Priyanka Jain <priyanka.jain@nxp.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Heiko Schocher <hs@denx.de>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
2021-06-24 11:53:50 +05:30
Marek Behún
b7f060565e mtd: spi-nor: allow registering multiple MTDs when DM is enabled
Currently when the SPI_FLASH_MTD config option is enabled, only one SPI
can be registered as MTD at any time - it is the last one probed (since
with old non-DM model only one SPI NOR could be probed at any time).

When DM is enabled, allow for registering multiple SPI NORs as MTDs by
utilizing the nor->mtd structure, which is filled in by spi_nor_scan
anyway, instead of filling a separate struct mtd_info.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com>
Tested-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Cc: Priyanka Jain <priyanka.jain@nxp.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Heiko Schocher <hs@denx.de>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
2021-06-24 11:53:31 +05:30
zhengxun
06abbef27a mtd: spi-nor-ids: Add Macronix MX66UW2G345G
The MX66UW2G345G is Macronix Flash with SINGLE and OCTAL I/O. Hence,
add SPI_NOR_OCTAL_READ flag for this flash.

Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
[jagan: change order of id flags]
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: zhengxun <zhengxunli.mxic@gmail.com>
2021-06-22 13:53:24 +05:30
Simon Glass
b3b60f5912 sf: Support querying write-protect
This feature was dropped from U-Boot some time ago:

   f12f96cfaf (sf: Drop spl_flash_get_sw_write_prot")

However, we do need a way to see if a flash device is write-protected,
since if it is, it may not be possible to write to do (i.e. failing to
write is expected).

I am not sure of the correct layer to implement this, so this patch is a
stab at it. If spi-flash makes sense then I will add to the 'sf' also.

Re the points mentioned in the removal commit:

    1) This kind of requirement can be achieved using existing
       flash operations and flash locking API calls instead of
       making a separate flash API.

Which uclass is this?

    2) Technically there is no real hardware user for this API to
       use in the source tree.

I do want coral (at least) to support this.

    3) Having a flash operations API for simple register read bits
       also make difficult to extend the flash operations.

This new patch only mentions write-protect being on or off, rather than
the actual mechanism.

    4) Instead of touching generic code, it is possible to have
       this functionality inside spinor operations in the form of
       flash hooks or fixups for associated flash chips.

That sounds to me like what drivers are for. But we still need some sort
of API for it to be accessible.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-03-27 15:04:31 +13:00
Heinrich Schuchardt
b09c74f66d mtd: spi_flash_free()
dfu_free_entities() invoking dfu_free_entity_sf() has let to segementation
faults due to double freeing the same device.

spi_flash_free() is not relevant for the driver model but exists only for
compatibility with old drivers.

We must not remove any device here:

* The device may still be referenced.
* We don't want to have to probe again.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-03-27 13:59:36 +13:00
Patrice Chotard
5988575a90 mtd: spi-nor: Add WATCHDOG_RESET() in spi_nor_core callbacks
In case of big area write/erase on spi nor, watchdog timeout may occurs.
Issue reproduced on stm32mp157c-ev1 with following commands:

sf write 0xC0000000 0 0x3000000
or
sf erase 0 0x1000000

Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-03-11 16:36:32 +01:00
Su Baocheng
de76ae36f6 mtd: spi-nor-ids: Add support of flash protection to w25q128
The NOR flash w25q128 denoted by JEDEC ID 0xef4018 actually represents
various models. From Winbond's website, I could only find 3 types of
them:

    W25Q128JV-IQ/JQ
    datasheet:https://www.winbond.com/resource-files/
w25q128jv%20revg%2004082019%20plus.pdf

    W25Q128FV (SPI Mode)
    datasheet: https://www.winbond.com/resource-files/
w25q128fv%20rev.m%2005132016%20kms.pdf

    W25Q128BV
    datesheet: https://www.winbond.com/resource-files/
w25q128bv_revh_100313_wo_automotive.pdf

According to the datasheets, all of these 3 types support BP(0,1,2) and
TB bits in the status register (SR), so it could reuse the flash
protection logic for ST Micro.

So it should be safe to add the SPI_NOR_HAS_LOCK and SPI_NOR_HAS_TB
flags to the w25q128 entry of spi_nor_ids table.

Signed-off-by: Su Baocheng <baocheng.su@siemens.com>
[jagan: remove comments in spi-nor-ids.c]
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2021-02-26 13:35:25 +05:30
Alper Nebi Yasak
eb69d797d3 mtd: spi-nor-ids: Add Gigadevice GD25LQ64C
Add GD25LQ24C 64Mbit chip to spi-nor id table. This chip is used on
rk3399-gru-kevin:

    => sf probe
    SF: Detected gd25lq64c with page size 256 Bytes, erase size 4 KiB, total 8 MiB
    => sf erase 0x600000 0x200000
    SF: 2097152 bytes @ 0x600000 Erased: OK
    => sf test 0x700000 0x1000
    SPI flash test:
    0 erase: 52 ticks, 76 KiB/s 0.608 Mbps
    1 check: 5 ticks, 800 KiB/s 6.400 Mbps
    2 write: 14 ticks, 285 KiB/s 2.280 Mbps
    3 read: 3 ticks, 1333 KiB/s 10.664 Mbps
    Test passed
    0 erase: 52 ticks, 76 KiB/s 0.608 Mbps
    1 check: 5 ticks, 800 KiB/s 6.400 Mbps
    2 write: 14 ticks, 285 KiB/s 2.280 Mbps
    3 read: 3 ticks, 1333 KiB/s 10.664 Mbps

The values are the same as in Linux, except adjusted for the U-Boot
definition of INFO().

Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2021-02-26 13:27:42 +05:30
Tom Rini
2ae80437fb Merge branch '2021-02-02-drop-asm_global_data-when-unused'
- Merge the patch to take <asm/global_data.h> out of <common.h>
2021-02-15 10:16:45 -05:00
Michael Walle
5d867bcc23 mtd: spi-nor: add unlock all config option
Provide an explicit configuration option to disable default "unlock all"
of any flash chip which supports locking. It doesn't make sense to
automatically unprotect the entire flash on each u-boot startup if the
block protection bits are actually used.

Traditionally, the unlock was there to be able to write to flash devices
which powered-up with the block protection bits set. Over time this
feature creeped into all flash devices which support locking.

For a more detailed description and discussion see:
https://lore.kernel.org/linux-mtd/20201203162959.29589-8-michael@walle.cc/

Keep things simple in u-boot and just provide a configration option to
disable this behavior which can be set per board.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-02-08 14:01:13 +05:30
Simon Glass
401d1c4f5d common: Drop asm/global_data.h from common header
Move this out of the common header and include it only where needed.  In
a number of cases this requires adding "struct udevice;" to avoid adding
another large header or in other cases replacing / adding missing header
files that had been pulled in, very indirectly.   Finally, we have a few
cases where we did not need to include <asm/global_data.h> at all, so
remove that include.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
2021-02-02 15:33:42 -05:00
Tom Rini
b11f634b1c Driver model: make some udevice fields private
Driver model: Rename U_BOOT_DEVICE et al.
 dtoc: Tidy up and add more tests
 ns16550 code clean-up
 x86 and sandbox minor fixes for of-platdata
 dtoc prepration for adding build-time instantiation
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Merge tag 'dm-pull-5jan21' of git://git.denx.de/u-boot-dm into next

Driver model: make some udevice fields private
Driver model: Rename U_BOOT_DEVICE et al.
dtoc: Tidy up and add more tests
ns16550 code clean-up
x86 and sandbox minor fixes for of-platdata
dtoc prepration for adding build-time instantiation
2021-01-05 22:34:43 -05:00
Tom Rini
720620e691 Prepare v2021.01-rc5
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Merge tag 'v2021.01-rc5' into next

Prepare v2021.01-rc5

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-01-05 16:20:26 -05:00
Simon Glass
bdf8fd76c0 dm: Rename U_BOOT_DRIVER_ALIAS to DM_DRIVER_ALIAS
We use the U_BOOT_ prefix (i.e. U_BOOT_DRIVER) to declare a driver but
in every other case we just use DM_. Update the alias macros to use the
DM_ prefix.

We could perhaps rename U_BOOT_DRIVER() to DM_DRIVER(), but this macro
is widely used and there is at least some benefit to indicating it us a
U-Boot driver, particularly for code ported from Linux. So for now, let's
keep that name.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-01-05 12:26:35 -07:00
Simon Glass
a1a8a63385 spi: Tweak a few strange SPI NOR features for of-platdata
The #define of one struct to another has been around for a while. It
confuses dtoc and makes it think that struct spi_flash does not exist.

Make a few changes to improve things while we wait for migration to be
completed:

- Move the 'struct spi_flash' to column 1 so dtoc scans it
- Remove the #define when compiling dt-platdata.c
- Update the strange mtd_get/set_of_node() functions
- Use struct spi_nor in the drivers, so dtoc sees the correct struct

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-01-05 12:24:41 -07:00
Simon Glass
8b85dfc675 dm: Avoid accessing seq directly
At present various drivers etc. access the device's 'seq' member directly.
This makes it harder to change the meaning of that member. Change access
to go through a function instead.

The drivers/i2c/lpc32xx_i2c.c file is left unchanged for now.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-18 20:32:21 -07:00
Hongwei Zhang
936a645609 mtd: spi-nor-ids: add Micron MT25QL01G flash
Add Micron MT25QL01G flash, used on AST2600 board.

Signed-off-by: Hongwei Zhang <hongweiz@ami.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2020-12-18 16:19:33 +05:30
Robert Marko
d1b6b942f8 mtd: spi-nor-ids: Add SECT_4K to mx25l12805d
According to the mx25l12805d datasheet it supports using 4K or 64K sectors.
So lets add the SECT_4K to enable 4K sector usage.

Datasheet: https://www.mxic.com.tw/Lists/Datasheet/Attachments/7321/MX25L12805D,%203V,%20128Mb,%20v1.2.pdf

Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Cc: Luka Perkov <luka.perkov@sartura.hr>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2020-12-18 16:16:36 +05:30
Biju Das
9dddead735 mtd: spi-nor-ids: Add Winbond W25M512JW flash entry
Add Winbond W25M512JW flash device description.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2020-12-18 16:16:36 +05:30
Lad Prabhakar
1910aca0f1 mtd: spi-nor-ids: Add Winbond W25M512JV flash entry
Add Winbond W25M512JV flash device description.

Linux already has the flash entry present. A snippet below:
{ "w25m512jv", INFO(0xef7119, 0, 64 * 1024, 1024...},

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2020-12-18 16:16:36 +05:30
Simon Glass
8a8d24bdf1 dm: treewide: Rename ..._platdata variables to just ..._plat
Try to maintain some consistency between these variables by using _plat as
a suffix for them.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-13 16:51:09 -07:00
Simon Glass
d1998a9fde dm: treewide: Rename ofdata_to_platdata() to of_to_plat()
This name is far too long. Rename it to remove the 'data' bits. This makes
it consistent with the platdata->plat rename.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-13 16:51:09 -07:00
Simon Glass
c69cda25c9 dm: treewide: Rename dev_get_platdata() to dev_get_plat()
Rename this to be consistent with the change from 'platdata'.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-13 16:51:09 -07:00
Simon Glass
caa4daa2ae dm: treewide: Rename 'platdata' variables to just 'plat'
We use 'priv' for private data but often use 'platdata' for platform data.
We can't really use 'pdata' since that is ambiguous (it could mean private
or platform data).

Rename some of the latter variables to end with 'plat' for consistency.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-13 16:51:08 -07:00
Simon Glass
41575d8e4c dm: treewide: Rename auto_alloc_size members to be shorter
This construct is quite long-winded. In earlier days it made some sense
since auto-allocation was a strange concept. But with driver model now
used pretty universally, we can shorten this to 'auto'. This reduces
verbosity and makes it easier to read.

Coincidentally it also ensures that every declaration is on one line,
thus making dtoc's job easier.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-13 08:00:25 -07:00
Simon Glass
734206dda1 dm: core: Rename device_bind_ofnode() to device_bind()
This is the standard function to use when binding devices. Drop the
'_ofnode' suffix to make this clear.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-13 07:58:18 -07:00
Michael Walle
382985675c mtd: spi-nor-ids: add Winbond W25Q32JW-IM flash
The Kontron SMARC-sAL28 board uses that flash.

This is the same change as in the linux commit f3418718c0ec ("mtd:
spi-nor: Add support for w25q32jwm").

Signed-off-by: Michael Walle <michael@walle.cc>
Reported-by: Leo Krueger <leo.krueger@zal.aero>
2020-12-02 16:21:58 -05:00
Michal Simek
89b7f1010f mtd: spi: Fix incorrect indentation
Use tabs to be aligned with the rest of the code.

Fixes: 658df8bd94 ("mtd: spi-nor-core: Add octal mode support")
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-10-27 08:13:33 +01:00
Tom Rini
b7e7831e5d Merge branch 'next'
Bring in the assorted changes that have been staged in the 'next' branch
prior to release.

Signed-off-by: Tom Rini <trini@konsulko.com>
2020-10-05 14:10:59 -04:00
Sean Anderson
8985e1cf91 mtd: spi: Fix logging in spi-nor-tiny
This fixes dev_xxx() not always being called with a device. In
spi_nor_reg_read, a the slave device may not always be available, so we use
bus and cs instead.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-09-30 08:52:41 -04:00
Sean Anderson
c64633644e mtd: spi: Include dm.h in spi-nor-core.c
This header is needed so struct udevice can be used in dev_xxx().

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-09-30 08:52:39 -04:00
Vladimir Vid
2781c71873 mtd: spi-nor-ids: add support for Macronix mx25u12835f flash
Some of Marvell A3700 boards use mx25u12835f, specifically uDPU
and ESPRESSObin v7.

Signed-off-by: Vladimir Vid <vladimir.vid@sartura.hr>
[a.heider: adapt commit message to mainline]
Signed-off-by: Andre Heider <a.heider@gmail.com>
2020-09-24 10:13:22 +02:00
Simon Glass
e567ec849a mtd: spi-nor: Tidy up error handling / debug code
The -ENODEV error value in spi_nor_read_id() is incorrect since there
clearly is a device - it just cannot be supported. Use -ENOMEDIUM instead
which has the virtue of being less common.

Fix the return value in spi_nor_scan().

Also there are a few printf() statements which should be debug() since
they bloat the code with unused strings at present. Fix those while here.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-08-03 22:19:54 -04:00
Simon Glass
f38a29997d spi: Allow separate control of SPI_FLASH_TINY for SPL/TPL
In some cases SPL needs to be able to erase but TPL just needs to read.
Allow these to have separate settings for SPI_FLASH_TINY.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-08-03 22:19:54 -04:00
Tom Rini
497c7598c4 Merge branch 'master' of https://gitlab.denx.de/u-boot/custodians/u-boot-spi
- Enable DM_SPI on siemens omap boards (Jagan)
- Dropped some non-dm supported omap3 boards (Jagan)
- Dropped non-dm code in omap3 spi driver (Jagan)
- Dropped non-dm code in kirkwood spi driver (Bhargav)
2020-07-11 17:40:00 -04:00
Walter Lozano
addf358bac core: add support for U_BOOT_DRIVER_ALIAS
Currently when using OF_PLATDATA the binding between devices and drivers
is done trying to match the compatible string in the node with a driver
name. However, usually a single driver supports multiple compatible strings
which causes that only devices which its compatible string matches a
driver name get bound.

To overcome this issue, this patch adds the U_BOOT_DRIVER_ALIAS macro,
which generates no code at all, but allows an easy way to declare driver
name aliases. Thanks to this, dtoc could be improve to look for the driver
name based on its alias when it populates the U_BOOT_DEVICE entry.

Signed-off-by: Walter Lozano <walter.lozano@collabora.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-07-09 18:57:22 -06:00
Walter Lozano
e3e2470fdd drivers: rename drivers to match compatible string
When using OF_PLATDATA, the bind process between devices and drivers
is performed trying to match compatible string with driver names.
However driver names are not strictly defined, and also there are different
names used when declaring a driver with U_BOOT_DRIVER, the name of the
symbol used in the linker list and the used in the struct driver_info.

In order to make things a bit more clear, rename the drivers names. This
will also help for further OF_PLATDATA improvements, such as checking
for valid driver names.

Signed-off-by: Walter Lozano <walter.lozano@collabora.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add a fix for sandbox of-platdata to avoid using an invalid ANSI colour:
Signed-off-by: Simon Glass <sjg@chromium.org>
2020-07-09 18:57:22 -06:00
Heinrich Schuchardt
a6cfc34e36 sandbox: spi: sandbox_sf_state_name() is required
Compiling drivers/mtd/spi/sandbox.c fails when compiled with
CONFIG_LOG=n:

In file included from include/common.h:20,
                 from drivers/mtd/spi/sandbox.c:13:
drivers/mtd/spi/sandbox.c:295:15: error: format ‘%s’ expects argument of
type ‘char *’, but argument 7 has type ‘int’ [-Werror=format=]
  295 |   log_content(" cmd: transition to %s state\n",
      |               ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
include/linux/printk.h:37:21: note: in definition of macro ‘pr_fmt’
   37 | #define pr_fmt(fmt) fmt
      |                     ^~~
include/log.h:128:30: note: in expansion of macro ‘log_nop’
  128 | #define log_content(_fmt...) log_nop(LOG_CATEGORY, \
      |                              ^~~~~~~
drivers/mtd/spi/sandbox.c:295:3: note: in expansion of macro
‘log_content’
  295 |   log_content(" cmd: transition to %s state\n",
      |   ^~~~~~~~~~~
drivers/mtd/spi/sandbox.c:295:37: note: format string is defined here
  295 |   log_content(" cmd: transition to %s state\n",
      |                                    ~^
      |                                     |
      |                                     char *
      |                                    %d

Supply function sandbox_sf_state_name() independent of CONFIG_LOG.

Fixes: c3aed5db59 ("sandbox: spi: Add more logging")
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-07-09 18:57:21 -06:00