Commit graph

42 commits

Author SHA1 Message Date
Stefan Roese
5d7c73e65b ppc4xx: Use common ns16550 functions in 4xx UART POST driver
This patch changes the PPC4xx POST UART driver to use the common
NS16550 functions for receiving and sending. Additionally the
local function for SoC divisor setup are removed. Instead the
functions from arch/powerpc/cpu/ppc4xx/4xx_uart.c are used. This
removes code duplication.

Also the common CONFIG_SYS_NS16550_COMx defines are now used
to describe the POST UART's.

And a compile breakage is fixed, introduced by a git merge of
the ppc4xx/next branch into master. Now "ppc4xx.h" is moved to
"asm/ppc4xx.h". Fixed as well with this patch.

Signed-off-by: Stefan Roese <sr@denx.de>
2010-10-04 11:20:02 +02:00
Wolfgang Denk
2e6e1772c0 Merge branch 'next' of /home/wd/git/u-boot/next
Conflicts:
	include/ppc4xx.h

Signed-off-by: Wolfgang Denk <wd@denx.de>
2010-09-28 23:30:47 +02:00
Stefan Roese
b36df56115 ppc4xx: Move ppc4xx headers to powerpc include directory
This patch moves some ppc4xx related headers from the common include
directory (include/) to the powerpc specific one
(arch/powerpc/include/asm/). This way to common include directory is not
so cluttered with files.

Signed-off-by: Stefan Roese <sr@denx.de>
2010-09-23 09:02:05 +02:00
Stefan Roese
ab25e880ca ppc4xx: POST UART: Use in/out_8() io-accessor functions
This patch fixes a problem in the PPC4xx POST UART driver. This driver
incorrectly used the in/out8() io-accessor functions. This could lead to
problems since these functions don't guarantee execution ordering. This
patch now replaces these functions with the correct ones.

Additionally the driver is converted to using the NS16550 struct instead
of macros for the register offsets.

And some common code is factored out for better maintainability.

Signed-off-by: Stefan Roese <sr@denx.de>
2010-09-23 08:43:56 +02:00
Stefan Roese
a47a12becf Move arch/ppc to arch/powerpc
As discussed on the list, move "arch/ppc" to "arch/powerpc" to
better match the Linux directory structure.

Please note that this patch also changes the "ppc" target in
MAKEALL to "powerpc" to match this new infrastructure. But "ppc"
is kept as an alias for now, to not break compatibility with
scripts using this name.

Signed-off-by: Stefan Roese <sr@denx.de>
Acked-by: Wolfgang Denk <wd@denx.de>
Acked-by: Detlev Zundel <dzu@denx.de>
Acked-by: Kim Phillips <kim.phillips@freescale.com>
Cc: Peter Tyser <ptyser@xes-inc.com>
Cc: Anatolij Gustschin <agust@denx.de>
2010-04-21 23:42:38 +02:00
Peter Tyser
8d1f268204 ppc: Move cpu/$CPU to arch/ppc/cpu/$CPU
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
2010-04-13 09:13:16 +02:00
Niklaus Giger
ddc922ff2c ppc_4xx: Apply new HW register names
Modify all existing *.c files to use the new register names
as seen in the AMCC manuals.

Signed-off-by: Niklaus Giger <niklaus.giger@member.fsf.org>
Signed-off-by: Stefan Roese <sr@denx.de>
2009-10-07 09:15:20 +02:00
Stefan Roese
d1c3b27525 ppc4xx: Big cleanup of PPC4xx defines
This patch cleans up multiple issues of the 4xx register (mostly
DCR, SDR, CPR, etc) definitions:

- Change lower case defines to upper case (plb4_acr -> PLB4_ACR)
- Change the defines to better match the names from the
  user's manuals (e.g. cprpllc -> CPR0_PLLC)
- Removal of some unused defines

Please test this patch intensive on your PPC4xx platform. Even though
I tried not to break anything and tested successfully on multiple
4xx AMCC platforms, testing on custom platforms is recommended.

Signed-off-by: Stefan Roese <sr@denx.de>
2009-09-11 10:35:58 +02:00
Matthias Fuchs
58ea142fb2 ppc4xx: Replace 4xx lowercase SPR references
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu>
Signed-off-by: Stefan Roese <sr@denx.de>
2009-07-24 06:47:17 +02:00
Jean-Christophe PLAGNIOL-VILLARD
6d0f6bcf33 rename CFG_ macros to CONFIG_SYS
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2008-10-18 21:54:03 +02:00
Stefan Roese
f2302d4430 Fix merge problems
Signed-off-by: Stefan Roese <sr@denx.de>
2008-08-06 14:05:38 +02:00
Stefan Roese
b2815f7928 ppc4xx: Fix misspelled CONFIG_440SPE/440EPX/GRX config options
We use upper case letters for the AMCC processor defines (like
CONFIG_440SPE) in U-Boot. So the 440SPe is labeled CONFIG_440SPE and
not CONFIG_440SPe. This patch fixes the last misspelled config options.

Signed-off-by: Stefan Roese <sr@denx.de>
2008-06-06 16:10:41 +02:00
Yuri Tikhonov
6e8ec68226 POST: OCM test added.
Added OCM test to POST layer. This version runs before all other tests
but doesn't yet interrupt post sequence on failure.

Signed-off-by: Ilya Yanok <yanok@emcraft.com>
Signed-off-by: Yuri Tikhonov <yur@emcraft.com>
2008-05-20 23:24:37 +02:00
Wolfgang Denk
e5e9d6c9c0 post/cpu/ppc4xx/Makefile: line length cleanup
Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-05-10 00:36:09 +02:00
Kumar Gala
03c6cd39f9 post: Fix building with O=
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-04-28 00:55:04 +02:00
Yuri Tikhonov
2d2b994a30 POST: move CONFIG_POST to Makefiles
Introduce the new logical option CONFIG_HAS_POST which is set when the
platform has CONFIG_POST set. Use CONFIG_HAS_POST in the post/ Makefiles
to determine should the POST libs be compiled for the selected target
platform, or not.

To avoid breaking u-boot linking process, the empty post/libpost.a file is
created for platforms which do not have POSTs.

Signed-off-by: Yuri Tikhonov <yur@emcraft.com>
Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-04-22 14:40:19 +02:00
Yuri Tikhonov
0a51e9248e POST: preparations for moving CONFIG_POST to Makefiles
Remove CONFIG_POST ifdefs from the post/ source files.

Signed-off-by: Yuri Tikhonov <yur@emcraft.com>
Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-04-22 14:38:38 +02:00
Stefan Roese
84a999b6cd ppc4xx: program_tlb now uses 64bit physical addess
This patch changes the physical addess parameter from 32bit to 64bit.
This is needed for 36bit 4xx platforms to access areas located
beyond the 4GB border, like SoC peripherals (EBC etc.).

Signed-off-by: Stefan Roese <sr@denx.de>
2008-03-15 07:28:03 +01:00
Anatolij Gustschin
60ec654c5e POST: Disable cache while SPR POST
Currently (since commit b2e2142c) u-boot crashes on
sequoia board while SPR test if CONFIG_4xx_DCACHE is
enabled. This patch disables the cache while SPR test.

Signed-off-by: Anatolij Gustschin <agust@denx.de>
2008-03-02 21:33:51 +01:00
Larry Johnson
4b3cc6ece9 ppc4xx: Refactor ECC POST for AMCC Denali core
The ECC POST reported intermittent failures running after power-up on
the Korat PPC440EPx board.  Even when the test passed, the debugging
output occasionally reported additional unexpected ECC errors.

This refactoring has three main objectives: (1) minimize the code
executed with ECC enabled during the tests, (2) add more checking of the
results so any unexpected ECC errors would cause the test to fail, and
(3) use synchronization (only) where required by the processor.

Signed-off-by: Larry Johnson <lrj@acm.org>
2008-01-16 11:23:33 +01:00
Niklaus Giger
17bef68097 ppc_4xx: Fix post spr.c for PPC405
post/cpu/ppc4xx/spr.c contained a few checks for registers only present
for PPC440 and derivates processor.

Signed-off-by: Niklaus Giger <niklaus.giger@netstal.com>
2008-01-14 15:52:52 +01:00
Larry Johnson
0d9cdeac1d Cosmetic changes to ECC POST for AMCC Denali core
Signed-off-by: Larry Johnson <lrj@acm.org>
2007-12-27 19:35:35 +01:00
Stefan Roese
2e583d6c81 ppc4xx: Fix compilation problem in 405 cache POST test
Signed-off-by: Stefan Roese <sr@denx.de>
2007-12-27 19:35:35 +01:00
Stefan Roese
d91722102c ppc4xx: Fix problem in 44x cache POST routine
As repoted by Larry Johnson, running "diag run cache" caused a crash
in U-Boot. This problem was introduced by a patch that removed the
TLB entry for the cache test after the test has completed. Since this
TLB was only setup once, a 2nd attempt to run this cache test
failed with a crash. Now this TLB entry is created every time the
routine is called.

Signed-off-by: Stefan Roese <sr@denx.de>
2007-12-27 19:35:34 +01:00
Larry Johnson
a724a9b40c Fix/enhance ECC POST for 440EPx/GRx
This patch allows the ECC POST to be used for different boards with the
PPC440 Denali SDRAM controller.  Modifications include skipping the test
if ECC is not enabled (as for non-ECC DIMMs) and adding synchronization
to prevent timing errors.

Signed-off-by: Larry Johnson <lrj@acm.org>
2007-12-27 19:35:33 +01:00
Larry Johnson
454a6cf8d4 PPC4xx: Move/rename ECC POST for 440EPx/GRx
Signed-off-by: Larry Johnson <lrj@acm.org>
2007-12-27 19:35:33 +01:00
Matthias Fuchs
c29d2d3680 ppc4xx: use correct io accessors for 4xx ethernet POST
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
2007-12-27 19:35:33 +01:00
Stefan Roese
f71b2888b4 ppc4xx: Change 4xx POST ethernet test to handle cached memory too
This patch enables the 4xx EMAC POST driver to work too, when dcache is
enabled.

Signed-off-by: Stefan Roese <sr@denx.de>
2007-10-31 21:21:47 +01:00
Stefan Roese
a268590406 ppc4xx: Remove temporary TLB entry in POST cache test only for 440
Signed-off-by: Stefan Roese <sr@denx.de>
2007-10-31 21:21:47 +01:00
Stefan Roese
06713773da ppc4xx: Remove compiler warning from previous commit
Signed-off-by: Stefan Roese <sr@denx.de>
2007-10-31 21:21:46 +01:00
Stefan Roese
6fa397df67 ppc4xx: Remove temporary TLB entry in POST cache test
Signed-off-by: Stefan Roese <sr@denx.de>
2007-10-31 21:21:46 +01:00
Stefan Roese
7d47cee2cc ppc4xx: Fix POST ethernet test for Haleakala
The POST ethernet test needed to be changed to dynamically determine
the count of ethernet devices. This code is cloned from the 4xx
ethernet driver.

Signed-off-by: Stefan Roese <sr@denx.de>
2007-10-31 21:20:51 +01:00
Stefan Roese
a424a8bb29 POST: Add 405EX support to 4xx UART POST test
Signed-off-by: Stefan Roese <sr@denx.de>
2007-10-31 21:20:49 +01:00
Stefan Roese
4ce846ec59 POST: Fix merge problem
Signed-off-by: Stefan Roese <sr@denx.de>
2007-08-14 15:12:01 +02:00
Stefan Roese
34886bbea2 Merge with /home/stefan/git/u-boot/zeus 2007-08-14 15:00:42 +02:00
Stefan Roese
c5a172a5fd POST: Add option for external ethernet loopback test
When CFG_POST_ETHER_EXT_LOOPBACK is defined, the ethernet POST
is not done using an internal loopback connection, but by assuming
that an external loopback connector is plugged into the board.

Signed-off-by: Stefan Roese <sr@denx.de>
2007-08-14 14:41:55 +02:00
Stefan Roese
eb2b4010ae POST: Add ppc405 support to cache and UART POST
Signed-off-by: Stefan Roese <sr@denx.de>
2007-08-14 14:39:44 +02:00
Yuri Tikhonov
29cb25da56 POST: Add ppc4xx UART POST support without external uart clock (lwmon5)
The patch adds support for UART POST on ppc44x-based boards with no
external serial clocks installed.

Signed-off-by: Yuri Tikhonov <yur@emcraft.com>
Acked-by: Stefan Roese <sr@denx.de>
2007-08-10 08:25:22 +02:00
Stefan Roese
ea9f6bce38 ppc4xx: Update 440EPx lwmon5 board support
- Clear ECC status regs after ECC POST test
- Set dcbz for ECC generation with caches enabled as default
- Code cleanup

Signed-off-by: Stefan Roese <sr@denx.de>
2007-07-31 08:37:01 +02:00
Wolfgang Denk
4ef218f6fd Coding style cleanup; update CHANGELOG.
Signed-off-by: Wolfgang Denk <wd@denx.de>
2007-07-10 00:01:28 +02:00
Sergei Poselenov
b44896215a Merged POST framework with the current TOT.
Signed-off-by: Sergei Poselenov <sposelenov@emcraft.com>
2007-07-05 08:17:37 +02:00
Igor Lisitsin
a11e06965e Extend POST support for PPC440
Added memory, CPU, UART, I2C and SPR POST tests for PPC440.

Signed-off-by: Igor Lisitsin <igor@emcraft.com>
--
2007-06-22 23:21:01 +02:00