Commit graph

4214 commits

Author SHA1 Message Date
Simon Glass
06a1edda6c freescale: Drop old pre-DM_ETH code
This is used by ls1021atwr_sdcard_ifc_SECURE_BOOT with split config, but
is not needed anymore, since Ethernet migration is complete. Drop it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-03-03 09:49:02 -05:00
Tom Rini
f4ee45e2a0 s5p: Remove empty arch_misc_init
We don't need to provide an empty arch_misc_init function here, we can
just not enable the hook.

Cc: Stefan Bosch <stefan_b@posteo.net>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Minkyu Kang <mk7.kang@samsung.com>
2023-03-02 15:32:25 -05:00
Simon Glass
e7ec875dd1 Correct SPL use of SYS_FSL_ERRATUM_A010539
This converts 1 usage of this option to the non-SPL form, since there is
no SPL_SYS_FSL_ERRATUM_A010539 defined in Kconfig

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-02-10 07:41:40 -05:00
Simon Glass
dbcbbfd725 mtd: Drop unused CONFIG_S32V234
This option does not exist, so the Makefile rule does nothing. Drop it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-02-07 14:33:49 -05:00
Simon Glass
ba9bb035a9 rmobile: Drop CONFIG_RMOBILE
This has been renamed to CONFIG_ARCH_RMOBILE but this one was left behind.
It doesn't point to a directory that exists, so just drop it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-02-07 14:33:49 -05:00
Simon Glass
8742abedcf arm: Drop old kona code
The KONA and KONA_GPIO options don't exist anymore, since this commit:

   0f6807e77b arm: Remove bcm28155_ap board

Drop the dead code.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-02-07 14:33:48 -05:00
Simon Glass
c4b25d5908 imx: Drop unused CONFIG_IMX
This option does not exist, so the Makefile rule does nothing. Drop it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-02-07 14:33:48 -05:00
Tom Rini
1e1cd8eb2d Merge tag 'fsl-qoriq-2023-2-1' of https://source.denx.de/u-boot/custodians/u-boot-fsl-qoriq
make QSPI clock selection optional during SoC init for ls102xa
Fix regulator name for ls2_sfp
Update NXP RCW github repo
2023-02-01 09:31:17 -05:00
Mario Kicherer
ba89878d70 armv7: ls102xa: make QSPI clock selection optional during SoC init
To improve startup times when booting from QSPI flash, the QSPI frequency
can be configured very early in the boot process [1] to reduce loading
times of U-Boot itself. This patch adds an option to disable setting the
frequency to a default value during SoC initialization.

[1] https://www.nxp.com/docs/en/application-note/AN12279.pdf

Signed-off-by: Mario Kicherer <dev@kicherer.org>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2023-02-01 14:16:22 +08:00
Marek Vasut
11a1a3b73d arm: psci: Fix RESET2 hook
The RESET2 hook is a PSCI v1.1 functionality, rename the macro accordinly.
Add missing handler for the RESET2 hook, so it can be implemented by U-Boot.

Signed-off-by: Marek Vasut <marex@denx.de>
2023-01-31 15:46:39 +01:00
Andre Przywara
7f0938eac5 sunxi: fel: drop redundant "control register" save/restore
For some reasons shrouded in mystery, the code saving the FEL state was
saving the SCTLR register twice, with the second copy trying to justify
itself by using its ancient "control register" alias name.

Drop the redundant second copy, both from the fel_stash data structure,
and also the code saving and restoring it.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Samuel Holland <samuel@sholland.org>
Tested-by: Samuel Holland <samuel@sholland.org>
2023-01-21 01:32:23 +00:00
Andre Przywara
4871650c95 sunxi: armv8: fel: load only 32-bit values
Both the values and the MMIO addresses that we need during the 64-bit FEL
restore are smaller than 2^32, so we don't need to do any 64-bit loads.

Change the loads to only load 32 bits worth of data, that saves us some
bytes for storing the values.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Samuel Holland <samuel@sholland.org>
Tested-by: Samuel Holland <samuel@sholland.org>
2023-01-21 01:32:23 +00:00
Tom Rini
6e7df1d151 global: Finish CONFIG -> CFG migration
At this point, the remaining places where we have a symbol that is
defined as CONFIG_... are in fairly odd locations. While as much dead
code has been removed as possible, some of these locations are simply
less obvious at first. In other cases, this code is used, but was
defined in such a way as to have been missed by earlier checks.  Perform
a rename of all such remaining symbols to be CFG_... rather than
CONFIG_...

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-01-20 12:27:24 -05:00
Tom Rini
a84fa1bef4 nxp: Finish migration of SYS_FSL_SRDS_[12] to Kconfig
As this is used on both ARM and PowerPC platforms, this needs to be
listed in arch/Kconfig.nxp and match how they're currently used by
select'ing them under the required PowerPC ARCH_xxx options.

Signed-off-by: Tom Rini <trini@konsulko.com>
2023-01-20 12:27:23 -05:00
Tom Rini
89c90cadf3 nxp: Finish migration of SYS_FSL_IFC_BANK_COUNT to Kconfig
As this is used on both ARM and PowerPC platforms, this needs to be
asked in arch/Kconfig.nxp.  Set the PowerPC defaults based on
arch/powerpc/include/asm/config_mpc85xx.h and remove the default set in
drivers/mtd/nand/raw/fsl_ifc_nand.c

Signed-off-by: Tom Rini <trini@konsulko.com>
2023-01-20 12:27:06 -05:00
Tom Rini
80c75ce00d fsl-layerscape: Rework usage of CONFIG_CLUSTER_CLK_FREQ
In the case where CONFIG_CLUSTER_CLK_FREQ is not defined, simply set
cluster_clk to get_board_sys_clk().

Signed-off-by: Tom Rini <trini@konsulko.com>
2023-01-20 12:27:06 -05:00
Tom Rini
ae8a922bd2 arm: Rework usage of CONFIG_ARMV[78]_SECURE_BASE in linker scripts
In order to avoid defining CONFIG_ARMV[78_]SECURE_BASE as empty in the
linker scripts, if not already defined, add and use
__ARMV[78_]SECURE_BASE for when the base is not defined and we want the
linker scripts to continue.

Signed-off-by: Tom Rini <trini@konsulko.com>
2023-01-20 12:27:06 -05:00
Tom Rini
a3fda0d30a global: Remove unused CONFIG defines
Remove some CONFIG symbols and related comments, etc, that are unused
within the code itself at this point.

Signed-off-by: Tom Rini <trini@konsulko.com>
2023-01-20 12:27:06 -05:00
Simon Glass
d81d17637a arm: Support trace on armv8
Use the notrace attribute so that timer functions can be used when
tracing. This is required to avoid infinite loops when recording a trace.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-01-18 11:49:13 -07:00
Simon Glass
33c60a38bb trace: Use notrace for short
The attribute syntax is quite verbose. Use the macro provided for this
purpose.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-01-18 11:49:12 -07:00
Stefan Bosch
28663622cf arm: s5p4418: dm_serial: remove old code / add DEBUG_UART
Remove init of UART-clock and UART-reset in arch_cpu_init(). Add DEBUG_UART
to s5p4418_nanopi2_defconfig.

Signed-off-by: Stefan Bosch <stefan_b@posteo.net>
2023-01-02 16:06:08 -05:00
Tom Rini
f5dd0c5e19 configs: Remove unused or redundant CONFIG symbols
A number of CONFIG symbols have crept in that are never referenced in
code, so drop them here. Further, we have two symbols being enabled
in headers while already enabled correctly in Kconfig, so these lines
can also be removed.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-23 10:15:13 -05:00
Tom Rini
3e204427c8 global: Migrate CONFIG_SMP_PEN_ADDR to CFG
Perform a simple rename of CONFIG_SMP_PEN_ADDR to CFG_SMP_PEN_ADDR

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-23 10:15:12 -05:00
Tom Rini
f410d0ac8a global: Migrate CONFIG_PL011_CLOCK to CFG
Perform a simple rename of CONFIG_PL011_CLOCK to CFG_PL011_CLOCK

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-23 10:14:51 -05:00
Tom Rini
1d457dbb91 global: Migrate CONFIG_MAX_MEM_MAPPED to CFG
Perform a simple rename of CONFIG_MAX_MEM_MAPPED to CFG_MAX_MEM_MAPPED

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-23 10:14:51 -05:00
Tom Rini
04501ecca2 global: Migrate CONFIG_ARM_GIC_BASE_ADDRESS to CFG
Perform a simple rename of CONFIG_ARM_GIC_BASE_ADDRESS to CFG_ARM_GIC_BASE_ADDRESS

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-23 10:07:03 -05:00
Tom Rini
b9d1f88b3a exynos: Rework legacy PWM usage
The way that the timer support is currently done for exynos/nexell
platforms relies on the legacy PWM infrastructure, and that needs to be
updated. However, we really cannot safely undef CONFIG_DM_PWM to build
the timer.c file without warnings. For now, rename the relevant legacy
functions to be prefixed with s5p_ and add prototypes to the arch pwm.h
files.

Cc: Minkyu Kang <mk7.kang@samsung.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Dzmitry Sankouski <dsankouski@gmail.com>
Cc: Stefan Bosch <stefan_b@posteo.net>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-12-23 10:07:03 -05:00
Tom Rini
4fd9373bbb net: Remove more legacy functions
Remove some of the board and arch specific non-DM_ETH helper code.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-22 10:31:49 -05:00
Tom Rini
2b210540b1 Convert CONFIG_PEN_ADDR_BIG_ENDIAN to Kconfig
This converts the following to Kconfig:
   CONFIG_PEN_ADDR_BIG_ENDIAN

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-22 10:31:48 -05:00
Tom Rini
fc2240046c arm: Use the WEAK assembly entry point consistently
It is a bad idea, and more modern toolchains will fail, if you declare
an assembly function to be global and then weak, instead of declaring it
weak to start with. Update assorted assembly files to use the WEAK macro
directly.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Pali Rohár <pali@kernel.org>
2022-12-06 15:30:30 -05:00
Tom Rini
2568bd6db7 arm: Remove unused mx27 code
We no longer have any i.MX27 platforms, remove the remaining support
code.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-05 16:07:13 -05:00
Tom Rini
00faea644a arm: ls102xa: Migrate LS102XA_STREAM_ID
This symbol appears to be globally used in the architecture, select it.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-05 16:07:13 -05:00
Tom Rini
98cb4c6b8e arm920t: Remove unused imx code
This code is currently unused, remove it.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-05 16:07:12 -05:00
Tom Rini
345c09de5e Convert CONFIG_FSL_DEVICE_DISABLE to Kconfig
This converts the following to Kconfig:
   CONFIG_FSL_DEVICE_DISABLE

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-05 16:06:43 -05:00
Tom Rini
65cc0e2a65 global: Move remaining CONFIG_SYS_* to CFG_SYS_*
The rest of the unmigrated CONFIG symbols in the CONFIG_SYS namespace do
not easily transition to Kconfig. In many cases they likely should come
from the device tree instead. Move these out of CONFIG namespace and in
to CFG namespace.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-12-05 16:06:08 -05:00
Tom Rini
aa6e94deab global: Move remaining CONFIG_SYS_SDRAM_* to CFG_SYS_SDRAM_*
The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_SDRAM
namespace do not easily transition to Kconfig. In many cases they likely
should come from the device tree instead. Move these out of CONFIG
namespace and in to CFG namespace.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-12-05 16:06:07 -05:00
Tom Rini
2db82bf2bd Convert CONFIG_SYS_PMAN et al to Kconfig
This converts the following to Kconfig:
   CONFIG_NOBQFMAN
   CONFIG_SYS_DPAA_DCE
   CONFIG_SYS_DPAA_FMAN
   CONFIG_SYS_DPAA_PME
   CONFIG_SYS_DPAA_RMAN
   CONFIG_SYS_PMAN

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-12-05 16:06:07 -05:00
Tom Rini
ecc8d425fd global: Move remaining CONFIG_SYS_PCI* to CFG_SYS_PCI*
The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_PCI and
CONFIG_SYS_PCIE namespace do not easily transition to Kconfig. In many
cases they likely should come from the device tree instead. Move these
out of CONFIG namespace and in to CFG namespace.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-12-05 16:06:07 -05:00
Tom Rini
91092132ba global: Move remaining CONFIG_SYS_NS16550_* to CFG_SYS_NS16550_*
The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NS16550
namespace do not easily transition to Kconfig. In many cases they likely
should come from the device tree instead. Move these out of CONFIG
namespace and in to CFG namespace.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-12-05 16:06:07 -05:00
Tom Rini
6cc04547cb global: Migrate CONFIG_SYS_FSL* symbols to the CFG_SYS namespace
Migrate all of COFIG_SYS_FSL* to the CFG_SYS namespace.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-11-10 10:08:55 -05:00
Simon Glass
984639039f Rename CONFIG_SYS_TEXT_BASE to CONFIG_TEXT_BASE
The current name is inconsistent with SPL which uses CONFIG_SPL_TEXT_BASE
and this makes it imposible to use CONFIG_VAL().

Rename it to resolve this problem.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-10-31 11:01:31 -04:00
Sean Anderson
3ed84e73fb arm: layerscape: Disable unused parts of ICID tables
Several parts of the ICID table are only necessary for U-Boot proper.
Disable them in SPL. This saves around 500 bytes.

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-10-18 09:32:52 +08:00
Sean Anderson
3d970cb264 arm: layerscape: Don't select FSL_IFC when booting from SD card
FSL_IFC should only be selected when booting from NAND flash (or when
NAND_FSL_IFC is enabled). The existing logic does this correctly when
QSPI is also enabled, but not when just booting from SD.

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-10-18 09:32:51 +08:00
Sean Anderson
8fd111351c arm64: layerscape: Support SYSRESET
CONFIG_SYSRESET provides its own implementation of reset_cpu. Disable
our version when it is enabled.

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-10-17 15:17:56 +08:00
Sean Anderson
0c3eec2aea arm64: ls104x: Enable eDMA snooping
This enables eDMA snooping on the LS1043A and LS1046A. This will allow
marking the I2C, LPUART, and SPI devices on these SoCs as DMA coherent.
Oddly, this bit is only documented for the LS1043A, and is marked as
"reserved" in the LS1046ARM. I have tested this patch on the LS1046A
and found that marking i2c0 as dma-coherent works without issue.

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-10-17 15:17:56 +08:00
Pali Rohár
ae17910117 armv8: cache_v8: Fix pgtables setup when MMU is already enabled
When MMU is already enabled then dcache_enable() does not call mmu_setup()
and so setup_all_pgtables() is also never called.

In this situation when some driver calls mmu_set_region_dcache_behaviour()
function then U-Boot crashes with error message:

    Emergency page table not setup.

Fix this issue by explicitly calling setup_all_pgtables() in dcache_enable()
function near condition for mmu_setup().

This change fixes chainloading U-Boot from U-Boot on Turris Mox board which
uses mvneta ethernet driver which calls mmu_set_region_dcache_behaviour().

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <kabel@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-10-06 21:05:17 -04:00
Sean Anderson
bdbdaede67 ARMv8/sec_firmware: Convert to use fit_get_data_conf_prop
This reduces sec_firmware_get_data to a single call to
fit_get_data_conf_prop. I think sec_firmware_check_copy_loadable could also
be converted, but it does not map as straightforwardly, so I have left it
for a future cleanup.

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-09-07 13:40:45 +08:00
Sean Anderson
1b0e98221d ARMv8/sec_firmware: Remove SEC_FIRMWARE_FIT_CNF_NAME
The config to use for FIT images can be better specified by enabling
CONFIG_MULTI_DTB_FIT and implementing board_fit_config_name_match.

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-09-07 13:40:43 +08:00
Michael Walle
6622c30f2e armv8: layerscape: spl: mark OCRAM as non-secure
By default the OCRAM is marked as secure. While the SPL runs in EL3 and
thus can access it, DMA devices cannot. Mark the whole OCRAM as
non-secure.
This will fix MMC and SD card boot on LS1028A when using SPL instead of
TF-A.

Signed-off-by: Michael Walle <michael@walle.cc>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-09-06 09:10:41 +08:00
Tom Rini
cd9b71c3f6 layerscape: Disable CONFIG_FMAN_ENET on *aqds* platforms
The *aqds* platforms have not been migrated to be able to enable
CONFIG_DM_ETH with CONFIG_FMAN_ENET. Disable CONFIG_FMAN_ENET on these
platforms.

Cc: Mingkai Hu <mingkai.hu@nxp.com>
Cc: Rajesh Bhagat <rajesh.bhagat@nxp.com>
Cc: Pramod Kumar <pramod.kumar_1@nxp.com>
Cc: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2022-08-20 21:18:15 -04:00
Rasmus Villemoes
4b05301979 arm64: explicitly disable pointer authentication instructions
The Yocto project builds their aarch64 cross-compiler with the
configure knob --enable-standard-branch-protection, which means that
their gcc behaves as if -mbranch-protection=standard is passed; the
default (lacking that configure knob) is -mbranch-protection=none.

This means that when building U-Boot using the Yocto toolchain, most
functions end up containing paciasp/autiasp/bti instructions. However,
since U-Boot is not an ordinary userspace application, there's no OS
kernel which has set up the required authentication keys, so these
instructions do nothing at all (even on arm64 hardware that does have
the pointer authentication capability). They do however make the image
larger.

It is theoretically possible for U-Boot to make use of the pointer
authentication protection - cf. the linux kernel's
CONFIG_ARM64_PTR_AUTH_KERNEL - but it is far from trivial, and it's
hard to see just what threat model it would protect against in a
bootloader context. Regardless, we certainly have none of the required
infrastructure now, so explicitly pass -mbranch-protection=none to
ensure those useless instructions do not get emitted.

For a toolchain not configured with
--enable-standard-branch-protection, this changes nothing. For the
Yocto toolchain, this reduces the size of both SPL and U-Boot proper
by about 3% for my imx8mp target.

If you don't have a Yocto toolchain, the effect can easily be
reproduced by applying this patch and changing =none to =standard.

Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-08-20 18:12:37 -04:00
Tom Rini
ff4e87c030 Convert CONFIG_SYS_FSL_QMAN_V3 et al to Kconfig
This converts the following to Kconfig:
   CONFIG_FSL_NGPIXIS
   CONFIG_SYS_FSL_QMAN_V3
   CONFIG_SYS_FSL_RAID_ENGINE
   CONFIG_SYS_FSL_RMU
   CONFIG_SYS_FSL_SINGLE_SOURCE_CLK
   CONFIG_SYS_FSL_SRIO_LIODN
   CONFIG_SYS_FSL_TBCLK_DIV
   CONFIG_SYS_FSL_USB1_PHY_ENABLE
   CONFIG_SYS_FSL_USB2_PHY_ENABLE
   CONFIG_SYS_FSL_USB_DUAL_PHY_ENABLE
   CONFIG_SYS_FSL_USB_INTERNAL_UTMI_PHY

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-08-12 16:10:49 -04:00
Tom Rini
1de46d91dd Convert CONFIG_SYS_FSL_NUM_CC_PLLS to Kconfig
This converts the following to Kconfig:
   CONFIG_SYS_FSL_NUM_CC_PLLS

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-08-12 16:10:49 -04:00
Tom Rini
d0748898d8 Convert CONFIG_SYS_FSL_DDR_MAIN_NUM_CTRLS et al to Kconfig
This converts the following to Kconfig:
   CONFIG_SYS_FSL_DDR_MAIN_NUM_CTRLS
   CONFIG_SYS_FSL_OTHER_DDR_NUM_CTRLS

And we remove the entries from the README for a number of already
converted items.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-08-12 16:10:49 -04:00
Simon Glass
4e4bf9449b common: Drop display_options.h from common header
Move this out of the common header and include it only where needed.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-08-10 13:46:55 -04:00
Tom Rini
923a855509 Convert CONFIG_SYS_FSL_CCSR_GUR_BE et al to Kconfig
This converts the following to Kconfig:
   CONFIG_SYS_FSL_CCSR_GUR_BE
   CONFIG_SYS_FSL_CCSR_SCFG_BE
   CONFIG_SYS_FSL_ESDHC_BE
   CONFIG_SYS_FSL_IFC_BE
   CONFIG_SYS_FSL_PEX_LUT_BE
   CONFIG_SYS_FSL_CCSR_GUR_LE
   CONFIG_SYS_FSL_CCSR_SCFG_LE
   CONFIG_SYS_FSL_ESDHC_LE
   CONFIG_SYS_FSL_IFC_LE
   CONFIG_SYS_FSL_PEX_LUT_LE

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-08-04 16:18:48 -04:00
Tom Rini
36b661dc91 Merge branch 'next' 2022-07-11 14:58:57 -04:00
Tom Rini
95cc3efcc1 arm: Remove strongarm support
There are no platforms using this architecture anymore, remove it.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-07-08 17:57:33 -04:00
Tom Rini
9ff4ce8abc nman external-symbol improvements
Driver model memory-usage reporting
 patman test-reporting improvements
 Add bloblist design goals
 -----BEGIN PGP SIGNATURE-----
 
 iQFFBAABCgAvFiEEslwAIq+Gp8wWVbYnfxc6PpAIreYFAmK7BHwRHHNqZ0BjaHJv
 bWl1bS5vcmcACgkQfxc6PpAIrealpwgAlCLCdEiSncV0t+Q9zvdtAQStvZdjD6CW
 VhpCS38pWUA0ckKYq/gmmlE2nW6i7pb4RdiOkpOhKdwFQI7SwbF2GdcU2yv08PMm
 qWHTRDaTm0SiGXUU462+A1Bj/aXPH86uEE9bCYu1FYtRrEtNf6aAeWF3pqNJv4fy
 CFB9OYyAfMEdywCtW2dCjS4y1FiI95Y2Jvg7lPGLVayHDyuavLSMKC8QEsVS4mR0
 91nNLhs6agko/H2i0QXle1lLjkvTIH3VR6dn/CMVjD+goJdDCk7rltHRXHejGun4
 n+a1W3EVv2sSQLwQJ0Kw5e2eBKdlM6Lpzhc0b0iJ2jKzBZeLXS+qBg==
 =2LZO
 -----END PGP SIGNATURE-----

Merge tag 'dm-pull-28jun22' of https://source.denx.de/u-boot/custodians/u-boot-dm into next

nman external-symbol improvements
Driver model memory-usage reporting
patman test-reporting improvements
Add bloblist design goals
2022-07-08 14:39:07 -04:00
Tom Rini
a457ebd786 arm: Remove PXA architecture support
With the last platform for this architecture removed, remove the rest of
the architecture support as well.

Cc: Marek Vasut <marex@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-07-07 09:29:08 -04:00
Tom Rini
b340199f82 spl: Ensure all SPL symbols in Kconfig have some SPL dependency
Tighten up symbol dependencies in a number of places.  Ensure that a SPL
specific option has at least a direct dependency on SPL.  In places
where it's clear that we depend on something more specific, use that
dependency instead.  This means in a very small number of places we can
drop redundant dependencies.

Reported-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
2022-07-07 09:29:08 -04:00
Tom Rini
540b73a7be arch/Kconfig.nxp: Re-organize slightly
Make all of the CHAIN_OF_TRUST options be under a single menu and add a
comment for the rest, so the resulting config file reads more clearly.
Remove duplicate CHAIN_OF_TRUST options from
board/congatec/common/Kconfig.  Remove duplicate NXP_ESBC config
questions and move to arch/Kconfig.nxp.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-07-05 17:04:01 -04:00
Tom Rini
2b2817b5c8 Convert CONFIG_ESBC_HDR_LS et al to Kconfig
This converts the following to Kconfig:
   CONFIG_ESBC_HDR_LS
   CONFIG_ESBC_ADDR_64BIT

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-07-05 17:03:02 -04:00
Tom Rini
1f7e2fc324 Convert CONFIG_DP_DDR_DIMM_SLOTS_PER_CTLR to Kconfig
This converts the following to Kconfig:
   CONFIG_DP_DDR_DIMM_SLOTS_PER_CTLR

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-07-05 17:03:01 -04:00
Tom Rini
de0a732915 Rename CONFIG_PWM to CONFIG_PWM_S5P and move to Kconfig
We rename the S5P specific "CONFIG_PWM" to CONFIG_PWM_S5P and move it to
Kconfig.  Given the usage of CONFIG_PWM_NX, we have that select this new
symbol.

Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2022-07-05 17:03:01 -04:00
Tom Rini
5858b90f50 spl: Move SPL_LDSCRIPT defaults to one place
We want to keep all of the default values for SPL_LDSCRIPT in the same
place both for overall clarity as well as not polluting unrelated config
files.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-06-28 17:03:31 -04:00
Peng Fan
e87da5704f armv8: u-boot-spl.lds: mark __image_copy_start as symbol
In arch/arm/lib/sections.c there is below code:
char __image_copy_start[0] __section(".__image_copy_start");
But actually 'objdump -t spl/u-boot-spl' not able to find out
symbol '__image_copy_start' for binman update image-pos/size.

So update link file

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
2022-06-28 03:09:52 +01:00
Loic Poulain
0fcc1c76d1 armv8 SHA-256 using ARMv8 Crypto Extensions
This patch adds support for the SHA-256 Secure Hash Algorithm for CPUs
that have support for the SHA-256 part of the ARM v8 Crypto Extensions.

It greatly improves sha-256 based operations, about 17x faster on iMX8M
evk board. ~12ms vs ~208ms for a 20MiB kernel sha-256 verification.

asm implementation is a simplified version of the Linux version (from
Ard Biesheuvel).

Signed-off-by: Loic Poulain <loic.poulain@linaro.org>
2022-06-27 13:36:28 -04:00
Loic Poulain
084d8e6bf9 armv8 SHA-1 using ARMv8 Crypto Extensions:
This patch adds support for the SHA-1 Secure Hash Algorithm for CPUs
that have support for the SHA-1 part of the ARM v8 Crypto Extensions.

It greatly improves sha-1 based operations, about 10x faster on iMX8M
evk board. ~12ms vs ~165ms for a 20MiB kernel sha-1 verification.

asm implementation is a simplified version of the Linux version (from
Ard Biesheuvel).

Signed-off-by: Loic Poulain <loic.poulain@linaro.org>
2022-06-27 13:36:28 -04:00
qianfan Zhao
47ca7b574f sunxi: psci: Fix sunxi_power_switch on sun8i-r40 platform
linux system will die if we offline one of the cpu on R40 based board:
eg: echo 0 > /sys/devices/system/cpu/cpu3/online

The reason is that the R40 version of sunxi_cpu_set_power always passes
0 for the CPU number, so we turn off CPU0, regardless of what CPU the
CPU_OFF request came for.

Fix this by passing the proper CPU number, as there are proper power
clamp registers for every of the four cores.

Signed-off-by: qianfan Zhao <qianfanguijin@163.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-06-26 11:22:54 +01:00
Andrew Scull
99e2fbcb69 linker_lists: Rename sections to remove . prefix
Rename the sections used to implement linker lists so they begin with
'__u_boot_list' rather than '.u_boot_list'. The double underscore at the
start is still distinct from the single underscore used by the symbol
names.

Having a '.' in the section names conflicts with clang's ASAN
instrumentation which tries to add redzones between the linker list
elements, causing expected accesses to fail. However, clang doesn't try
to add redzones to user sections, which are names with all alphanumeric
and underscore characters.

Signed-off-by: Andrew Scull <ascull@google.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-06-23 12:58:18 -04:00
Tom Rini
52af0101be Merge branch 'master' into next
Merge in v2022.07-rc5.
2022-06-20 14:40:59 -04:00
Tom Rini
2f7821a927 - Add STM32MP13 SoCs support with associated board STM32M135F-DK
- Correct livetree support in stm32mp1 boards
 - Activate livetree for stm32mp15 DHSOM boards
 -----BEGIN PGP SIGNATURE-----
 
 iQEzBAABCgAdFiEE56Yx6b9SnloYCWtD4rK92eCqk3UFAmKsehgACgkQ4rK92eCq
 k3UexAf+JThCd7FlN3OkTVKIdZKeNm2KpQxrqt20whiqp/nSUzxXrjdlCTKZEER2
 lLJoVnwr+bkmdlqsa6gAZXSsd0lUv37XnLsLA5or278tFNlKp6gzYrz49FR59mVC
 ie7/NlY5FgM5qmKGCob7tjwJ78r2/S3T2EaLiAMWUmw2UB5KZU6h3napHZ+1T0se
 vaEAVRzAaZeYzKU3k6RBSv2tXQ6ssvfpp9RcXpRGtrN908AqDhHiOfntuOrnsEe0
 9rjY1DSXO9a5WqHRm2KQ3FrA/By2layQ+4WH/HgIPHasisnmo3E/euVWmhtTaiT/
 g5bOLwyFQ2/RvdMlMxXlKUcuMfNwRA==
 =Hhzj
 -----END PGP SIGNATURE-----

Merge tag 'u-boot-stm32-20220620' of https://source.denx.de/u-boot/custodians/u-boot-stm into next

- Add STM32MP13 SoCs support with associated board STM32M135F-DK
- Correct livetree support in stm32mp1 boards
- Activate livetree for stm32mp15 DHSOM boards
2022-06-20 08:09:24 -04:00
Sean Anderson
bcb3dae325 ARM: layerscape: Use ARCH_LS104?A insead of TARGET_LS104?ARDB
These frequency calculations depend on the RCW format, which is not
dependent on any particular board. Switch to using ARCH symbols instead
of TARGET.

This whole function could probably use less ifdefs, but for now just do
a minimal conversion.

Fixes: 24cb6f2295 ("fsl-layerscape: Add fsl_esdhc peripheral clock support")
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
2022-06-20 09:18:26 +08:00
Patrick Delaunay
eae488b779 stm32mp1: fix reference for STMicroelectronics
Replace reference to the correct name STMicroelectronics

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2022-06-17 14:12:27 +02:00
Andre Przywara
ce9c579e2b armv8: always use current exception level for TCR_ELx access
Currently get_tcr() takes an "el" parameter, to select the proper
version of the TCR_ELx system register.
This is problematic in case of the Apple M1, since it runs with
HCR_EL2.E2H fixed to 1, so TCR_EL2 is actually using the TCR_EL1 layout,
and we get the wrong version.

For U-Boot's purposes the only sensible choice here is the current
exception level, and indeed most callers treat it like that, so let's
remove that parameter and read the current EL inside the function.
This allows us to check for the E2H bit, and pretend it's EL1 in this
case.

There are two callers which don't care about the EL, and they pass 0,
which looks wrong, but is irrelevant in these two cases, since we don't
use the return value there. So the change cannot affect those two.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Mark Kettenis <kettenis@openbsd.org>
Tested-by: Mark Kettenis <kettenis@openbsd.org>
2022-06-16 15:22:55 -04:00
Tom Rini
eaf6ea6a1d Migrate CUSTOM_SYS_INIT_SP_ADDR to Kconfig using system-constants.h
- Make all users of CUSTOM_SYS_INIT_SP_ADDR reference SYS_INIT_SP_ADDR
- Introduce HAS_CUSTOM_SYS_INIT_SP_ADDR to allow for setting the stack
  pointer directly, otherwise we use the common calculation.
- On some platforms that were using the standard calculation but did not
  set CONFIG_SYS_INIT_RAM_SIZE / CONFIG_SYS_INIT_RAM_ADDR, set them.
- On a small number of platforms that were not subtracting
  GENERATED_GBL_DATA_SIZE do so now via the standard calculation.
- CONFIG_SYS_INIT_SP_OFFSET is now widely unused, so remove it from most
  board config header files.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-06-06 12:09:19 -04:00
Tom Rini
3135ba642f arm: pxa: Remove CONFIG_CPU_PXA25X
There are no platforms that set this, remove the code.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-06-06 12:09:12 -04:00
Ye Li
cda8f87349 caam: Fix crash in case caam_jr_probe failed
If probing caam_jr returns failure, the variable "dev" will not be
initialized, so we can't use dev->name for the error print.
Otherwise it will cause crash.

Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Gaurav Jain <gaurav.jain@nxp.com>
2022-05-20 12:36:47 +02:00
Stephen Carlson
3b06577ab4 armv8/fsl-lsch3: Suppress spurious warning on Layerscape CPUs
NXP/Freescale Layerscape CPUs support high-speed serial interfaces (SERDES)
that can be configured for the application. Interfaces not used by the
application can be set to protocol 0 to turn them off and save power, but
U-Boot would emit a warning that 0 was invalid for a SERDES protocol on
boot. Replace the warning text with a notice that the SERDES is disabled.

Signed-off-by: Stephen Carlson <stcarlso@linux.microsoft.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2022-04-26 17:13:57 +05:30
Yuantian Tang
aaaa1be8f0 armv8: layerscape: fix the function mismatch issue
Signed-off-by: Yuantian Tang <andy.tang@nxp.com>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2022-04-26 17:13:57 +05:30
Michael Walle
49bb245f1d armv8: psci: add ARMV8_PSCI_RELOCATE Kconfig option
There is an user-selectable SYS_HAS_ARMV8_SECURE_BASE, which has the
same meaning but is just for the ls1043ardb board. As no in-tree config
uses this, drop it and replace it with something more sophiticated:
ARMV8_PSCI_RELOCATE. This option will then enable the ARMV8_SECURE_BASE
option which is used as the base to relocate the PSCI code (or any code
in the secure region, but that is only PSCI). A SoC (or board) can now
opt-in into having such a secure region by enabling
SYS_HAS_ARMV8_SECURE_BASE. Enable it for the LS1043A SoC, where it was
possible to relocate the PSCI code before as well as on the LS1028A SoC
where there will be PSCI support soon.

Additionally, make ARMV8_PSCI and SEC_FIRMWARE_ARMV8_PSCI exclusive.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2022-04-26 17:13:57 +05:30
Michael Walle
de58ac49a5 armv8: psci: skip setup code if we are not EL3
If we are running in EL2 skip PSCI implementation setup. This avoids an
exception if CONFIG_ARMV8_PSCI is set, but u-boot is started by TF-A.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2022-04-26 17:13:57 +05:30
Michael Walle
cb14cc8867 armv8: layerscape: get rid of smc_call()
There are two different implementations to do a secure monitor call:
smc_call() and arm_smccc_smc(). The former is defined in fwcall.c and
seems to be an ad-hoc implementation. The latter is imported from linux.

smc_call() is also only available if CONFIG_ARMV8_PSCI is not defined.
This makes it impossible to have both PSCI calls and PSCI implementation
in one u-boot build. The layerscape SoC code decide at runtime via
check_psci() if there is a PSCI support. Therefore, this is a
prerequisite patch to add PSCI implementation support for the layerscape
SoCs.

Note, for the TFA part, this is only compile time tested with
(ls1028ardb_tfa_defconfig).

Signed-off-by: Michael Walle <michael@walle.cc>
[Rebased]
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
2022-04-26 17:13:57 +05:30
Michael Walle
eb217200ef armv8: include psci_update_dt() unconditionally
psci_update_dt() is also required if CONFIG_ARMV8_PSCI is set, that is,
if u-boot is the PSCI provider.
Guard the check which is intended to call into the PSCI implementation
in the secure firmware, by the proper macro SEC_FIRMWARE_ARMV8_PSCI.

Mark the function as weak because - unfortunately - there is already
a stub of the same function in arch/arm/mach-rmobile/psci-r8a779a0.c
which does not the same as the common one.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2022-04-26 17:13:57 +05:30
Sean Anderson
881284b36a arm: layerscape: Disable erratum A009007 on LS1021A, LS1043A, and LS1046A
This erratum is reported to cause problems on these processors [1-3].
The problem is usually with the clocking, which is supposed to be
configured by the RCW [4]. However, if it is not set, or if the default
clocking is not correct, then this erratum will cause an SError.
However, according to Ran Wang in [1]:
" ... this erratum is used to pass USB compliance test only, you could
 disable this workaround on your board if you don't any USB issue on
 normal use case, I think it's fine."

So just disable this erratum by default for these processors.

[1] https://lore.kernel.org/all/761ddd61-05c1-d9b8-ac90-b8f425afde6c@denx.de/
[2] https://community.nxp.com/t5/Layerscape/LS1046A-U-BOOT-HALT-AT-ERRATUM-A0090078/m-p/742993
[3] https://community.nxp.com/t5/QorIQ/Why-does-the-LS1043A-U-Boot-hang-at-code-that-fixes-erratum/m-p/644412
[4] https://source.codeaurora.org/external/qoriq/qoriq-components/rcw/tree/ls1046ardb/usb_phy_freq.rcw

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Acked-by: Ran Wang <ran.wang_1@nxp.com>
[Rebased]
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
2022-04-26 17:12:32 +05:30
Sean Anderson
9c18c695f8 armv8: fsl-layerscape: Respect Kconfig for erratum A009007
There is a Kconfig for this erratum, but it is ignored for armv8.
Respect it.

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2022-04-25 12:50:39 +05:30
Peng Fan
151a030063 arm: set cntfrq_el0 if CONFIG_COUNTER_FREQUENCY is valid
Since COUNTER_FREQUENCY is obselete, so set cntfrq_el0 if
CONFIG_COUNTER_FREQUENCY is valid

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@vrull.eu>
2022-04-21 15:27:18 -04:00
Peng Fan
c5b9bf5518 include/configs: drop COUNTER_FREQUENCY
Since we have CONFIG_COUNTER_FREQUENCY enabled, no need COUNTER_FREQUENCY

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-04-21 15:27:17 -04:00
Tom Rini
e50f66e364 Merge https://source.denx.de/u-boot/custodians/u-boot-marvell
- mrvl_uart.sh: Remove script (Pali)
- Fix Espressobin build for configs where ENV is not in SPI (Rogier)
- mvebu: a37xx: Add support for reading OTP (Pali)
- mvebu: uDPU: Ethernet fixes and misc DT and defconfig changes (Robert)
- mvebu: Add support for reading LD0 and LD1 eFuse (Pali)
- kwboot: Replace fstat()+st_size by lseek()+SEEK_END (Pali)
- mvebu: turris_omnia: Enable CONFIG_CMD_FUSE (Pali)
- arm: Add CONFIG_SPL_SYS_NO_VECTOR_TABLE used on 32bit MVEBU (Pali)
- mvebu: a37xx: Add support for writing Security OTP values (Pali)
- mvebu: turris: Misc enhancements and cleanups / fixes (Pali)
- Sheevaplug : Use Marvell uclass mvgbe and PHY driver for Ethernet (Tony)
2022-04-21 11:44:54 -04:00
Marek Vasut
dfb6da55e3 armv8: layerscape: env: Switch to arch_env_get_location()
Implement arch_env_get_location() instead of env_get_location(), so that
the env_get_location() can be implemented on board level and override the
arch_env_get_location() architecture defaults.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Adam Ford <aford173@gmail.com>
Cc: Fabio Estevam <festevam@denx.de>
Cc: Marek Behún <marek.behun@nic.cz>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Tim Harvey <tharvey@gateworks.com>
Cc: Tom Rini <trini@konsulko.com>
Cc: Tommaso Merciai <tomm.merciai@gmail.com>
Cc: Vladimir Oltean <vladimir.oltean@nxp.com>
2022-04-21 09:08:41 -04:00
Pali Rohár
372779abc3 arm: Introduce new CONFIG_SPL_SYS_NO_VECTOR_TABLE option
Move OMAP4 specific option for disabling overwriting vector table into
config option CONFIG_SPL_SYS_NO_VECTOR_TABLE.

Signed-off-by: Pali Rohár <pali@kernel.org>
2022-04-21 12:31:36 +02:00
Gaurav Jain
8976556a8a Layerscape: Enable Job ring driver model.
LS(1021/1012/1028/1043/1046/1088/2088), LX2160, LX2162
platforms are enabled with JR driver model.

removed sec_init() call from board files.
sec is initialized based on job ring information processed
from device tree.

Signed-off-by: Gaurav Jain <gaurav.jain@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Reviewed-by: Michael Walle <michael@walle.cc>
2022-04-12 11:20:01 +02:00
Tom Rini
2fc0995cc0 arm: Remove unused ep93xx code
There are no platforms for this architecture anymore, remove unused
code.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-04-08 10:46:22 -04:00
Tom Rini
6751b70055 arm: fsl-layerscape: Migrate more DP-DDR options to Kconfig
Based on current usage, migrate a number of DP-DDR related options to
Kconfig.

Cc: Priyanka Jain <priyanka.jain@nxp.com>
Cc: Rajesh Bhagat <rajesh.bhagat@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2022-04-08 10:46:22 -04:00
Sean Anderson
53b953f2eb arm64: ls1046a: Support semihosting fallback
Use the semihosting_enabled function to determine whether or not to
enable semihosting devices. This allows for graceful fallback in the
event a debugger is not attached.

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
2022-04-01 16:56:54 -04:00
Sean Anderson
e75d791c50 arm64: Save spsr in pt_regs
This register holds "pstate" which includes (among other things) the
instruction mode the CPU was in when the exception was taken. This is
necessary to correctly interpret instructions at elr.

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
2022-04-01 16:56:53 -04:00
Sean Anderson
e97ac4780d arm64: Save esr in pt_regs
To avoid passing around an extra register everywhere, save esr in
pt_regs like the rest. For proper alignment we need to have a second
(unused) register. All the printfs have to be adjusted, since
it's now an unsigned long and not an int.

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
2022-04-01 16:56:53 -04:00
Sean Anderson
93c3d32970 ls1046ardb: Add support for JTAG boot
This adds support for booting entirely from JTAG while using a
hard-coded RCW. With these steps, it is not necessary to program a
"good" RCW using CodeWarrior. The method here can be performed with any
JTAG adapter supported by OpenOCD, including the on-board CMSIS-DAP
(albeit very slowly).

These steps require LS1046A support in OpenOCD, which was added in [1].

[1] 5b70c1f679/

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
[trini: Add reference to doc/board/nxp/ls1046ardb.rst]
2022-04-01 16:56:44 -04:00
Simon Glass
77f46f0607 video: fsl: colibri_vf: Drop FSL DCU driver
This does not use driver model and is more than two years past the
migration date. Drop it.

It can be added back later if needed.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-03-28 20:18:07 +02:00