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ARM: layerscape: Use ARCH_LS104?A insead of TARGET_LS104?ARDB
These frequency calculations depend on the RCW format, which is not
dependent on any particular board. Switch to using ARCH symbols instead
of TARGET.
This whole function could probably use less ifdefs, but for now just do
a minimal conversion.
Fixes: 24cb6f2295
("fsl-layerscape: Add fsl_esdhc peripheral clock support")
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
This commit is contained in:
parent
7041601141
commit
bcb3dae325
1 changed files with 5 additions and 5 deletions
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@ -29,8 +29,8 @@ void get_sys_info(struct sys_info *sys_info)
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* mux 2 clock for LS1043A/LS1046A.
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*/
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#if defined(CONFIG_SYS_DPAA_FMAN) || \
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defined(CONFIG_TARGET_LS1046ARDB) || \
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defined(CONFIG_TARGET_LS1043ARDB)
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defined(CONFIG_ARCH_LS1046A) || \
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defined(CONFIG_ARCH_LS1043A)
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u32 rcw_tmp;
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#endif
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struct ccsr_clk *clk = (void *)(CONFIG_SYS_FSL_CLK_ADDR);
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@ -129,13 +129,13 @@ void get_sys_info(struct sys_info *sys_info)
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#define HWA_CGA_M2_CLK_SEL 0x00000007
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#define HWA_CGA_M2_CLK_SHIFT 0
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#if defined(CONFIG_TARGET_LS1046ARDB) || defined(CONFIG_TARGET_LS1043ARDB)
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#if defined(CONFIG_ARCH_LS1046A) || defined(CONFIG_ARCH_LS1043A)
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rcw_tmp = in_be32(&gur->rcwsr[15]);
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switch ((rcw_tmp & HWA_CGA_M2_CLK_SEL) >> HWA_CGA_M2_CLK_SHIFT) {
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case 1:
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sys_info->freq_cga_m2 = freq_c_pll[1];
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break;
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#if defined(CONFIG_TARGET_LS1046ARDB)
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#if defined(CONFIG_ARCH_LS1046A)
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case 2:
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sys_info->freq_cga_m2 = freq_c_pll[1] / 2;
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break;
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@ -143,7 +143,7 @@ void get_sys_info(struct sys_info *sys_info)
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case 3:
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sys_info->freq_cga_m2 = freq_c_pll[1] / 3;
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break;
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#if defined(CONFIG_TARGET_LS1046ARDB)
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#if defined(CONFIG_ARCH_LS1046A)
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case 6:
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sys_info->freq_cga_m2 = freq_c_pll[0] / 2;
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break;
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