Changes from rc2 tag
- Support PCIe Gen4 driver of the Mobiveil IP
- NXP LS1028A SoC and platform support
- Few SPI related config updates
- Distinguish the ecc val by chassis version and move the ecc addr to dts
- sp805 watchdog support
commit 58c3e62040 ("armv8: lx2160ardb : Add support for LX2160ARDB
platform") brought a new boards support with redundancy in the config.h.
One of them is CONFIG_CMDLINE_EDITING which is removed by this change.
Cc: Priyanka Jain <priyanka.jain@nxp.com>
Cc: Peng Ma <peng.ma@nxp.com>
Cc: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
sp805 is watchdog on some NXP layerscape SoCs, adding
it's driver. Configs CONFIG_WDT_SP805, CONFIG_WDT, CONFIG_CMD_WDT
needs to be enabled to use it.
Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
ENVL_NOWHERE is dependent on CONFIG_ENV_IS_NOWHERE and not on
CONFIG_CHAIN_OF_TRUST so return ENVL_NOWHERE when CONFIG_ENV_IS_NOWHERE
is enabled
Signed-off-by: Udit Agarwal <udit.agarwal@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
esbc_validate command will not be executed if “load” command for its
header fails and will further execute the source command for bootscript,
without its validation and boot process continues.
To halt the boot process in case secure boot header is not loaded
successfully, esbc_validate command is invoked separately after “load”
command. The secure boot validation of the bootscript header will fail
(if header is not loaded) and halts the boot process, which prevent source
command from execution.
Signed-off-by: Vinitha V Pillai <vinitha.pillai@nxp.com>
Signed-off-by: Udit Agarwal <udit.agarwal@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Distinguish the ecc val by chassis version and move the ecc addr to dts.
Add ls1028a soc support.
Signed-off-by: Peng Ma <peng.ma@nxp.com>
Reviewed-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
LS1028A is an ARMv8 implementation. LS1028ARDB is an evaluation
platform that supports the LS1028A family SoCs. This patch add basic
support of the platform.
Signed-off-by: Sudhanshu Gupta <sudhanshu.gupta@nxp.com>
Signed-off-by: Rai Harninder <harninder.rai@nxp.com>
Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
Signed-off-by: Bhaskar Upadhaya <Bhaskar.Upadhaya@nxp.com>
Signed-off-by: Tang Yuantian <andy.tang@nxp.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Add the infrastructure for Layerscape SoCs PCIe Gen4 controller
to update device tree nodes to convey SMMU stream IDs in the
device tree.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
The LX2160A PCIe is using driver PCIE_LAYERSCAPE_GEN4 instead
of PCIE_LAYERSCAPE.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Add PCIe Gen4 driver for the NXP Layerscape SoCs. This PCIe
controller is based on the Mobiveil IP, which is compatible
with the PCI Express™ Base Specification, Revision 4.0.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Signed-off-by: Bao Xiaowei <Xiaowei.Bao@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
The lx2160a have up to 6 PCIe controllers and have different
address and size of PCIe region.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
The LS2080A has 8GB region for each PCIe controller, while the
other platforms have 32GB.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Change to use PCIe address macro to determine if precompile the PCIe
MMU table entry.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Update mtd-id for QSPI nor due to change introduced in mtd/spi in
linux 5.0. commit 84d043185dbe
("spi: Add a driver for the Freescale/NXP QuadSPI controller")
This modification is only for linux kernel version >= 5.0. To use
bootargs for kernel < 5.0, use the following bootargs
CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0
earlycon=uart8250,mmio,0x21c0500
mtdparts=1550000.quadspi:2m(uboot),14m(free)"
CONFIG_MTDPARTS_DEFAULT="mtdparts=1550000.quadspi:2m(uboot),14m(free)"
Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
It was returning an int, which doesn't work if the u32 it is reading,
or the default value, will overflow a signed int.
While it could be made to work, when using a C standard/compiler where
casting negative signed values to unsigned has a defined behavior,
combined with careful casting, it seems obvious one is meant to use
ofnode_read_s32_default() with signed values.
Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Trent Piepho <tpiepho@impinj.com>
The 'done' files created by buildman may end up being empty if buildman
runs out of disk space while writing them. At present buildman dies with
an exception when using -s to check the build status. Fix this.
Seriesl-cc: trini
Signed-off-by: Simon Glass <sjg@chromium.org>
Add ofnode_get_addr_size_index function to fetch the address
and size of the reg space based on index.
Signed-off-by: Keerthy <j-keerthy@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
When using fdt_fixup_mtdparts() offset and length cell sizes
are limited to 4 bytes (1 cell). However if the mtd device is
bigger then 4GiB, then #address-cells and #size-cells are
8 bytes (2 cells) [1].
This patch read #size-cells and uses either fdt32_t or
fdt64_t cell size. The default is fdt32_t.
[1] Documentation/devicetree/bindings/mtd/partition.txt
Signed-off-by: Stefan Mavrodiev <stefan@olimex.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
U-Boot already defines the {upper,lower}_32_bits() macros that have the
same purpose. Use the existing macros instead of defining new APIs.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Some libraries build by U-Boot may include stdint.h. This is not used by
U-Boot itself and causes conflicts with the types defined in
linux/types.h. To work around this, add an empty file with this name so
that it will be used in preference to the compiler version.
Signed-off-by: Simon Glass <sjg@chromium.org>
In some cases it is necessary to read the keyboard in early phases of
U-Boot. The cros_ec keyboard is kept in the misc directory. Update the
config to allow this.
Signed-off-by: Simon Glass <sjg@chromium.org>
when loading the splash image from a FIT
- updates for loading internal and external splash data from FIT
- DM_GPIO/DM_VIDEO migration for mx53 cx9020 board
- fix boot issue on mx6sabresd board after DM_VIDEO migration
- increase the max preallocated framebuffer BPP to 32 in ipuv3
driver to prepare for configurations with higher color depth
- allow to use vidconsole_put_string() in board code for text
output on LCD displays
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Merge tag 'video-for-2019.07-rc3' of git://git.denx.de/u-boot-video
- update for using splashfile instead of location->name
when loading the splash image from a FIT
- updates for loading internal and external splash data from FIT
- DM_GPIO/DM_VIDEO migration for mx53 cx9020 board
- fix boot issue on mx6sabresd board after DM_VIDEO migration
- increase the max preallocated framebuffer BPP to 32 in ipuv3
driver to prepare for configurations with higher color depth
- allow to use vidconsole_put_string() in board code for text
output on LCD displays
The gdsys gazerbeam board is based on a Freescale MPC8308 SOC.
It boots from NOR-Flash, kernel and rootfs are stored on
SD-Card.
On board peripherals include:
- 2x 10/100 Mbit/s Ethernet (optional)
Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc>
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Add a U-Boot specific dts file, which encapsulates the needed
modifications to the Gazerbeam Linux device tree.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
The single channel detection in the gazerbeam board driver was not
implemented correctly.
Fix the detection.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Replace the boolean parameter of io_check_status that controls whether
the status is printed or not with a documenting enum.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
More recent versions of IHS FPGAs feature a different memory layout.
Add a Kconfig option to differentiate between the legacy layout, and the
new layout (which is used on the upcoming "Gazerbeam" and later boards).
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Future gdsys boards will switch from the legacy drivers in board/gdsys/common
to DM-based drivers.
Define a Kconfig option that disables the legacy drivers.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
The "manual" RAM configuration should not be used if the DM RAM driver
is active, hence, disable the code if the CONFIG_MPC83XX_SDRAM config
variable is defined.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Move CONFIG_SYS_FPGA0_BASE, CONFIG_SYS_FPGA0_SIZE, CONFIG_SYS_FPGA1_BASE, and
CONFIG_SYS_FPGA1_SIZE to Kconfig.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
