mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-10 07:04:28 +00:00
mpc83xx: Add gazerbeam board
The gdsys gazerbeam board is based on a Freescale MPC8308 SOC. It boots from NOR-Flash, kernel and rootfs are stored on SD-Card. On board peripherals include: - 2x 10/100 Mbit/s Ethernet (optional) Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc> Signed-off-by: Mario Six <mario.six@gdsys.cc>
This commit is contained in:
Dirk Eibach
Mario Six
parent
d85c385332
commit
d494cdb97e
9 changed files with 564 additions and 2 deletions
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@ -175,6 +175,25 @@ config TARGET_STRIDER
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select SYS_FSL_ERRATUM_ESDHC111
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imply CMD_PCA953X
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config TARGET_GAZERBEAM
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bool "Support gazerbeam"
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select ARCH_MPC8308
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select SYS_FSL_ERRATUM_ESDHC111
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imply ENV_IS_IN_FLASH
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help
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The "Gazerbeam" is a modular system by Guntermann & Drunck GmbH
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Systementwicklung based on the NXP MPC8308 SoC for usage in KVM
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appliances.
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Features include:
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* Two gigabit ethernet ports
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* Multiple USB ports (depending on variant)
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* Several gigabit ethernet or optical fiber ports (depending on
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variant)
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* Several display port inputs and outputs, and supporting redrivers
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(depending on variant)
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* Several FPGAs with custom logic (depending on variant)
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endchoice
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config MPC83XX_QUICC_ENGINE
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@ -10,7 +10,7 @@
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* option) any later version.
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*/
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/include/ "gdsys/mpc8308.dtsi"
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#include "gdsys/mpc8308.dtsi"
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/include/ "gdsys/gazerbeam-base.dtsi"
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@ -11,6 +11,7 @@ obj-$(CONFIG_TARGET_STRIDER) += mclink.o dp501.o phy.o ioep-fpga.o adv7611.o ch7
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obj-$(CONFIG_TARGET_STRIDER) += fanctrl.o
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obj-$(CONFIG_STRIDER_CON) += osd.o
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obj-$(CONFIG_STRIDER_CON_DP) += osd.o
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obj-$(CONFIG_TARGET_GAZERBEAM) += osd.o ihs_mdio.o ioep-fpga.o
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ifdef CONFIG_OSD
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obj-$(CONFIG_GDSYS_LEGACY_OSD_CMDS) += osd_cmd.o
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@ -71,7 +71,28 @@ config GDSYS_LEGACY_DRIVERS
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endif
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if TARGET_HRCON || TARGET_STRIDER
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if TARGET_GAZERBEAM
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config SYS_BOARD
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default "mpc8308"
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config SYS_VENDOR
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default "gdsys"
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config SYS_CONFIG_NAME
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default "gazerbeam"
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config SYS_FPGA1_BASE
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default E0700000
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config SYS_FPGA1_SIZE
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default 1
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config GDSYS_LEGACY_OSD_CMDS
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default y
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endif
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if TARGET_HRCON || TARGET_STRIDER || TARGET_GAZERBEAM
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choice
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prompt "FPGA flavor selection"
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@ -89,6 +110,12 @@ config SYS_FPGA_FLAVOR_GAZERBEAM
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endchoice
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config EXTENDED_FEATURES
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bool "FPGA extended features"
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depends on GDSYS_LEGACY_DRIVERS
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help
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Enable support for the extended features field of the IHS FPGA.
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config CMD_IOLOOP
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bool "Enable 'ioloop' and 'ioreflect' commands"
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help
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@ -6,7 +6,9 @@ F: include/configs/hrcon.h
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F: configs/hrcon_defconfig
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F: configs/hrcon_dh_defconfig
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F: include/configs/strider.h
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F: configs/strider_defconfig
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F: configs/strider_cpu_defconfig
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F: configs/strider_cpu_dp_defconfig
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F: configs/strider_con_defconfig
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F: configs/strider_con_dp_defconfig
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F: configs/gazerbeam_defconfig
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@ -6,3 +6,4 @@
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obj-y := mpc8308.o sdram.o
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obj-$(CONFIG_TARGET_HRCON) += hrcon.o
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obj-$(CONFIG_TARGET_STRIDER) += strider.o
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obj-$(CONFIG_TARGET_GAZERBEAM) += gazerbeam.o
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179
board/gdsys/mpc8308/gazerbeam.c
Normal file
179
board/gdsys/mpc8308/gazerbeam.c
Normal file
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@ -0,0 +1,179 @@
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/*
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* (C) Copyright 2015
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* Dirk Eibach, Guntermann & Drunck GmbH, eibach@gdsys.de
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <board.h>
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#include <dm.h>
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#include <fdt_support.h>
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#include <fsl_esdhc.h>
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#include <miiphy.h>
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#include <misc.h>
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#include <tpm-v1.h>
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#include <video_osd.h>
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#include "../common/ihs_mdio.h"
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#include "../../../drivers/board/gazerbeam.h"
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DECLARE_GLOBAL_DATA_PTR;
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struct ihs_mdio_info ihs_mdio_info[] = {
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{ .fpga = NULL, .name = "ihs0", .base = 0x58 },
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{ .fpga = NULL, .name = "ihs1", .base = 0x58 },
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};
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static int get_tpm(struct udevice **devp)
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{
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int rc;
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rc = uclass_first_device_err(UCLASS_TPM, devp);
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if (rc) {
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printf("Could not find TPM (ret=%d)\n", rc);
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return CMD_RET_FAILURE;
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}
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return 0;
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}
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int board_early_init_r(void)
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{
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struct udevice *board;
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struct udevice *serdes;
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int mc = 0;
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int con = 0;
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if (board_get(&board))
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puts("Could not find board information device.\n");
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/* Initialize serdes */
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uclass_get_device_by_phandle(UCLASS_MISC, board, "serdes", &serdes);
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if (board_detect(board))
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puts("Device information detection failed.\n");
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board_get_int(board, BOARD_MULTICHANNEL, &mc);
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board_get_int(board, BOARD_VARIANT, &con);
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if (mc == 2 || mc == 1)
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dev_disable_by_path("/immr@e0000000/i2c@3100/pca9698@22");
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if (mc == 4) {
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dev_disable_by_path("/immr@e0000000/i2c@3100/pca9698@20");
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dev_enable_by_path("/localbus@e0005000/iocon_uart@2,0");
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dev_enable_by_path("/fpga1bus");
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}
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if (mc == 2 || con == VAR_CON) {
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dev_enable_by_path("/fpga0bus/fpga0_video1");
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dev_enable_by_path("/fpga0bus/fpga0_iic_video1");
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dev_enable_by_path("/fpga0bus/fpga0_axi_video1");
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}
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if (con == VAR_CON) {
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dev_enable_by_path("/fpga0bus/fpga0_video0");
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dev_enable_by_path("/fpga0bus/fpga0_iic_video0");
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dev_enable_by_path("/fpga0bus/fpga0_axi_video0");
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}
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return 0;
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}
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int checkboard(void)
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{
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struct udevice *board;
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char *s = env_get("serial#");
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int mc = 0;
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int con = 0;
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if (board_get(&board))
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puts("Could not find board information device.\n");
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board_get_int(board, BOARD_MULTICHANNEL, &mc);
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board_get_int(board, BOARD_VARIANT, &con);
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puts("Board: Gazerbeam ");
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printf("%s ", mc == 4 ? "MC4" : mc == 2 ? "MC2" : "SC");
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printf("%s", con == VAR_CON ? "CON" : "CPU");
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if (s) {
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puts(", serial# ");
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puts(s);
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}
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puts("\n");
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return 0;
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}
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static void display_osd_info(struct udevice *osd,
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struct video_osd_info *osd_info)
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{
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printf("OSD-%s: Digital-OSD version %01d.%02d, %d x %d characters\n",
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osd->name, osd_info->major_version, osd_info->minor_version,
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osd_info->width, osd_info->height);
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}
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int last_stage_init(void)
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{
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int fpga_hw_rev = 0;
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int i;
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struct udevice *board;
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struct udevice *osd;
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struct video_osd_info osd_info;
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struct udevice *tpm;
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int ret;
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if (board_get(&board))
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puts("Could not find board information device.\n");
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if (board) {
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int res = board_get_int(board, BOARD_HWVERSION, &fpga_hw_rev);
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if (res)
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printf("Could not determind FPGA HW revision (res = %d)\n", res);
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}
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env_set_ulong("fpga_hw_rev", fpga_hw_rev);
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ret = get_tpm(&tpm);
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if (ret || tpm_init(tpm) || tpm_startup(tpm, TPM_ST_CLEAR) ||
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tpm_continue_self_test(tpm)) {
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printf("TPM init failed\n");
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}
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if (fpga_hw_rev >= 4) {
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for (i = 0; i < 4; i++) {
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struct udevice *rxaui;
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char name[8];
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snprintf(name, sizeof(name), "rxaui%d", i);
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/* Disable RXAUI polarity inversion */
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ret = uclass_get_device_by_phandle(UCLASS_MISC, board, name, &rxaui);
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if (!ret)
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misc_set_enabled(rxaui, false);
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}
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}
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for (uclass_first_device(UCLASS_VIDEO_OSD, &osd);
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osd;
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uclass_next_device(&osd)) {
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video_osd_get_info(osd, &osd_info);
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display_osd_info(osd, &osd_info);
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}
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return 0;
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}
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#if defined(CONFIG_OF_BOARD_SETUP)
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int ft_board_setup(void *blob, bd_t *bd)
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{
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ft_cpu_setup(blob, bd);
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fsl_fdt_fixup_dr_usb(blob, bd);
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fdt_fixup_esdhc(blob, bd);
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return 0;
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}
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#endif
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196
configs/gazerbeam_defconfig
Normal file
196
configs/gazerbeam_defconfig
Normal file
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@ -0,0 +1,196 @@
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CONFIG_PPC=y
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CONFIG_SYS_TEXT_BASE=0xFE000000
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CONFIG_SYS_MALLOC_F_LEN=0x600
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CONFIG_IDENT_STRING=" gazerbeam 0.01"
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CONFIG_SYS_CLK_FREQ=33333333
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CONFIG_MPC83xx=y
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CONFIG_TARGET_GAZERBEAM=y
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CONFIG_SYSTEM_PLL_VCO_DIV_2=y
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CONFIG_SYSTEM_PLL_FACTOR_4_1=y
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CONFIG_CORE_PLL_RATIO_3_1=y
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CONFIG_BOOT_ROM_INTERFACE_GPCM_16BIT=y
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CONFIG_TSEC1_MODE_RGMII=y
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CONFIG_TSEC2_MODE_RGMII=y
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CONFIG_BAT0=y
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CONFIG_BAT0_NAME="SDRAM"
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CONFIG_BAT0_BASE=0x00000000
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CONFIG_BAT0_LENGTH_128_MBYTES=y
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CONFIG_BAT0_ACCESS_RW=y
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CONFIG_BAT0_ICACHE_MEMORYCOHERENCE=y
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CONFIG_BAT0_DCACHE_MEMORYCOHERENCE=y
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CONFIG_BAT0_USER_MODE_VALID=y
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CONFIG_BAT0_SUPERVISOR_MODE_VALID=y
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CONFIG_BAT1=y
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CONFIG_BAT1_NAME="IMMR"
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CONFIG_BAT1_BASE=0xE0000000
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CONFIG_BAT1_LENGTH_8_MBYTES=y
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CONFIG_BAT1_ACCESS_RW=y
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CONFIG_BAT1_ICACHE_INHIBITED=y
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CONFIG_BAT1_ICACHE_GUARDED=y
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CONFIG_BAT1_DCACHE_INHIBITED=y
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CONFIG_BAT1_DCACHE_GUARDED=y
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CONFIG_BAT1_USER_MODE_VALID=y
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CONFIG_BAT1_SUPERVISOR_MODE_VALID=y
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CONFIG_BAT2=y
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CONFIG_BAT2_NAME="FLASH"
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CONFIG_BAT2_BASE=0xFE000000
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CONFIG_BAT2_LENGTH_8_MBYTES=y
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CONFIG_BAT2_ACCESS_RW=y
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CONFIG_BAT2_ICACHE_MEMORYCOHERENCE=y
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CONFIG_BAT2_DCACHE_INHIBITED=y
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CONFIG_BAT2_DCACHE_GUARDED=y
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CONFIG_BAT2_USER_MODE_VALID=y
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CONFIG_BAT2_SUPERVISOR_MODE_VALID=y
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CONFIG_BAT3=y
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CONFIG_BAT3_NAME="INIT_RAM"
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CONFIG_BAT3_BASE=0xE6000000
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CONFIG_BAT3_ACCESS_RW=y
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CONFIG_BAT3_USER_MODE_VALID=y
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CONFIG_BAT3_SUPERVISOR_MODE_VALID=y
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CONFIG_LBLAW0=y
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CONFIG_LBLAW0_BASE=0xFE000000
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CONFIG_LBLAW0_NAME="FLASH"
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CONFIG_LBLAW0_LENGTH_8_MBYTES=y
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CONFIG_LBLAW1=y
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CONFIG_LBLAW1_BASE=0xE0600000
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CONFIG_LBLAW1_NAME="FPGA0"
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CONFIG_LBLAW1_LENGTH_1_MBYTES=y
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CONFIG_LBLAW2=y
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CONFIG_LBLAW2_BASE=0xE0700000
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CONFIG_LBLAW2_NAME="FPGA1"
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CONFIG_LBLAW2_LENGTH_1_MBYTES=y
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CONFIG_ELBC_BR0_OR0=y
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CONFIG_BR0_OR0_NAME="FLASH"
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CONFIG_BR0_OR0_BASE=0xFE000000
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CONFIG_BR0_PORTSIZE_16BIT=y
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CONFIG_OR0_AM_8_MBYTES=y
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CONFIG_OR0_SCY_15=y
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CONFIG_OR0_CSNT_EARLIER=y
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CONFIG_OR0_ACS_HALF_CYCLE_EARLIER=y
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CONFIG_OR0_XACS_EXTENDED=y
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CONFIG_OR0_TRLX_RELAXED=y
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CONFIG_OR0_EHTR_8_CYCLE=y
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CONFIG_ELBC_BR1_OR1=y
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CONFIG_BR1_OR1_NAME="FPGA0"
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CONFIG_BR1_OR1_BASE=0xE0600000
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CONFIG_BR1_PORTSIZE_16BIT=y
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CONFIG_OR1_AM_1_MBYTES=y
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CONFIG_OR1_SCY_5=y
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CONFIG_OR1_CSNT_EARLIER=y
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CONFIG_ELBC_BR2_OR2=y
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CONFIG_BR2_OR2_NAME="FPGA1"
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CONFIG_BR2_OR2_BASE=0xE0700000
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CONFIG_BR2_PORTSIZE_16BIT=y
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CONFIG_OR2_AM_1_MBYTES=y
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CONFIG_OR2_SCY_5=y
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CONFIG_OR2_CSNT_EARLIER=y
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CONFIG_HID0_FINAL_EMCP=y
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CONFIG_HID0_FINAL_DPM=y
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CONFIG_HID0_FINAL_ICE=y
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CONFIG_HID2_HBE=y
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CONFIG_SICR_ETSEC1_A_TSEC_GTX_CLK125=y
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CONFIG_SICR_GPIO_A_TSEC2=y
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CONFIG_SICR_GPIO_B_TSEC_GTX_CLK125=y
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CONFIG_SICR_IEEE1588_A_GPIO=y
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CONFIG_SICR_GTM_GPIO=y
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CONFIG_SICR_ETSEC2_GPIO=y
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CONFIG_SICR_GPIOSEL_IEEE1588=y
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CONFIG_SICR_TMSOBI1_2_5_V=y
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CONFIG_SICR_TMSOBI2_2_5_V=y
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CONFIG_ACR_PIPE_DEP_4=y
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CONFIG_ACR_RPTCNT_4=y
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CONFIG_SPCR_TSECEP_3=y
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CONFIG_LCRR_DBYP_PLL_BYPASSED=y
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CONFIG_LCRR_CLKDIV_2=y
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CONFIG_SYS_FPGA_FLAVOR_GAZERBEAM=y
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CONFIG_CMD_IOLOOP=y
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CONFIG_FIT=y
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CONFIG_FIT_SIGNATURE=y
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CONFIG_FIT_VERBOSE=y
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CONFIG_OF_BOARD_SETUP=y
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CONFIG_OF_STDOUT_VIA_ALIAS=y
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CONFIG_BOOTDELAY=5
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# CONFIG_CONSOLE_MUX is not set
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CONFIG_SYS_CONSOLE_INFO_QUIET=y
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CONFIG_DISPLAY_CPUINFO=y
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# CONFIG_DISPLAY_BOARDINFO is not set
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CONFIG_DISPLAY_BOARDINFO_LATE=y
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CONFIG_BOARD_EARLY_INIT_R=y
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CONFIG_LAST_STAGE_INIT=y
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CONFIG_HUSH_PARSER=y
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CONFIG_AUTOBOOT_KEYED=y
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CONFIG_AUTOBOOT_STOP_STR=" "
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CONFIG_CMD_CPU=y
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CONFIG_CMD_BINOP=y
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CONFIG_CMD_MEMTEST=y
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CONFIG_SYS_ALT_MEMTEST=y
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CONFIG_CMD_GPIO=y
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CONFIG_CMD_I2C=y
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CONFIG_CMD_MMC=y
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CONFIG_CMD_AXI=y
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# CONFIG_CMD_SETEXPR is not set
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# CONFIG_CMD_NFS is not set
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CONFIG_CMD_MII=y
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CONFIG_CMD_MII_DRIVER=y
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CONFIG_CMD_PING=y
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CONFIG_CMD_CACHE=y
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CONFIG_CMD_HASH=y
|
||||
CONFIG_CMD_TPM=y
|
||||
CONFIG_CMD_EXT2=y
|
||||
CONFIG_DOS_PARTITION=y
|
||||
CONFIG_OF_CONTROL=y
|
||||
CONFIG_OF_LIVE=y
|
||||
CONFIG_DEFAULT_DEVICE_TREE="gazerbeam"
|
||||
CONFIG_DM=y
|
||||
CONFIG_REGMAP=y
|
||||
CONFIG_AXI=y
|
||||
CONFIG_IHS_AXI=y
|
||||
CONFIG_CLK=y
|
||||
CONFIG_ICS8N3QV01=y
|
||||
CONFIG_CPU=y
|
||||
CONFIG_CPU_MPC83XX=y
|
||||
CONFIG_BOARD=y
|
||||
CONFIG_BOARD_GAZERBEAM=y
|
||||
CONFIG_DM_GPIO=y
|
||||
CONFIG_DM_PCA953X=y
|
||||
CONFIG_MPC8XXX_GPIO=y
|
||||
CONFIG_DM_I2C=y
|
||||
CONFIG_SYS_I2C_FSL=y
|
||||
CONFIG_SYS_I2C_IHS=y
|
||||
CONFIG_MISC=y
|
||||
CONFIG_GDSYS_RXAUI_CTRL=y
|
||||
CONFIG_GDSYS_IOEP=y
|
||||
CONFIG_MPC83XX_SERDES=y
|
||||
CONFIG_GDSYS_SOC=y
|
||||
CONFIG_IHS_FPGA=y
|
||||
CONFIG_DM_MMC=y
|
||||
CONFIG_FSL_ESDHC=y
|
||||
CONFIG_MTD=y
|
||||
CONFIG_MTD_NOR_FLASH=y
|
||||
CONFIG_FLASH_CFI_DRIVER=y
|
||||
CONFIG_CFI_FLASH=y
|
||||
CONFIG_SYS_FLASH_PROTECTION=y
|
||||
CONFIG_SYS_FLASH_CFI=y
|
||||
CONFIG_PHYLIB_10G=y
|
||||
CONFIG_PHY_MARVELL=y
|
||||
CONFIG_DM_ETH=y
|
||||
CONFIG_TSEC_ENET=y
|
||||
# CONFIG_PCI is not set
|
||||
CONFIG_RAM=y
|
||||
CONFIG_MPC83XX_SDRAM=y
|
||||
CONFIG_DM_RESET=y
|
||||
CONFIG_DM_SERIAL=y
|
||||
CONFIG_SYS_NS16550=y
|
||||
CONFIG_SYSRESET=y
|
||||
CONFIG_SYSRESET_MCP83XX=y
|
||||
CONFIG_TIMER=y
|
||||
CONFIG_MPC83XX_TIMER=y
|
||||
CONFIG_TPM_ATMEL_TWI=y
|
||||
CONFIG_TPM_AUTH_SESSIONS=y
|
||||
# CONFIG_TPM_V2 is not set
|
||||
CONFIG_DM_VIDEO=y
|
||||
CONFIG_DISPLAY=y
|
||||
CONFIG_LOGICORE_DP_TX=y
|
||||
CONFIG_OSD=y
|
||||
CONFIG_IHS_VIDEO_OUT=y
|
||||
CONFIG_TPM=y
|
||||
137
include/configs/gazerbeam.h
Normal file
137
include/configs/gazerbeam.h
Normal file
|
|
@ -0,0 +1,137 @@
|
|||
/*
|
||||
* (C) Copyright 2015
|
||||
* Dirk Eibach, Guntermann & Drunck GmbH, eibach@gdsys.de
|
||||
*
|
||||
*
|
||||
* SPDX-License-Identifier: GPL-2.0+
|
||||
*/
|
||||
|
||||
#ifndef __CONFIG_H
|
||||
#define __CONFIG_H
|
||||
|
||||
/*
|
||||
* DDR Setup
|
||||
*/
|
||||
#define CONFIG_SYS_SDRAM_BASE 0x00000000 /* DDR is system memory */
|
||||
/* TODO: Check: Can this be unified with CONFIG_SYS_SDRAM_BASE? */
|
||||
#define CONFIG_SYS_DDR_SDRAM_BASE CONFIG_SYS_SDRAM_BASE
|
||||
|
||||
/*
|
||||
* Memory test
|
||||
* TODO: Migrate!
|
||||
*/
|
||||
#define CONFIG_SYS_MEMTEST_START 0x00001000 /* memtest region */
|
||||
#define CONFIG_SYS_MEMTEST_END 0x07e00000
|
||||
|
||||
/*
|
||||
* The reserved memory
|
||||
*/
|
||||
#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */
|
||||
|
||||
#define CONFIG_SYS_MONITOR_LEN (512 * 1024) /* Reserve 512 kB for Mon */
|
||||
#define CONFIG_SYS_MALLOC_LEN (512 * 1024) /* Reserved for malloc */
|
||||
|
||||
/*
|
||||
* Initial RAM Base Address Setup
|
||||
*/
|
||||
#define CONFIG_SYS_INIT_RAM_LOCK
|
||||
#define CONFIG_SYS_INIT_RAM_ADDR 0xE6000000 /* Initial RAM address */
|
||||
#define CONFIG_SYS_INIT_RAM_SIZE 0x1000 /* Size of used area in RAM */
|
||||
#define CONFIG_SYS_GBL_DATA_OFFSET \
|
||||
(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
|
||||
|
||||
/*
|
||||
* FLASH on the Local Bus
|
||||
*/
|
||||
#define CONFIG_SYS_FLASH_BASE 0xFE000000 /* FLASH base address */
|
||||
#define CONFIG_SYS_FLASH_SIZE 8 /* FLASH size is up to 8M */
|
||||
|
||||
#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* number of banks */
|
||||
#define CONFIG_SYS_MAX_FLASH_SECT 135
|
||||
|
||||
#define CONFIG_SYS_BAUDRATE_TABLE \
|
||||
{300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200}
|
||||
|
||||
/*
|
||||
* Environment
|
||||
*/
|
||||
#define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE + \
|
||||
CONFIG_SYS_MONITOR_LEN)
|
||||
#define CONFIG_ENV_SECT_SIZE 0x10000 /* 64K(one sector) for env */
|
||||
#define CONFIG_ENV_SIZE 0x2000
|
||||
#define CONFIG_ENV_ADDR_REDUND (CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE)
|
||||
#define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE
|
||||
|
||||
#define CONFIG_LOADS_ECHO /* echo on for serial download */
|
||||
#define CONFIG_SYS_LOADS_BAUD_CHANGE /* allow baudrate change */
|
||||
|
||||
/*
|
||||
* Miscellaneous configurable options
|
||||
*/
|
||||
#define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */
|
||||
#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1ms ticks */
|
||||
|
||||
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
|
||||
|
||||
/* Print Buffer Size */
|
||||
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
|
||||
#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
|
||||
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
|
||||
|
||||
/*
|
||||
* For booting Linux, the board info and command line data
|
||||
* have to be in the first 256 MB of memory, since this is
|
||||
* the maximum mapped by the Linux kernel during initialization.
|
||||
*/
|
||||
#define CONFIG_SYS_BOOTMAPSZ (256 << 20) /* Initial Memory map for Linux */
|
||||
|
||||
/*
|
||||
* Environment Configuration
|
||||
*/
|
||||
#define CONFIG_ENV_OVERWRITE
|
||||
|
||||
#define CONFIG_HAS_ETH0
|
||||
#define CONFIG_HAS_ETH1
|
||||
|
||||
#define CONFIG_LOADADDR 800000 /* default location for tftp and bootm */
|
||||
|
||||
/* TODO: Turn into string option and migrate to Kconfig */
|
||||
#define CONFIG_HOSTNAME "gazerbeam"
|
||||
#define CONFIG_ROOTPATH "/opt/nfsroot"
|
||||
#define CONFIG_BOOTFILE "uImage"
|
||||
|
||||
#define CONFIG_PREBOOT /* enable preboot variable */
|
||||
|
||||
#define CONFIG_EXTRA_ENV_SETTINGS \
|
||||
"netdev=eth0\0" \
|
||||
"consoledev=ttyS1\0" \
|
||||
"u-boot=u-boot.bin\0" \
|
||||
"kernel_addr=1000000\0" \
|
||||
"fdt_addr=C00000\0" \
|
||||
"fdtfile=hrcon.dtb\0" \
|
||||
"load=tftp ${loadaddr} ${u-boot}\0" \
|
||||
"update=protect off " __stringify(CONFIG_SYS_MONITOR_BASE) \
|
||||
" +${filesize};era " __stringify(CONFIG_SYS_MONITOR_BASE)\
|
||||
" +${filesize};cp.b ${fileaddr} " \
|
||||
__stringify(CONFIG_SYS_MONITOR_BASE) " ${filesize}\0" \
|
||||
"upd=run load update\0" \
|
||||
|
||||
#define CONFIG_NFSBOOTCOMMAND \
|
||||
"setenv bootargs root=/dev/nfs rw " \
|
||||
"nfsroot=$serverip:$rootpath " \
|
||||
"ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off " \
|
||||
"console=$consoledev,$baudrate $othbootargs;" \
|
||||
"tftp ${kernel_addr} $bootfile;" \
|
||||
"tftp ${fdt_addr} $fdtfile;" \
|
||||
"bootm ${kernel_addr} - ${fdt_addr}"
|
||||
|
||||
#define CONFIG_MMCBOOTCOMMAND \
|
||||
"setenv bootargs root=/dev/mmcblk0p3 rw rootwait " \
|
||||
"console=$consoledev,$baudrate $othbootargs;" \
|
||||
"ext2load mmc 0:2 ${kernel_addr} $bootfile;" \
|
||||
"ext2load mmc 0:2 ${fdt_addr} $fdtfile;" \
|
||||
"bootm ${kernel_addr} - ${fdt_addr}"
|
||||
|
||||
#define CONFIG_BOOTCOMMAND CONFIG_MMCBOOTCOMMAND
|
||||
|
||||
#endif /* __CONFIG_H */
|
||||
Loading…
Reference in a new issue