The LS2080A has 8GB region for each PCIe controller, while the
other platforms have 32GB.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Change to use PCIe address macro to determine if precompile the PCIe
MMU table entry.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Update mtd-id for QSPI nor due to change introduced in mtd/spi in
linux 5.0. commit 84d043185dbe
("spi: Add a driver for the Freescale/NXP QuadSPI controller")
This modification is only for linux kernel version >= 5.0. To use
bootargs for kernel < 5.0, use the following bootargs
CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0
earlycon=uart8250,mmio,0x21c0500
mtdparts=1550000.quadspi:2m(uboot),14m(free)"
CONFIG_MTDPARTS_DEFAULT="mtdparts=1550000.quadspi:2m(uboot),14m(free)"
Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
when loading the splash image from a FIT
- updates for loading internal and external splash data from FIT
- DM_GPIO/DM_VIDEO migration for mx53 cx9020 board
- fix boot issue on mx6sabresd board after DM_VIDEO migration
- increase the max preallocated framebuffer BPP to 32 in ipuv3
driver to prepare for configurations with higher color depth
- allow to use vidconsole_put_string() in board code for text
output on LCD displays
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Merge tag 'video-for-2019.07-rc3' of git://git.denx.de/u-boot-video
- update for using splashfile instead of location->name
when loading the splash image from a FIT
- updates for loading internal and external splash data from FIT
- DM_GPIO/DM_VIDEO migration for mx53 cx9020 board
- fix boot issue on mx6sabresd board after DM_VIDEO migration
- increase the max preallocated framebuffer BPP to 32 in ipuv3
driver to prepare for configurations with higher color depth
- allow to use vidconsole_put_string() in board code for text
output on LCD displays
The gdsys gazerbeam board is based on a Freescale MPC8308 SOC.
It boots from NOR-Flash, kernel and rootfs are stored on
SD-Card.
On board peripherals include:
- 2x 10/100 Mbit/s Ethernet (optional)
Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc>
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Add a U-Boot specific dts file, which encapsulates the needed
modifications to the Gazerbeam Linux device tree.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
The single channel detection in the gazerbeam board driver was not
implemented correctly.
Fix the detection.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Replace the boolean parameter of io_check_status that controls whether
the status is printed or not with a documenting enum.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
More recent versions of IHS FPGAs feature a different memory layout.
Add a Kconfig option to differentiate between the legacy layout, and the
new layout (which is used on the upcoming "Gazerbeam" and later boards).
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Future gdsys boards will switch from the legacy drivers in board/gdsys/common
to DM-based drivers.
Define a Kconfig option that disables the legacy drivers.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
The "manual" RAM configuration should not be used if the DM RAM driver
is active, hence, disable the code if the CONFIG_MPC83XX_SDRAM config
variable is defined.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Move CONFIG_SYS_FPGA0_BASE, CONFIG_SYS_FPGA0_SIZE, CONFIG_SYS_FPGA1_BASE, and
CONFIG_SYS_FPGA1_SIZE to Kconfig.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Since the gpio output status on MPC8xxx cannot be read back, it has to
be buffered locally.
Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc>
Signed-off-by: Mario Six <mario.six@gdsys.cc>
The ppc4xx architecture was removed, and with it several old gdsys 44x
boards, but some "debris" from these purged boards was left over.
This patch removes these remnants (mostly entries in Makefiles, some now
superfluous data structures and some now obsolete config variables from
the whitelist).
Signed-off-by: Mario Six <mario.six@gdsys.cc>
The initialization sequence in the newest release notes of the 88e1518
phy omits two commands.
Remove them from the sequence.
Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc>
For the DM case, use the proper parameter for the regmap_init_mem call
(which is the ofnode, not the udevice).
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>
For the DM case, use the proper parameter for the regmap_init_mem call
(which is the ofnode, not the udevice).
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Make the gdsys_rxaui_ctrl polarity setting function return the old
state to comply with the API requirements.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Since the IHS I2C driver want upstream, the surrounding infrastructure
has changed quite a bit (notably, the fpgamap driver was replaced with a
regmap driver).
Update the driver to work with these changes.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Reviewed-by: Heiko Schocher <hs@denx.de>
Use the new hex2bin function in the binop command instead of converting
the data manually.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>
Since the binop command was introduced, the environment API was changed.
Use the new API to make the command work again.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>
Some DM drivers have hardcoded clk_enable calls when handling
clocks (for example the fsl_esdhc driver).
To work with these drivers, add an enable method to the MCP83xx clock
driver (which does nothing, because the clocks are always enabled).
Signed-off-by: Mario Six <mario.six@gdsys.cc>
To support OF_EMBED, the MPC83xx architecture has to define the "_end"
symbol to correctly access the appended DT.
Fortunately, MPC8xx already defines the symbol, and the linker script is
quite similar to that of MPC83xx, so copy this approach for MPC83xx.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Lots of stuff in processor.h was taken verbatim from the Linux kernel.
It was never synced, so most of it was removed or changed in the kernel
since it was imported.
Remove all the stuff that is unused in the current U-Boot sources;
should anybody feel the need to re-sync with the kernel, they can do it
later on.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Not that the Kconfig conversion of a lot of variables is done, we can
factor out the common include files for the keymile boards again (which
now contain hardly any #ifdef logic at all).
Signed-off-by: Mario Six <mario.six@gdsys.cc>
CONFIG_SYS_APP1_BASE, CONFIG_SYS_APP2_BASE, CONFIG_SYS_APP1_SIZE, and
CONFIG_SYS_APP2_SIZE are no longer used in the keymile config files
(they were used for setting values, which were converted to Kconfig
earlier in the series).
Remove them from the configs and the whitelist.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
For a lot of inline assembly calls in the mpc8xxx and mpc83xx
directories, we already have convenient pre-defined helper functions,
but they're not used, resulting in hard-to-read code.
Use these helper functions where ever possible and useful.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
ppcDWstore/ppcDWload are hardly used by any board, but since they're
implemented in start.S, they're always present in every U-Boot image,
even if they're not needed.
Re-implement these fuctions in C with inline assembly, so that the
compiler can decide when to actually include them.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
The fsl-esdhc driver can be used for the SDHC functionality on MPC83xx,
but it needs some additional definitions.
Add a clock.h file, so we can use the driver for MPC83xx.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Except for one counter example, CONFIG_SYS_LBC_LBCR always has a value
of either 0x00040000 or 0x00000000.
CONFIG_SYS_LBC_MRTPR always has the value 0x20000000.
CONFIG_SYS_LBC_LSDMR_{1,2,4,5} are not set for any mpc83xx board.
CONFIG_SYS_LBC_LSRT is set by one board (to 0x32000000).
To simplify the configuration files, hardcode the setting of these
values for mpc83xx.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
CONFIG_SYS_DDR_SDRAM_BASE is set to the same value as
CONFIG_SYS_SDRAM_BASE on all existing boards. Just use
CONFIG_SYS_SDRAM_BASE instead.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
CONFIG_SYS_DDR_BASE is specific to mpc83xx an is always set to the same
value as CONFIG_SYS_SDRAM_BASE. Just use CONFIG_SYS_SDRAM_BASE instead.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
The MPC85xx GPIO driver was converted to handle a broader range of SoCs.
Prepare the MPC83xx code for usage of this driver.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Replace the hard-coded CONFIG_SYS_NS16550_CLK value for the FDT fixup
with the previously introduced get_serial_clock function
This will make it possible to activate DM for serial devices on MPC83xx
later on.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
