mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-10 07:04:28 +00:00
mpc83xx: Migrate arbiter config to Kconfig
Migrate the arbiter configuration to Kconfig. Signed-off-by: Mario Six <mario.six@gdsys.cc>
This commit is contained in:
parent
ba463c1169
commit
73df96a38e
69 changed files with 269 additions and 172 deletions
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@ -295,6 +295,7 @@ source "arch/powerpc/cpu/mpc83xx/lblaw/Kconfig"
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source "arch/powerpc/cpu/mpc83xx/elbc/Kconfig"
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source "arch/powerpc/cpu/mpc83xx/hid/Kconfig"
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source "arch/powerpc/cpu/mpc83xx/sysio/Kconfig"
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source "arch/powerpc/cpu/mpc83xx/arbiter/Kconfig"
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menu "Legacy options"
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139
arch/powerpc/cpu/mpc83xx/arbiter/Kconfig
Normal file
139
arch/powerpc/cpu/mpc83xx/arbiter/Kconfig
Normal file
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@ -0,0 +1,139 @@
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menu "Arbiter"
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choice
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prompt "Pipeline depth"
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config ACR_PIPE_DEP_UNSET
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bool "Don't set value"
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config ACR_PIPE_DEP_1
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bool "1"
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config ACR_PIPE_DEP_2
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bool "2"
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config ACR_PIPE_DEP_3
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bool "3"
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config ACR_PIPE_DEP_4
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bool "4"
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endchoice
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choice
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prompt "Repeat count"
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config ACR_RPTCNT_UNSET
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bool "Don't set value"
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config ACR_RPTCNT_1
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bool "1"
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config ACR_RPTCNT_2
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bool "2"
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config ACR_RPTCNT_3
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bool "3"
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config ACR_RPTCNT_4
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bool "4"
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config ACR_RPTCNT_5
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bool "5"
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config ACR_RPTCNT_6
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bool "6"
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config ACR_RPTCNT_7
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bool "7"
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config ACR_RPTCNT_8
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bool "8"
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endchoice
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choice
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prompt "Address parking"
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config ACR_APARK_UNSET
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bool "Don't set value"
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config ACR_APARK_MASTER
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bool "Park to master"
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config ACR_APARK_LAST
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bool "Park to last owner"
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config ACR_APARK_DISABLE
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bool "Disabled"
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endchoice
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choice
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prompt "Parking master"
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config ACR_PARKM_UNSET
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bool "Don't set value"
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config ACR_PARKM_E300
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bool "e300 core"
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config ACR_PARKM_TSEC_1_2
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bool "TSEC1, TSEC2"
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config ACR_PARKM_USB_I2C1_BOOT
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bool "USB/I2C1_BOOT"
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config ACR_PARKM_DMA_ESDHC_USB
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bool "DMA, ESDHC, USB"
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config ACR_PARKM_PEX
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bool "PCI Express"
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if MPC83XX_QUICC_ENGINE
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config ACR_PARKM_ENC_CORE
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bool "Encryption core"
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endif
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endchoice
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config ACR_PIPE_DEP
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hex
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default 0x0 if ACR_PIPE_DEP_UNSET
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default 0x0 if ACR_PIPE_DEP_1
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default 0x10000 if ACR_PIPE_DEP_2
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default 0x20000 if ACR_PIPE_DEP_3
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default 0x30000 if ACR_PIPE_DEP_4
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config ACR_RPTCNT
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hex
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default 0x0 if ACR_RPTCNT_UNSET
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default 0x0 if ACR_RPTCNT_1
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default 0x100 if ACR_RPTCNT_2
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default 0x200 if ACR_RPTCNT_3
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default 0x300 if ACR_RPTCNT_4
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default 0x400 if ACR_RPTCNT_5
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default 0x500 if ACR_RPTCNT_6
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default 0x600 if ACR_RPTCNT_7
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default 0x700 if ACR_RPTCNT_8
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config ACR_APARK
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hex
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default 0x0 if ACR_APARK_UNSET
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default 0x0 if ACR_APARK_MASTER
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default 0x10 if ACR_APARK_LAST
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default 0x20 if ACR_APARK_DISABLE
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config ACR_PARKM
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hex
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default 0x0 if ACR_PARKM_UNSET
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default 0x0 if ACR_PARKM_E300
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default 0x2 if ACR_PARKM_TSEC_1_2
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default 0x3 if ACR_PARKM_USB_I2C1_BOOT
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default 0x4 if ACR_PARKM_DMA_ESDHC_USB
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default 0x5 if ACR_PARKM_PEX
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default 0x5 if ACR_PARKM_ENC_CORE
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endmenu
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28
arch/powerpc/cpu/mpc83xx/arbiter/arbiter.h
Normal file
28
arch/powerpc/cpu/mpc83xx/arbiter/arbiter.h
Normal file
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@ -0,0 +1,28 @@
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const __be32 acr_mask =
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#ifndef CONFIG_ACR_PIPE_DEP_UNSET
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ACR_PIPE_DEP |
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#endif
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#ifndef CONFIG_ACR_RPTCNT_UNSET
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ACR_RPTCNT |
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#endif
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#ifndef CONFIG_ACR_APARK_UNSET
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ACR_APARK |
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#endif
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#ifndef CONFIG_ACR_PARKM_UNSET
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ACR_PARKM |
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#endif
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0;
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const __be32 acr_val =
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#ifndef CONFIG_ACR_PIPE_DEP_UNSET
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CONFIG_ACR_PIPE_DEP |
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#endif
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#ifndef CONFIG_ACR_RPTCNT_UNSET
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CONFIG_ACR_RPTCNT |
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#endif
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#ifndef CONFIG_ACR_APARK_UNSET
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CONFIG_ACR_APARK |
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#endif
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#ifndef CONFIG_ACR_PARKM_UNSET
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CONFIG_ACR_PARKM |
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#endif
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0;
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@ -15,6 +15,7 @@
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#include "lblaw/lblaw.h"
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#include "elbc/elbc.h"
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#include "sysio/sysio.h"
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#include "arbiter/arbiter.h"
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DECLARE_GLOBAL_DATA_PTR;
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@ -51,34 +52,6 @@ static void config_qe_ioports(void)
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*/
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void cpu_init_f (volatile immap_t * im)
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{
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__be32 acr_mask =
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#ifdef CONFIG_SYS_ACR_PIPE_DEP /* Arbiter pipeline depth */
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ACR_PIPE_DEP |
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#endif
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#ifdef CONFIG_SYS_ACR_RPTCNT /* Arbiter repeat count */
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ACR_RPTCNT |
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#endif
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#ifdef CONFIG_SYS_ACR_APARK /* Arbiter address parking mode */
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ACR_APARK |
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#endif
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#ifdef CONFIG_SYS_ACR_PARKM /* Arbiter parking master */
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ACR_PARKM |
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#endif
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0;
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__be32 acr_val =
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#ifdef CONFIG_SYS_ACR_PIPE_DEP /* Arbiter pipeline depth */
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(CONFIG_SYS_ACR_PIPE_DEP << ACR_PIPE_DEP_SHIFT) |
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#endif
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#ifdef CONFIG_SYS_ACR_RPTCNT /* Arbiter repeat count */
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(CONFIG_SYS_ACR_RPTCNT << ACR_RPTCNT_SHIFT) |
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#endif
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#ifdef CONFIG_SYS_ACR_APARK /* Arbiter address parking mode */
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(CONFIG_SYS_ACR_APARK << ACR_APARK_SHIFT) |
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#endif
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#ifdef CONFIG_SYS_ACR_PARKM /* Arbiter parking master */
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(CONFIG_SYS_ACR_PARKM << ACR_PARKM_SHIFT) |
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#endif
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0;
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__be32 spcr_mask =
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#ifdef CONFIG_SYS_SPCR_OPT /* Optimize transactions between CSB and other dev */
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SPCR_OPT |
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@ -27,16 +27,16 @@ void cpu_init_f (volatile immap_t * im)
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/* system performance tweaking */
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#ifdef CONFIG_SYS_ACR_PIPE_DEP
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#ifndef CONFIG_ACR_PIPE_DEP_UNSET
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/* Arbiter pipeline depth */
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im->arbiter.acr = (im->arbiter.acr & ~ACR_PIPE_DEP) |
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(CONFIG_SYS_ACR_PIPE_DEP << ACR_PIPE_DEP_SHIFT);
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CONFIG_ACR_PIPE_DEP;
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#endif
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#ifdef CONFIG_SYS_ACR_RPTCNT
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#ifndef CONFIG_ACR_RPTCNT_UNSET
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/* Arbiter repeat count */
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im->arbiter.acr = (im->arbiter.acr & ~(ACR_RPTCNT)) |
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(CONFIG_SYS_ACR_RPTCNT << ACR_RPTCNT_SHIFT);
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CONFIG_ACR_RPTCNT;
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#endif
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#ifdef CONFIG_SYS_SPCR_OPT
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@ -70,6 +70,8 @@ CONFIG_SICR_GTM_GPIO=y
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CONFIG_SICR_GPIOSEL_IEEE1588=y
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CONFIG_SICR_TMSOBI1_2_5_V=y
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CONFIG_SICR_TMSOBI2_2_5_V=y
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CONFIG_ACR_PIPE_DEP_4=y
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CONFIG_ACR_RPTCNT_4=y
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CONFIG_FIT=y
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CONFIG_FIT_VERBOSE=y
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CONFIG_OF_BOARD_SETUP=y
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@ -77,6 +77,8 @@ CONFIG_HID0_FINAL_EMCP=y
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CONFIG_HID0_FINAL_DPM=y
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CONFIG_HID0_FINAL_ICE=y
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CONFIG_HID2_HBE=y
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CONFIG_ACR_PIPE_DEP_4=y
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CONFIG_ACR_RPTCNT_4=y
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CONFIG_OF_BOARD_SETUP=y
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CONFIG_OF_STDOUT_VIA_ALIAS=y
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CONFIG_SYS_EXTRA_OPTIONS="SYS_33MHZ"
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@ -76,6 +76,8 @@ CONFIG_HID0_FINAL_EMCP=y
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CONFIG_HID0_FINAL_DPM=y
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CONFIG_HID0_FINAL_ICE=y
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CONFIG_HID2_HBE=y
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CONFIG_ACR_PIPE_DEP_4=y
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CONFIG_ACR_RPTCNT_4=y
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CONFIG_OF_BOARD_SETUP=y
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CONFIG_OF_STDOUT_VIA_ALIAS=y
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CONFIG_SYS_EXTRA_OPTIONS="SYS_66MHZ"
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@ -79,6 +79,8 @@ CONFIG_HID0_FINAL_EMCP=y
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CONFIG_HID0_FINAL_DPM=y
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CONFIG_HID0_FINAL_ICE=y
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CONFIG_HID2_HBE=y
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CONFIG_ACR_PIPE_DEP_4=y
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CONFIG_ACR_RPTCNT_4=y
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CONFIG_OF_BOARD_SETUP=y
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CONFIG_OF_STDOUT_VIA_ALIAS=y
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CONFIG_SYS_EXTRA_OPTIONS="SYS_33MHZ"
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@ -78,6 +78,8 @@ CONFIG_HID0_FINAL_EMCP=y
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CONFIG_HID0_FINAL_DPM=y
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CONFIG_HID0_FINAL_ICE=y
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CONFIG_HID2_HBE=y
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CONFIG_ACR_PIPE_DEP_4=y
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CONFIG_ACR_RPTCNT_4=y
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CONFIG_OF_BOARD_SETUP=y
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CONFIG_OF_STDOUT_VIA_ALIAS=y
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CONFIG_SYS_EXTRA_OPTIONS="SYS_66MHZ"
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@ -80,6 +80,8 @@ CONFIG_HID0_FINAL_EMCP=y
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CONFIG_HID0_FINAL_DPM=y
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CONFIG_HID0_FINAL_ICE=y
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CONFIG_HID2_HBE=y
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CONFIG_ACR_PIPE_DEP_4=y
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CONFIG_ACR_RPTCNT_4=y
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CONFIG_OF_BOARD_SETUP=y
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CONFIG_OF_STDOUT_VIA_ALIAS=y
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CONFIG_BOOTDELAY=6
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@ -73,6 +73,8 @@ CONFIG_LBLAW0_LENGTH_32_MBYTES=y
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CONFIG_HID0_FINAL_EMCP=y
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CONFIG_HID0_FINAL_ICE=y
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CONFIG_HID2_HBE=y
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CONFIG_ACR_PIPE_DEP_4=y
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CONFIG_ACR_RPTCNT_4=y
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CONFIG_OF_BOARD_SETUP=y
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CONFIG_OF_STDOUT_VIA_ALIAS=y
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CONFIG_BOOTDELAY=6
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@ -56,6 +56,8 @@ CONFIG_LBLAW1_LENGTH_32_KBYTES=y
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CONFIG_HID0_FINAL_EMCP=y
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CONFIG_HID0_FINAL_ICE=y
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CONFIG_HID2_HBE=y
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CONFIG_ACR_PIPE_DEP_4=y
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CONFIG_ACR_RPTCNT_4=y
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CONFIG_OF_BOARD_SETUP=y
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CONFIG_OF_STDOUT_VIA_ALIAS=y
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CONFIG_BOOTDELAY=6
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@ -60,6 +60,8 @@ CONFIG_LBLAW2_LENGTH_64_MBYTES=y
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CONFIG_HID0_FINAL_EMCP=y
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CONFIG_HID0_FINAL_ICE=y
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CONFIG_HID2_HBE=y
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CONFIG_ACR_PIPE_DEP_4=y
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CONFIG_ACR_RPTCNT_4=y
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CONFIG_ELBC_BR0_OR0=y
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CONFIG_BR0_OR0_NAME="FLASH"
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CONFIG_BR0_OR0_BASE=0xFE000000
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@ -54,6 +54,8 @@ CONFIG_LBLAW1_LENGTH_32_KBYTES=y
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CONFIG_HID0_FINAL_EMCP=y
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CONFIG_HID0_FINAL_ICE=y
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CONFIG_HID2_HBE=y
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CONFIG_ACR_PIPE_DEP_4=y
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CONFIG_ACR_RPTCNT_4=y
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CONFIG_PCI_ONE_PCI1=y
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CONFIG_OF_BOARD_SETUP=y
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CONFIG_OF_STDOUT_VIA_ALIAS=y
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@ -56,6 +56,8 @@ CONFIG_LBLAW1_LENGTH_32_KBYTES=y
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CONFIG_HID0_FINAL_EMCP=y
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CONFIG_HID0_FINAL_ICE=y
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CONFIG_HID2_HBE=y
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CONFIG_ACR_PIPE_DEP_4=y
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CONFIG_ACR_RPTCNT_4=y
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CONFIG_PCI_ONE_PCI1=y
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CONFIG_OF_BOARD_SETUP=y
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CONFIG_OF_STDOUT_VIA_ALIAS=y
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@ -99,6 +99,8 @@ CONFIG_LBLAW3_NAME="CF"
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CONFIG_LBLAW3_LENGTH_64_KBYTES=y
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CONFIG_HID0_FINAL_ICE=y
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CONFIG_HID2_HBE=y
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CONFIG_ACR_PIPE_DEP_4=y
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CONFIG_ACR_RPTCNT_4=y
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CONFIG_OF_BOARD_SETUP=y
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CONFIG_OF_STDOUT_VIA_ALIAS=y
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CONFIG_SYS_EXTRA_OPTIONS="SYS_TEXT_BASE=0xFE000000"
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@ -99,6 +99,8 @@ CONFIG_LBLAW3_NAME="CF"
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CONFIG_LBLAW3_LENGTH_64_KBYTES=y
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CONFIG_HID0_FINAL_ICE=y
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CONFIG_HID2_HBE=y
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CONFIG_ACR_PIPE_DEP_4=y
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CONFIG_ACR_RPTCNT_4=y
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CONFIG_OF_BOARD_SETUP=y
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CONFIG_OF_STDOUT_VIA_ALIAS=y
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CONFIG_BOOTDELAY=6
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@ -98,6 +98,8 @@ CONFIG_LBLAW3_NAME="CF"
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CONFIG_LBLAW3_LENGTH_64_KBYTES=y
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CONFIG_HID0_FINAL_ICE=y
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CONFIG_HID2_HBE=y
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CONFIG_ACR_PIPE_DEP_4=y
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CONFIG_ACR_RPTCNT_4=y
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CONFIG_OF_BOARD_SETUP=y
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CONFIG_OF_STDOUT_VIA_ALIAS=y
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CONFIG_BOOTDELAY=6
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@ -104,6 +104,8 @@ CONFIG_LBLAW3_LENGTH_32_KBYTES=y
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CONFIG_HID0_FINAL_EMCP=y
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CONFIG_HID0_FINAL_ICE=y
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CONFIG_HID2_HBE=y
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CONFIG_ACR_PIPE_DEP_4=y
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CONFIG_ACR_RPTCNT_4=y
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CONFIG_OF_BOARD_SETUP=y
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CONFIG_OF_STDOUT_VIA_ALIAS=y
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CONFIG_BOOTDELAY=6
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@ -64,6 +64,8 @@ CONFIG_LBLAW3_LENGTH_32_KBYTES=y
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CONFIG_HID0_FINAL_EMCP=y
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CONFIG_HID0_FINAL_ICE=y
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CONFIG_HID2_HBE=y
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CONFIG_ACR_PIPE_DEP_4=y
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CONFIG_ACR_RPTCNT_4=y
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CONFIG_OF_BOARD_SETUP=y
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CONFIG_OF_STDOUT_VIA_ALIAS=y
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CONFIG_SYS_EXTRA_OPTIONS="PCISLAVE"
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@ -84,6 +84,8 @@ CONFIG_LBLAW3_LENGTH_32_KBYTES=y
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CONFIG_HID0_FINAL_EMCP=y
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CONFIG_HID0_FINAL_ICE=y
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CONFIG_HID2_HBE=y
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CONFIG_ACR_PIPE_DEP_4=y
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CONFIG_ACR_RPTCNT_4=y
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CONFIG_OF_BOARD_SETUP=y
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CONFIG_OF_STDOUT_VIA_ALIAS=y
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CONFIG_BOOTDELAY=6
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@ -64,6 +64,8 @@ CONFIG_LBLAW2_LENGTH_128_KBYTES=y
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CONFIG_HID0_FINAL_EMCP=y
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CONFIG_HID0_FINAL_ICE=y
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CONFIG_HID2_HBE=y
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CONFIG_ACR_PIPE_DEP_4=y
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CONFIG_ACR_RPTCNT_4=y
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CONFIG_OF_BOARD_SETUP=y
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CONFIG_OF_STDOUT_VIA_ALIAS=y
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CONFIG_SYS_EXTRA_OPTIONS="PCISLAVE,PCIE"
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@ -104,6 +104,8 @@ CONFIG_LBLAW2_LENGTH_128_KBYTES=y
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CONFIG_HID0_FINAL_EMCP=y
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CONFIG_HID0_FINAL_ICE=y
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CONFIG_HID2_HBE=y
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CONFIG_ACR_PIPE_DEP_4=y
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CONFIG_ACR_RPTCNT_4=y
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CONFIG_OF_BOARD_SETUP=y
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CONFIG_OF_STDOUT_VIA_ALIAS=y
|
||||
CONFIG_SYS_EXTRA_OPTIONS="PCIE"
|
||||
|
|
|
@ -67,6 +67,8 @@ CONFIG_SICR_ETSEC2_GPIO=y
|
|||
CONFIG_SICR_GPIOSEL_IEEE1588=y
|
||||
CONFIG_SICR_TMSOBI1_2_5_V=y
|
||||
CONFIG_SICR_TMSOBI2_2_5_V=y
|
||||
CONFIG_ACR_PIPE_DEP_4=y
|
||||
CONFIG_ACR_RPTCNT_4=y
|
||||
CONFIG_CMD_IOLOOP=y
|
||||
CONFIG_FIT=y
|
||||
CONFIG_FIT_VERBOSE=y
|
||||
|
|
|
@ -67,6 +67,8 @@ CONFIG_SICR_ETSEC2_GPIO=y
|
|||
CONFIG_SICR_GPIOSEL_IEEE1588=y
|
||||
CONFIG_SICR_TMSOBI1_2_5_V=y
|
||||
CONFIG_SICR_TMSOBI2_2_5_V=y
|
||||
CONFIG_ACR_PIPE_DEP_4=y
|
||||
CONFIG_ACR_RPTCNT_4=y
|
||||
CONFIG_CMD_IOLOOP=y
|
||||
CONFIG_FIT=y
|
||||
CONFIG_FIT_VERBOSE=y
|
||||
|
|
|
@ -74,6 +74,8 @@ CONFIG_LBLAW3_LENGTH_32_KBYTES=y
|
|||
CONFIG_HID0_FINAL_EMCP=y
|
||||
CONFIG_HID0_FINAL_ICE=y
|
||||
CONFIG_HID2_HBE=y
|
||||
CONFIG_ACR_PIPE_DEP_4=y
|
||||
CONFIG_ACR_RPTCNT_4=y
|
||||
CONFIG_FIT=y
|
||||
CONFIG_FIT_SIGNATURE=y
|
||||
CONFIG_IMAGE_FORMAT_LEGACY=y
|
||||
|
|
|
@ -107,6 +107,10 @@ CONFIG_LBLAW3_LENGTH_512_MBYTES=y
|
|||
CONFIG_HID0_FINAL_EMCP=y
|
||||
CONFIG_HID0_FINAL_ICE=y
|
||||
CONFIG_HID2_HBE=y
|
||||
CONFIG_ACR_PIPE_DEP_4=y
|
||||
CONFIG_ACR_RPTCNT_4=y
|
||||
CONFIG_ACR_APARK_MASTER=y
|
||||
CONFIG_ACR_PARKM_USB_I2C1_BOOT=y
|
||||
CONFIG_OF_BOARD_SETUP=y
|
||||
CONFIG_OF_STDOUT_VIA_ALIAS=y
|
||||
CONFIG_MISC_INIT_R=y
|
||||
|
|
|
@ -80,6 +80,10 @@ CONFIG_LBLAW3_LENGTH_512_MBYTES=y
|
|||
CONFIG_HID0_FINAL_EMCP=y
|
||||
CONFIG_HID0_FINAL_ICE=y
|
||||
CONFIG_HID2_HBE=y
|
||||
CONFIG_ACR_PIPE_DEP_4=y
|
||||
CONFIG_ACR_RPTCNT_4=y
|
||||
CONFIG_ACR_APARK_MASTER=y
|
||||
CONFIG_ACR_PARKM_USB_I2C1_BOOT=y
|
||||
CONFIG_OF_BOARD_SETUP=y
|
||||
CONFIG_OF_STDOUT_VIA_ALIAS=y
|
||||
CONFIG_MISC_INIT_R=y
|
||||
|
|
|
@ -95,6 +95,10 @@ CONFIG_LBLAW3_LENGTH_256_MBYTES=y
|
|||
CONFIG_HID0_FINAL_EMCP=y
|
||||
CONFIG_HID0_FINAL_ICE=y
|
||||
CONFIG_HID2_HBE=y
|
||||
CONFIG_ACR_PIPE_DEP_4=y
|
||||
CONFIG_ACR_RPTCNT_4=y
|
||||
CONFIG_ACR_APARK_MASTER=y
|
||||
CONFIG_ACR_PARKM_USB_I2C1_BOOT=y
|
||||
CONFIG_OF_BOARD_SETUP=y
|
||||
CONFIG_OF_STDOUT_VIA_ALIAS=y
|
||||
CONFIG_MISC_INIT_R=y
|
||||
|
|
|
@ -81,6 +81,10 @@ CONFIG_LBLAW2_LENGTH_256_MBYTES=y
|
|||
CONFIG_HID0_FINAL_EMCP=y
|
||||
CONFIG_HID0_FINAL_ICE=y
|
||||
CONFIG_HID2_HBE=y
|
||||
CONFIG_ACR_PIPE_DEP_4=y
|
||||
CONFIG_ACR_RPTCNT_4=y
|
||||
CONFIG_ACR_APARK_MASTER=y
|
||||
CONFIG_ACR_PARKM_USB_I2C1_BOOT=y
|
||||
CONFIG_OF_BOARD_SETUP=y
|
||||
CONFIG_OF_STDOUT_VIA_ALIAS=y
|
||||
CONFIG_MISC_INIT_R=y
|
||||
|
|
|
@ -82,6 +82,10 @@ CONFIG_LBLAW3_LENGTH_256_MBYTES=y
|
|||
CONFIG_HID0_FINAL_EMCP=y
|
||||
CONFIG_HID0_FINAL_ICE=y
|
||||
CONFIG_HID2_HBE=y
|
||||
CONFIG_ACR_PIPE_DEP_4=y
|
||||
CONFIG_ACR_RPTCNT_4=y
|
||||
CONFIG_ACR_APARK_MASTER=y
|
||||
CONFIG_ACR_PARKM_USB_I2C1_BOOT=y
|
||||
CONFIG_OF_BOARD_SETUP=y
|
||||
CONFIG_OF_STDOUT_VIA_ALIAS=y
|
||||
CONFIG_SYS_EXTRA_OPTIONS="KMTEGR1"
|
||||
|
|
|
@ -95,6 +95,10 @@ CONFIG_LBLAW3_LENGTH_256_MBYTES=y
|
|||
CONFIG_HID0_FINAL_EMCP=y
|
||||
CONFIG_HID0_FINAL_ICE=y
|
||||
CONFIG_HID2_HBE=y
|
||||
CONFIG_ACR_PIPE_DEP_4=y
|
||||
CONFIG_ACR_RPTCNT_4=y
|
||||
CONFIG_ACR_APARK_MASTER=y
|
||||
CONFIG_ACR_PARKM_USB_I2C1_BOOT=y
|
||||
CONFIG_OF_BOARD_SETUP=y
|
||||
CONFIG_OF_STDOUT_VIA_ALIAS=y
|
||||
CONFIG_MISC_INIT_R=y
|
||||
|
|
|
@ -96,6 +96,10 @@ CONFIG_LBLAW3_LENGTH_256_MBYTES=y
|
|||
CONFIG_HID0_FINAL_EMCP=y
|
||||
CONFIG_HID0_FINAL_ICE=y
|
||||
CONFIG_HID2_HBE=y
|
||||
CONFIG_ACR_PIPE_DEP_4=y
|
||||
CONFIG_ACR_RPTCNT_4=y
|
||||
CONFIG_ACR_APARK_MASTER=y
|
||||
CONFIG_ACR_PARKM_USB_I2C1_BOOT=y
|
||||
CONFIG_OF_BOARD_SETUP=y
|
||||
CONFIG_OF_STDOUT_VIA_ALIAS=y
|
||||
CONFIG_SYS_EXTRA_OPTIONS="KMVECT1"
|
||||
|
|
|
@ -68,6 +68,8 @@ CONFIG_SICR_GPIO_B_TSEC2=y
|
|||
CONFIG_SICR_IEEE1588_A_GPIO=y
|
||||
CONFIG_SICR_GTM_GPIO=y
|
||||
CONFIG_SICR_GPIOSEL_IEEE1588=y
|
||||
CONFIG_ACR_PIPE_DEP_4=y
|
||||
CONFIG_ACR_RPTCNT_4=y
|
||||
CONFIG_OF_BOARD_SETUP=y
|
||||
CONFIG_OF_STDOUT_VIA_ALIAS=y
|
||||
CONFIG_BOOTDELAY=5
|
||||
|
|
|
@ -66,6 +66,8 @@ CONFIG_SICR_ETSEC2_GPIO=y
|
|||
CONFIG_SICR_GPIOSEL_IEEE1588=y
|
||||
CONFIG_SICR_TMSOBI1_2_5_V=y
|
||||
CONFIG_SICR_TMSOBI2_2_5_V=y
|
||||
CONFIG_ACR_PIPE_DEP_4=y
|
||||
CONFIG_ACR_RPTCNT_4=y
|
||||
CONFIG_CMD_IOLOOP=y
|
||||
CONFIG_FIT=y
|
||||
CONFIG_FIT_VERBOSE=y
|
||||
|
|
|
@ -66,6 +66,8 @@ CONFIG_SICR_ETSEC2_GPIO=y
|
|||
CONFIG_SICR_GPIOSEL_IEEE1588=y
|
||||
CONFIG_SICR_TMSOBI1_2_5_V=y
|
||||
CONFIG_SICR_TMSOBI2_2_5_V=y
|
||||
CONFIG_ACR_PIPE_DEP_4=y
|
||||
CONFIG_ACR_RPTCNT_4=y
|
||||
CONFIG_CMD_IOLOOP=y
|
||||
CONFIG_FIT=y
|
||||
CONFIG_FIT_VERBOSE=y
|
||||
|
|
|
@ -66,6 +66,8 @@ CONFIG_SICR_ETSEC2_GPIO=y
|
|||
CONFIG_SICR_GPIOSEL_IEEE1588=y
|
||||
CONFIG_SICR_TMSOBI1_2_5_V=y
|
||||
CONFIG_SICR_TMSOBI2_2_5_V=y
|
||||
CONFIG_ACR_PIPE_DEP_4=y
|
||||
CONFIG_ACR_RPTCNT_4=y
|
||||
CONFIG_CMD_IOLOOP=y
|
||||
CONFIG_FIT=y
|
||||
CONFIG_FIT_VERBOSE=y
|
||||
|
|
|
@ -66,6 +66,8 @@ CONFIG_SICR_ETSEC2_GPIO=y
|
|||
CONFIG_SICR_GPIOSEL_IEEE1588=y
|
||||
CONFIG_SICR_TMSOBI1_2_5_V=y
|
||||
CONFIG_SICR_TMSOBI2_2_5_V=y
|
||||
CONFIG_ACR_PIPE_DEP_4=y
|
||||
CONFIG_ACR_RPTCNT_4=y
|
||||
CONFIG_CMD_IOLOOP=y
|
||||
CONFIG_FIT=y
|
||||
CONFIG_FIT_VERBOSE=y
|
||||
|
|
|
@ -95,6 +95,10 @@ CONFIG_LBLAW3_LENGTH_256_MBYTES=y
|
|||
CONFIG_HID0_FINAL_EMCP=y
|
||||
CONFIG_HID0_FINAL_ICE=y
|
||||
CONFIG_HID2_HBE=y
|
||||
CONFIG_ACR_PIPE_DEP_4=y
|
||||
CONFIG_ACR_RPTCNT_4=y
|
||||
CONFIG_ACR_APARK_MASTER=y
|
||||
CONFIG_ACR_PARKM_USB_I2C1_BOOT=y
|
||||
CONFIG_OF_BOARD_SETUP=y
|
||||
CONFIG_OF_STDOUT_VIA_ALIAS=y
|
||||
CONFIG_SYS_EXTRA_OPTIONS="SUVD3"
|
||||
|
|
|
@ -81,6 +81,10 @@ CONFIG_LBLAW2_LENGTH_256_MBYTES=y
|
|||
CONFIG_HID0_FINAL_EMCP=y
|
||||
CONFIG_HID0_FINAL_ICE=y
|
||||
CONFIG_HID2_HBE=y
|
||||
CONFIG_ACR_PIPE_DEP_4=y
|
||||
CONFIG_ACR_RPTCNT_4=y
|
||||
CONFIG_ACR_APARK_MASTER=y
|
||||
CONFIG_ACR_PARKM_USB_I2C1_BOOT=y
|
||||
CONFIG_OF_BOARD_SETUP=y
|
||||
CONFIG_OF_STDOUT_VIA_ALIAS=y
|
||||
CONFIG_MISC_INIT_R=y
|
||||
|
|
|
@ -95,6 +95,10 @@ CONFIG_LBLAW3_LENGTH_256_MBYTES=y
|
|||
CONFIG_HID0_FINAL_EMCP=y
|
||||
CONFIG_HID0_FINAL_ICE=y
|
||||
CONFIG_HID2_HBE=y
|
||||
CONFIG_ACR_PIPE_DEP_4=y
|
||||
CONFIG_ACR_RPTCNT_4=y
|
||||
CONFIG_ACR_APARK_MASTER=y
|
||||
CONFIG_ACR_PARKM_USB_I2C1_BOOT=y
|
||||
CONFIG_OF_BOARD_SETUP=y
|
||||
CONFIG_OF_STDOUT_VIA_ALIAS=y
|
||||
CONFIG_MISC_INIT_R=y
|
||||
|
|
|
@ -77,6 +77,8 @@ CONFIG_LBLAW1_LENGTH_32_KBYTES=y
|
|||
CONFIG_HID0_FINAL_EMCP=y
|
||||
CONFIG_HID0_FINAL_ICE=y
|
||||
CONFIG_HID2_HBE=y
|
||||
CONFIG_ACR_PIPE_DEP_4=y
|
||||
CONFIG_ACR_RPTCNT_4=y
|
||||
CONFIG_OF_BOARD_SETUP=y
|
||||
CONFIG_OF_STDOUT_VIA_ALIAS=y
|
||||
CONFIG_BOOTDELAY=6
|
||||
|
|
|
@ -33,11 +33,6 @@
|
|||
#define CONFIG_FSL_SERDES
|
||||
#define CONFIG_FSL_SERDES1 0xe3000
|
||||
|
||||
/*
|
||||
* Arbiter Setup
|
||||
*/
|
||||
#define CONFIG_SYS_ACR_PIPE_DEP 3 /* Arbiter pipeline depth is 4 */
|
||||
#define CONFIG_SYS_ACR_RPTCNT 3 /* Arbiter repeat count is 4 */
|
||||
#define CONFIG_SYS_SPCR_TSECEP 3 /* eTSEC emergency priority is highest */
|
||||
|
||||
/*
|
||||
|
|
|
@ -67,9 +67,6 @@
|
|||
*/
|
||||
#define CONFIG_SYS_8313ERDB_BROKEN_PMC 1
|
||||
|
||||
#define CONFIG_SYS_ACR_PIPE_DEP 3 /* Arbiter pipeline depth (0-3) */
|
||||
#define CONFIG_SYS_ACR_RPTCNT 3 /* Arbiter repeat count (0-7) */
|
||||
|
||||
/*
|
||||
* Device configurations
|
||||
*/
|
||||
|
|
|
@ -39,9 +39,6 @@
|
|||
*/
|
||||
#define CONFIG_SYS_8313ERDB_BROKEN_PMC 1
|
||||
|
||||
#define CONFIG_SYS_ACR_PIPE_DEP 3 /* Arbiter pipeline depth (0-3) */
|
||||
#define CONFIG_SYS_ACR_RPTCNT 3 /* Arbiter repeat count (0-7) */
|
||||
|
||||
/*
|
||||
* Device configurations
|
||||
*/
|
||||
|
|
|
@ -31,11 +31,6 @@
|
|||
|
||||
#define CONFIG_HWCONFIG
|
||||
|
||||
/*
|
||||
* Arbiter Setup
|
||||
*/
|
||||
#define CONFIG_SYS_ACR_PIPE_DEP 3 /* Arbiter pipeline depth is 4 */
|
||||
#define CONFIG_SYS_ACR_RPTCNT 3 /* Arbiter repeat count is 4 */
|
||||
#define CONFIG_SYS_SPCR_TSECEP 3 /* eTSEC emergency priority is highest */
|
||||
|
||||
/*
|
||||
|
|
|
@ -20,11 +20,6 @@
|
|||
*/
|
||||
#define CONFIG_SYS_SICRL 0x00000000
|
||||
|
||||
/*
|
||||
* System performance
|
||||
*/
|
||||
#define CONFIG_SYS_ACR_PIPE_DEP 3 /* Arbiter pipeline depth (0-3) */
|
||||
#define CONFIG_SYS_ACR_RPTCNT 3 /* Arbiter repeat count (0-7) */
|
||||
/* (0-1) Optimize transactions between CSB and the SEC and QUICC Engine block */
|
||||
#define CONFIG_SYS_SPCR_OPT 1
|
||||
|
||||
|
|
|
@ -328,8 +328,6 @@
|
|||
/*
|
||||
* System performance
|
||||
*/
|
||||
#define CONFIG_SYS_ACR_PIPE_DEP 3 /* Arbiter pipeline depth (0-3) */
|
||||
#define CONFIG_SYS_ACR_RPTCNT 3 /* Arbiter repeat count (0-7) */
|
||||
#define CONFIG_SYS_SPCR_TSEC1EP 3 /* TSEC1 emergency priority (0-3) */
|
||||
#define CONFIG_SYS_SPCR_TSEC2EP 3 /* TSEC2 emergency priority (0-3) */
|
||||
#define CONFIG_SYS_SCCR_TSEC1CM 1 /* TSEC1 clock mode (0-3) */
|
||||
|
|
|
@ -383,8 +383,6 @@
|
|||
/*
|
||||
* System performance
|
||||
*/
|
||||
#define CONFIG_SYS_ACR_PIPE_DEP 3 /* Arbiter pipeline depth (0-3) */
|
||||
#define CONFIG_SYS_ACR_RPTCNT 3 /* Arbiter repeat count (0-7) */
|
||||
#define CONFIG_SYS_SPCR_TSEC1EP 3 /* TSEC1 emergency priority (0-3) */
|
||||
#define CONFIG_SYS_SPCR_TSEC2EP 3 /* TSEC2 emergency priority (0-3) */
|
||||
#define CONFIG_SYS_SCCR_TSEC1CM 1 /* TSEC1 clock mode (0-3) */
|
||||
|
|
|
@ -403,8 +403,6 @@ boards, we say we have two, but don't display a message if we find only one. */
|
|||
/*
|
||||
* System performance
|
||||
*/
|
||||
#define CONFIG_SYS_ACR_PIPE_DEP 3 /* Arbiter pipeline depth (0-3) */
|
||||
#define CONFIG_SYS_ACR_RPTCNT 3 /* Arbiter repeat count (0-7) */
|
||||
#define CONFIG_SYS_SPCR_TSEC1EP 3 /* TSEC1 emergency priority (0-3) */
|
||||
#define CONFIG_SYS_SPCR_TSEC2EP 3 /* TSEC2 emergency priority (0-3) */
|
||||
#define CONFIG_SYS_SCCR_TSEC1CM 1 /* TSEC1 clock mode (0-3) */
|
||||
|
|
|
@ -12,10 +12,6 @@
|
|||
*/
|
||||
#define CONFIG_E300 1 /* E300 family */
|
||||
|
||||
/* Arbiter Configuration Register */
|
||||
#define CONFIG_SYS_ACR_PIPE_DEP 3 /* Arbiter pipeline depth is 4 */
|
||||
#define CONFIG_SYS_ACR_RPTCNT 3 /* Arbiter repeat count is 4 */
|
||||
|
||||
/* System Priority Control Register */
|
||||
#define CONFIG_SYS_SPCR_TSECEP 3 /* eTSEC1/2 emergency has highest priority */
|
||||
|
||||
|
|
|
@ -23,10 +23,6 @@
|
|||
/* System performance - define the value i.e. CONFIG_SYS_XXX
|
||||
*/
|
||||
|
||||
/* Arbiter Configuration Register */
|
||||
#define CONFIG_SYS_ACR_PIPE_DEP 3 /* Arbiter pipeline depth (0-3) */
|
||||
#define CONFIG_SYS_ACR_RPTCNT 3 /* Arbiter repeat count (0-7) */
|
||||
|
||||
/* System Priority Control Regsiter */
|
||||
#define CONFIG_SYS_SPCR_TSECEP 3 /* eTSEC1&2 emergency priority (0-3) */
|
||||
|
||||
|
|
|
@ -21,11 +21,6 @@
|
|||
#define CONFIG_FSL_SERDES
|
||||
#define CONFIG_FSL_SERDES1 0xe3000
|
||||
|
||||
/*
|
||||
* Arbiter Setup
|
||||
*/
|
||||
#define CONFIG_SYS_ACR_PIPE_DEP 3 /* Arbiter pipeline depth is 4 */
|
||||
#define CONFIG_SYS_ACR_RPTCNT 3 /* Arbiter repeat count is 4 */
|
||||
#define CONFIG_SYS_SPCR_TSECEP 3 /* eTSEC emergency priority is highest */
|
||||
|
||||
/*
|
||||
|
|
|
@ -20,9 +20,6 @@
|
|||
#define CONFIG_BOOT_RETRY_MIN 30
|
||||
#define CONFIG_RESET_TO_RETRY
|
||||
|
||||
#define CONFIG_SYS_ACR_PIPE_DEP 3 /* Arbiter pipeline depth (0-3) */
|
||||
#define CONFIG_SYS_ACR_RPTCNT 3 /* Arbiter repeat count (0-7) */
|
||||
|
||||
#define CONFIG_SYS_SICRH 0x00000000
|
||||
#define CONFIG_SYS_SICRL (SICRL_LBC | SICRL_SPI_D)
|
||||
|
||||
|
|
|
@ -40,14 +40,6 @@
|
|||
#define CONFIG_SYS_CLK_FREQ 66000000
|
||||
#define CONFIG_83XX_PCICLK 66000000
|
||||
|
||||
/*
|
||||
* Bus Arbitration Configuration Register (ACR)
|
||||
*/
|
||||
#define CONFIG_SYS_ACR_PIPE_DEP 3 /* pipeline depth 4 transactions */
|
||||
#define CONFIG_SYS_ACR_RPTCNT 3 /* 4 consecutive transactions */
|
||||
#define CONFIG_SYS_ACR_APARK 0 /* park bus to master (below) */
|
||||
#define CONFIG_SYS_ACR_PARKM 3 /* parking master = QuiccEngine */
|
||||
|
||||
/*
|
||||
* DDR Setup
|
||||
*/
|
||||
|
|
|
@ -25,14 +25,6 @@
|
|||
#include "km/keymile-common.h"
|
||||
#include "km/km-powerpc.h"
|
||||
|
||||
/*
|
||||
* Bus Arbitration Configuration Register (ACR)
|
||||
*/
|
||||
#define CONFIG_SYS_ACR_PIPE_DEP 3 /* pipeline depth 4 transactions */
|
||||
#define CONFIG_SYS_ACR_RPTCNT 3 /* 4 consecutive transactions */
|
||||
#define CONFIG_SYS_ACR_APARK 0 /* park bus to master (below) */
|
||||
#define CONFIG_SYS_ACR_PARKM 3 /* parking master = QuiccEngine */
|
||||
|
||||
/*
|
||||
* DDR Setup
|
||||
*/
|
||||
|
|
|
@ -45,14 +45,6 @@
|
|||
#define CONFIG_SYS_CLK_FREQ 66000000
|
||||
#define CONFIG_83XX_PCICLK 66000000
|
||||
|
||||
/*
|
||||
* Bus Arbitration Configuration Register (ACR)
|
||||
*/
|
||||
#define CONFIG_SYS_ACR_PIPE_DEP 3 /* pipeline depth 4 transactions */
|
||||
#define CONFIG_SYS_ACR_RPTCNT 3 /* 4 consecutive transactions */
|
||||
#define CONFIG_SYS_ACR_APARK 0 /* park bus to master (below) */
|
||||
#define CONFIG_SYS_ACR_PARKM 3 /* parking master = QuiccEngine */
|
||||
|
||||
/*
|
||||
* DDR Setup
|
||||
*/
|
||||
|
|
|
@ -45,14 +45,6 @@
|
|||
#define CONFIG_SYS_CLK_FREQ 66000000
|
||||
#define CONFIG_83XX_PCICLK 66000000
|
||||
|
||||
/*
|
||||
* Bus Arbitration Configuration Register (ACR)
|
||||
*/
|
||||
#define CONFIG_SYS_ACR_PIPE_DEP 3 /* pipeline depth 4 transactions */
|
||||
#define CONFIG_SYS_ACR_RPTCNT 3 /* 4 consecutive transactions */
|
||||
#define CONFIG_SYS_ACR_APARK 0 /* park bus to master (below) */
|
||||
#define CONFIG_SYS_ACR_PARKM 3 /* parking master = QuiccEngine */
|
||||
|
||||
/*
|
||||
* DDR Setup
|
||||
*/
|
||||
|
|
|
@ -52,14 +52,6 @@
|
|||
#define CONFIG_SYS_CLK_FREQ 66000000
|
||||
#define CONFIG_83XX_PCICLK 66000000
|
||||
|
||||
/*
|
||||
* Bus Arbitration Configuration Register (ACR)
|
||||
*/
|
||||
#define CONFIG_SYS_ACR_PIPE_DEP 3 /* pipeline depth 4 transactions */
|
||||
#define CONFIG_SYS_ACR_RPTCNT 3 /* 4 consecutive transactions */
|
||||
#define CONFIG_SYS_ACR_APARK 0 /* park bus to master (below) */
|
||||
#define CONFIG_SYS_ACR_PARKM 3 /* parking master = QuiccEngine */
|
||||
|
||||
/*
|
||||
* DDR Setup
|
||||
*/
|
||||
|
|
|
@ -45,14 +45,6 @@
|
|||
#define CONFIG_SYS_CLK_FREQ 66000000
|
||||
#define CONFIG_83XX_PCICLK 66000000
|
||||
|
||||
/*
|
||||
* Bus Arbitration Configuration Register (ACR)
|
||||
*/
|
||||
#define CONFIG_SYS_ACR_PIPE_DEP 3 /* pipeline depth 4 transactions */
|
||||
#define CONFIG_SYS_ACR_RPTCNT 3 /* 4 consecutive transactions */
|
||||
#define CONFIG_SYS_ACR_APARK 0 /* park bus to master (below) */
|
||||
#define CONFIG_SYS_ACR_PARKM 3 /* parking master = QuiccEngine */
|
||||
|
||||
/*
|
||||
* DDR Setup
|
||||
*/
|
||||
|
|
|
@ -44,14 +44,6 @@
|
|||
#define CONFIG_SYS_CLK_FREQ 66000000
|
||||
#define CONFIG_83XX_PCICLK 66000000
|
||||
|
||||
/*
|
||||
* Bus Arbitration Configuration Register (ACR)
|
||||
*/
|
||||
#define CONFIG_SYS_ACR_PIPE_DEP 3 /* pipeline depth 4 transactions */
|
||||
#define CONFIG_SYS_ACR_RPTCNT 3 /* 4 consecutive transactions */
|
||||
#define CONFIG_SYS_ACR_APARK 0 /* park bus to master (below) */
|
||||
#define CONFIG_SYS_ACR_PARKM 3 /* parking master = QuiccEngine */
|
||||
|
||||
/*
|
||||
* DDR Setup
|
||||
*/
|
||||
|
|
|
@ -36,11 +36,6 @@
|
|||
#define CONFIG_FSL_SERDES
|
||||
#define CONFIG_FSL_SERDES1 0xe3000
|
||||
|
||||
/*
|
||||
* Arbiter Setup
|
||||
*/
|
||||
#define CONFIG_SYS_ACR_PIPE_DEP 3 /* Arbiter pipeline depth is 4 */
|
||||
#define CONFIG_SYS_ACR_RPTCNT 3 /* Arbiter repeat count is 4 */
|
||||
#define CONFIG_SYS_SPCR_TSECEP 3 /* eTSEC emergency priority is highest */
|
||||
|
||||
/*
|
||||
|
|
|
@ -21,11 +21,6 @@
|
|||
#define CONFIG_FSL_SERDES
|
||||
#define CONFIG_FSL_SERDES1 0xe3000
|
||||
|
||||
/*
|
||||
* Arbiter Setup
|
||||
*/
|
||||
#define CONFIG_SYS_ACR_PIPE_DEP 3 /* Arbiter pipeline depth is 4 */
|
||||
#define CONFIG_SYS_ACR_RPTCNT 3 /* Arbiter repeat count is 4 */
|
||||
#define CONFIG_SYS_SPCR_TSECEP 3 /* eTSEC emergency priority is highest */
|
||||
|
||||
/*
|
||||
|
|
|
@ -42,14 +42,6 @@
|
|||
#define CONFIG_SYS_CLK_FREQ 66000000
|
||||
#define CONFIG_83XX_PCICLK 66000000
|
||||
|
||||
/*
|
||||
* Bus Arbitration Configuration Register (ACR)
|
||||
*/
|
||||
#define CONFIG_SYS_ACR_PIPE_DEP 3 /* pipeline depth 4 transactions */
|
||||
#define CONFIG_SYS_ACR_RPTCNT 3 /* 4 consecutive transactions */
|
||||
#define CONFIG_SYS_ACR_APARK 0 /* park bus to master (below) */
|
||||
#define CONFIG_SYS_ACR_PARKM 3 /* parking master = QuiccEngine */
|
||||
|
||||
/*
|
||||
* DDR Setup
|
||||
*/
|
||||
|
|
|
@ -45,14 +45,6 @@
|
|||
#define CONFIG_SYS_CLK_FREQ 66000000
|
||||
#define CONFIG_83XX_PCICLK 66000000
|
||||
|
||||
/*
|
||||
* Bus Arbitration Configuration Register (ACR)
|
||||
*/
|
||||
#define CONFIG_SYS_ACR_PIPE_DEP 3 /* pipeline depth 4 transactions */
|
||||
#define CONFIG_SYS_ACR_RPTCNT 3 /* 4 consecutive transactions */
|
||||
#define CONFIG_SYS_ACR_APARK 0 /* park bus to master (below) */
|
||||
#define CONFIG_SYS_ACR_PARKM 3 /* parking master = QuiccEngine */
|
||||
|
||||
/*
|
||||
* DDR Setup
|
||||
*/
|
||||
|
|
|
@ -45,14 +45,6 @@
|
|||
#define CONFIG_SYS_CLK_FREQ 66000000
|
||||
#define CONFIG_83XX_PCICLK 66000000
|
||||
|
||||
/*
|
||||
* Bus Arbitration Configuration Register (ACR)
|
||||
*/
|
||||
#define CONFIG_SYS_ACR_PIPE_DEP 3 /* pipeline depth 4 transactions */
|
||||
#define CONFIG_SYS_ACR_RPTCNT 3 /* 4 consecutive transactions */
|
||||
#define CONFIG_SYS_ACR_APARK 0 /* park bus to master (below) */
|
||||
#define CONFIG_SYS_ACR_PARKM 3 /* parking master = QuiccEngine */
|
||||
|
||||
/*
|
||||
* DDR Setup
|
||||
*/
|
||||
|
|
|
@ -27,9 +27,6 @@
|
|||
#define CONFIG_SYS_MEMTEST_START 0x00001000
|
||||
#define CONFIG_SYS_MEMTEST_END 0x07000000
|
||||
|
||||
#define CONFIG_SYS_ACR_PIPE_DEP 3 /* Arbiter pipeline depth */
|
||||
#define CONFIG_SYS_ACR_RPTCNT 3 /* Arbiter repeat count */
|
||||
|
||||
/*
|
||||
* Device configurations
|
||||
*/
|
||||
|
|
|
@ -1919,10 +1919,6 @@ CONFIG_SYS_64BIT_VSPRINTF
|
|||
CONFIG_SYS_66MHZ
|
||||
CONFIG_SYS_8313ERDB_BROKEN_PMC
|
||||
CONFIG_SYS_83XX_DDR_USES_CS0
|
||||
CONFIG_SYS_ACR_APARK
|
||||
CONFIG_SYS_ACR_PARKM
|
||||
CONFIG_SYS_ACR_PIPE_DEP
|
||||
CONFIG_SYS_ACR_RPTCNT
|
||||
CONFIG_SYS_ADDRESS_MAP_A
|
||||
CONFIG_SYS_ADV7611_I2C
|
||||
CONFIG_SYS_ALT_BOOT
|
||||
|
|
Loading…
Reference in a new issue