As recommended by Arm in [1], ACTLR[0] (Enable invalidates of BTB)
needs to be set[2] for BTB to be invalidated on ICIALLU. This needs to
be done unconditionally for Cortex-A15 processors. Provide a config
option for platforms to enable this option based on impact analysis
for products.
NOTE: This patch in itself is NOT the final solution, this requires:
a) Implementation of v7_arch_cp15_set_acr on SoCs which may not
provide direct access to ACR register.
b) Operating Systems such as Linux to provide adequate workaround in the
right locations.
c) This workaround applies to only the boot processor. It is important
to apply workaround as necessary (context-save-restore) around low
power context loss OR additional processors as necessary in either
firmware support OR elsewhere in OS.
[1] https://developer.arm.com/support/security-update
[2] http://infocenter.arm.com/help/topic/com.arm.doc.ddi0438c/BABGHIBG.html
Cc: Marc Zyngier <marc.zyngier@arm.com>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Tony Lindgren <tony@atomide.com>
Cc: Robin Murphy <robin.murphy@arm.com>
Cc: Florian Fainelli <f.fainelli@gmail.com>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Will Deacon <will.deacon@arm.com>
Cc: Christoffer Dall <christoffer.dall@linaro.org>
Cc: Andre Przywara <Andre.Przywara@arm.com>
Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Cc: Tom Rini <trini@konsulko.com>
Cc: Michael Nazzareno Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Tested-by: Fabio Estevam <fabio.estevam@nxp.com>
As recommended by Arm in [1], IBE[2] has to be enabled unconditionally
for BPIALL to be functional on Cortex-A8 processors. Provide a config
option for platforms to enable this option based on impact analysis
for products.
NOTE: This patch in itself is NOT the final solution, this requires:
a) Implementation of v7_arch_cp15_set_acr on SoCs which may not
provide direct access to ACR register.
b) Operating Systems such as Linux to provide adequate workaround in the right
locations.
c) This workaround applies to only the boot processor. It is important
to apply workaround as necessary (context-save-restore) around low
power context loss OR additional processors as necessary in either
firmware support OR elsewhere in OS.
[1] https://developer.arm.com/support/security-update
[2] http://infocenter.arm.com/help/topic/com.arm.doc.ddi0344k/Bgbffjhh.html
Cc: Marc Zyngier <marc.zyngier@arm.com>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Tony Lindgren <tony@atomide.com>
Cc: Robin Murphy <robin.murphy@arm.com>
Cc: Florian Fainelli <f.fainelli@gmail.com>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Will Deacon <will.deacon@arm.com>
Cc: Christoffer Dall <christoffer.dall@linaro.org>
Cc: Andre Przywara <Andre.Przywara@arm.com>
Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Cc: Tom Rini <trini@konsulko.com>
Cc: Michael Nazzareno Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Tested-by: Fabio Estevam <fabio.estevam@nxp.com>
Masking clock gate, reset register bits based on the
probed controller is proper only due to the assumption
that masking should start with 0 even thought the controller
has separate PHY or shared between OTG.
unfortunately these are fixed due to lack of separate
clock, reset drivers.
Say for example EHCI1 - EHCI3 in the datasheet (EHCI0 is for the OTG)
so we need to start reg_mask 0 - 2.
This patch calculated the mask, based on the register base
so that we can get the proper bits to set with respect to
probed controller.
We even do this masking by using PHY index specifier from dt,
but dev_read_addr_size is failing for 64-bit boards.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
This patch update the USB PHY index for Allwinner H3.
Same change[1] initially sent, by 'Chen-Yu Tai' but missed
to apply due to recursive version changes on the same series.
[1] https://lists.denx.de/pipermail/u-boot/2018-January/318817.html
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
fdt_file is looking for imx6ul-geam-kit.dtb but Linux
has imx6ul-geam.dtb, since Linux skipped -kit on file name
by below commit.
"ARM: dts: imx6ul-geam: Skip suffix -kit from dts name"
(sha1: 182de5ebce71e469cfa686fcdf08c9cbe11ece97)
So, due to this mismatch U-Boot failed to pick the
proper dtb which eventually break the Linux boot.
This patch fixed this mismatch by
- renaming dts files
- update config option to use new dtb file
- update fdt_file to new dtb file name
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Now that the clock-frequency information has been moved to the
driver, more DT sync is possible.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Use the clk framework to initialize clocks from drivers that need them
instead of having hardcoded frequencies and initializations from board
code.
Signed-off-by: Beniamino Galvani <b.galvani@gmail.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Introduce a basic clock driver for Amlogic Meson SoCs which supports
enabling/disabling clock gates and getting their frequency.
Signed-off-by: Beniamino Galvani <b.galvani@gmail.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
cpu_cmd() is reading cpu number via simple_strtoul() which is always
unsigned type.
Platform code implementations are not expecting that nr can be negative
and there is not checking in the code for that too.
This patch is using u32 type for cpu number to make sure that platform
code get proper value range.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Add option to the booti_setup() which indicates to it that the caller
requires the image to be relocated to the beginning of the RAM and
that the information whether the image can be located anywhere in RAM
at 2 MiB aligned boundary or not is to be ignored. This is useful ie.
in case the Image is wrapped in another envelope, ie. fitImage and not
relocating it but moving it would corrupt the envelope.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Bin Chen <bin.chen@linaro.org>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: Tom Rini <trini@konsulko.com>
Reviewed-By: Bin Chen <bin.chen@linaro.org>
Add regulator nodes and pinmux settings to the SDHI3 on E3 Ebisu
and enable HS200 mode on it.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Both the RAVB and SH ether driver now support parsing the PHY reset
GPIOs from both the PHY nodes and the MAC nodes, move the reset GPIOs
back into the PHY nodes to minimize DT difference between U-Boot and
Linux.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
The current state of RAVB driver expects the PHY reset GPIO in the
RAVB mode, move it back from the PHY node to avoid breakage.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
When CMD_GPIO is enabled the command 'gpio status -a' can cause
a hang or reboot if GPIO banks are not enabled, because it scans
all banks. This patch enables all GPIO banks so 'gpio status -a'
can fully execute.
Signed-off-by: Adam Ford <aford173@gmail.com>
When an exception or interrupt occurs the link register (LR) may
contain the source of the exception, although we do not print the
value it may still be extracted with a debugger. When in SPL we
loop on getting and exception, but use a linking branch, which
over-writes the LR value, use a regular branch instruction here.
Signed-off-by: Andrew F. Davis <afd@ti.com>
Follow Linux commit 10b62a2f785a (".gitignore: move *.dtb and *.dtb.S
patterns to the top-level .gitignore").
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
This patch prevents from the situation where we may end up with garbage
displayed on the LCD panel.
Such situation occurs when one performs "reboot -f" in Linux and then
stop in U-boot (or observe the garbage on the screen during boot up).
To prevent from such situation - the PWM pin is configured as GPIO and set
to LOW.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
If many values differ from the defaults, overriding the full table
is simpler and more space efficient than tweaking it through
mxs_adjust_memory_params().
Signed-off-by: Mans Rullgard <mans@mansr.com>
According to the Cortex-A7 TRM, for ACTLR.SMP bit "You must ensure this bit
is set to 1 before the caches and MMU are enabled, or any cache and TLB
maintenance operations are performed".
ROM sets this bit in normal boot flow, but when in serial download mode,
it is not set.
Here we add it in u-boot as a common flow for all i.MX cortex-a7 platforms,
including mx7d, mx6ul/ull and mx7ulp.
Signed-off-by: Ye Li <ye.li@nxp.com>
[fabio: adapted to U-Boot mainline codebase and make checkpatch happy]
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Orange Pi Zero Plus is an open-source single-board computer
using the Allwinner H5 SOC.
H5 Orangepi Zero Plus has
- Quad-core Cortex-A53
- 512MB DDR3
- micrSD slot
- 16MBit SPI Nor flash
- Debug TTL UART
- 1GBit/s Ethernet (RTL8211E)
- Wifi (RTL8189FTV)
- USB 2.0 Host
- USB 2.0 OTG + power supply
The device tree file is copied from the Linux kernel 4.17.
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Orange Pi R1 is an open-source single-board computer using the
Allwinner H2+ SOC.
H2+ Orange Pi R1 has
- Quad-core Cortex-A7
- 256MB DDR3
- micrSD slot
- 128MBit SPI Nor flash
- Debug TTL UART
- 100MBit/s Ethernet (H2+)
- 100MBit/s Ethernet (RTL8152B)
- Wifi (RTL8189ETV)
- USB 2.0 OTG + power supply
This board is very similar to the Orange Pi Zero.
The device tree file is copied from the Linux kernel 4.17.
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Add EtherAVB PHY reset on V3M Eagle to let the AVB driver unreset the PHY.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Add EtherAVB pinmux node on V3M Eagle to set the pinmux configuration.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Add device tree nodes for the Renesas RPC HF/QSPI controller
to R8A77990 E3.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
There should be return value check from zynqmp_mmio_read() in
zynqmp_mmio_rawwrite() to make sure that errors are propagated properly.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
dtc is showing some warnings and this change was also done in
the Linux kernel as "Input: gpio-keys - clean up device tree binding
example"
with this fragment in commit message
"Drop #address-cells and #size-cells, which are not required by the
gpio-keys binding documentation, as button sub-nodes are not devices."
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
This patch splits the current mini emmc configuration into emmc0
and emmc1 configurations because emmc is probed at boot time and on
systems which have only one interface mini configuration is failing on
unused interface. This patch also adds required clock node in dts and
enables CONFIG_MMC_SDHCI_ZYNQ through defconfig.
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
We currently handle the UEFI runtime reset / power off case handling via
a switch statement. Compilers (gcc in my case) may opt to handle these via
jump tables which they may conveniently put into .rodata which is not part
of the runtime section, so it will be unreachable when executed.
Fix this by just converting the switch statement into an if/else statement.
It produces smaller code that is faster and also correct because we no
longer refer .rodata from efi runtime code.
Reported-by: Andreas Färber <aferber@suse.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
Synchronize the Linux Device Tree for Amlogic Meson GX boards from Linux 4.17.0
This will enable USB on Amlogic Meson GXL Boards like Khadas VIM, P212 or
LibreTech-CC.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
The helios4 is built on the SolidRun Armada 38x SOM.
The port os based on the ClearFog board, using information from
https://github.com/helios-4/u-boot-marvell as well as dtb input
from https://github.com/helios-4/linux-marvell
Signed-off-by: Dennis Gilmore <dennis@ausil.us>
Signed-off-by: Dennis Gilmore <dgilmore@redhat.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Added the following:
1. defconfig for LS1012AFRWY Secure boot
2. PfE Validation support
Signed-off-by: Vinitha V Pillai <vinitha.pillai@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
FRWY-LS1012A belongs to LS1012A family with features 2 1G SGMII PFE
MAC, Micro SD, USB 3.0, DDR, QuadSPI, Audio, UART.
Signed-off-by: Bhaskar Upadhaya <Bhaskar.Upadhaya@nxp.com>
[yorks: rebase and fix SPDX tag]
[yorks: fix board/freescale/ls1012afrdm/Kconfig]
Reviewed-by: York Sun <york.sun@nxp.com>
PPA firmware and header address may vary depending upon different
boards, configure ppa firmware and header address in board specific
Kconfig.
Signed-off-by: Vinitha V Pillai <vinitha.pillai@nxp.com>
Signed-off-by: Jagdish Gediya <jagdish.gediya@nxp.com>
Signed-off-by: Bhaskar Upadhaya <Bhaskar.Upadhaya@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
The lowlevel_init function uses r4 and r6 without preserving their
values as required by the AAPCS. Use r0 and r2 instead as these
are call-clobbered.
Signed-off-by: Mans Rullgard <mans@mansr.com>
Reviewed-by: Chris Packham <judge.packham@gmail.com>
Since commit 0e373c0ade ("spl: add SPL_RESET_SUPPORT"),
reset is supported in SPL, enable this flag for STM32F SoCs family.
This allows to remove a specific case in RCC mfd driver.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
This is a series of line cards for Allied Telesis's SBx8100 chassis
switch. The CPU block is common to the SBx81GS24a, SBx81XS6, SBx81XS16
and SBx81GT40 cards collectively referred to as SBx81LIFKW in u-boot.
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Signed-off-by: Stefan Roese <sr@denx.de>
The mach/config.h file would helpfully define CONFIG_SYS_I2C and
CONFIG_SYS_I2C_MVTWSI if CONFIG_CMD_I2C was defined by the board. This
conflicts with the way DM_I2C works. As a transitional measure don't
automatically define these if CONFIG_DM_I2C is defined. It should be
possible to remove this once all kirkwood boards are migrated to DM.
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
This patch shows how to enable driver model support for the LS-CHLv2 and
LS-XHL boards.
There are a couple of open questions:
- do I need the u-boot,dm-pre-reloc tags in the device tree?
- should mach/config.h define CONFIG_DM_SEQ_ALIAS?
- how can we split this patch or are there any other pending patches
which does the same and I didn't catch these.
This patch is based on the http://git.denx.de/u-boot-marvell.git (master
branch) and needs the following patches, which are still pending:
https://patchwork.ozlabs.org/patch/909618/https://patchwork.ozlabs.org/patch/909617/https://patchwork.ozlabs.org/patch/909973/
Signed-off-by: Michael Walle <michael@walle.cc>
Tested-by: Michael Walle <michael@walle.cc>
Signed-off-by: Stefan Roese <sr@denx.de>
This switches the clearfog boards to use DM based gpio and i2c
drivers. The io expanders are configured via their device-tree
entries.
Signed-off-by: Jon Nettleton <jon@solid-run.com>
[baruch: add DT i2c aliases]
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Reviewed-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
Some QCA988x based modules presence is not detected by the SERDES lanes,
so force this detection which will trigger the LTSSM state machine to
negotiate link.
An example of such a card is WLE900VX.
Signed-off-by: Rabeeh Khoury <rabeeh@solid-run.com>
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Tested-by: Chris Packham <judge.packham@gmail.com>
Tested-by: Mario Six <mario.six@gdsys.cc>
Signed-off-by: Stefan Roese <sr@denx.de>
u-boot,dm-pre-reloc was missing from pinctrl and it's
children node. causing failure to configure pin mux
before relocation.
Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
This undocumented function relies on arch-specific code to declare a nop
weak version. Add the weak function in common code instead to avoid having
to duplicate the same function in each arch.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
The UEFI spec mandates that unaligned memory access should be enabled if
supported by the CPU architecture.
This patch implements the function unaligned_access() to reset the aligned
access flag in the system control register (SCTLR). It is called when the
bootefi command is invoked.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
[agraf: fix SPDX identifier]
Signed-off-by: Alexander Graf <agraf@suse.de>
This patch adds support for loading secure bitstreams on ZynqMP
platforms. The secure bitstream images has to be generated using
Xilinx bootgen tool.
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Import the R8A77990 and Ebisu DTS from linux-next to get the latest
version. This makes AVB ethernet work in U-Boot since the ethernet
node is now present in DT, as well as GPIOs.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Basic support for the Renesas Ebisu board based on R-Car E3:
- Memory,
- Main crystal,
- Serial console,
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
[shimoda: rebase and add SPDX-License-Identifier]
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
This patch adds basic support for the Renesas R-Car E3 (R8A77990) SoC:
- PSCI
- CPU (single)
- Cache controller
- Main clocks and controller
- Interrupt controller
- Timer
- PMU
- Reset controller
- Product register
- System controller
- UART for console
Inspried by a patch by Takeshi Kihara in the BSP.
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Add ID and Kconfig entry for the Renesas R8A77990 E3 SoC.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
PS clock(LPD_APB_CLK) is default clock for TTC. Add this clock
entry in TTC nodes.
Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Card detect bit was broken on revA and it is working fine with revC
board that's why this property can be removed.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
This is control board on Bitmain Antminer S9.
There are 3 board variables with 256MB, 512MB and 1024MB DDR.
DDR memory is automatically detected with using get_with using
get_ram_size().
Bitmain is using 16MB space for FPGA which is handled via
reserved-memory. Also U-Boot is allocating 16B for storing bootcounts.
Watchdog is started but never service in U-Boot.
SPL MMC is working. SPL NAND is not working because it is not supported
as of now.
Signed-off-by: Ezequiel Garcia <ezequiel@vanguardiasur.com.ar>
Signed-off-by: Michal Simek <monstr@monstr.eu>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Existing EEMI version is to as 1.0 (available from xilinx v2018.1
version). Update required API version to match with EEMI API version.
New PMUFW version is required for operations with programmable logic.
Signed-off-by: Rajan Vaja <rajanv@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
ZynqMP emulation platforms are no longer tested and supported that's why
remove macros and code around.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Read reset reason reg and show it in log and also save it as variable.
Clearing reset reason when it is read to show only one status
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Overriding fastboot_set_reboot_flag() in arch/arm/mach-omap2/boot-common.c
leaves it applying all boards that derive from this, not just the ones which
have support for Android bootloader flow. Move the weak function override to
the relevant board files.
Signed-off-by: Alex Kiernan <alex.kiernan@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Rename fb_set_reboot_flag to fastboot_set_reboot_flag so it matches
all other fastboot code in the global name space. Fix the guards around
them so that they're dependent on FASTBOOT, not just USB_FUNCTION_FASTBOOT.
Move the weak implementation of fastboot_set_reboot_flag to fb_common.c
so we can call it from non-USB fastboot code.
Signed-off-by: Alex Kiernan <alex.kiernan@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Ensure that when selecting FASTBOOT_FLASH you end up with a buildable
configuration. Prior to this you could select NAND without MTDPARTS
and end up with an image which (surprisingly) excluded NAND.
Also fix dependencies on FASTBOOT_GPT_NAME/FASTBOOT_MBR_NAME which require
you have EFI_PARTITION/DOS_PARTITION enabled.
Delete redundant FASTBOOT_FLASH_NAND_DEV from Kconfig - it was only ever
used as a guard and the value was ignored in all cases, we're using
FASTBOOT_FLASH_NAND as the guard now.
Signed-off-by: Alex Kiernan <alex.kiernan@gmail.com>
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
Separate CMD_FASTBOOT from FASTBOOT and move code and configuration to
drivers/fastboot.
Switch dependencies on FASTBOOT to USB_FUNCTION_FASTBOOT as anyone who wants
FASTBOOT before this series wants USB_FUNCTION_FASTBOOT. Split
USB_FUNCTION_FASTBOOT from FASTBOOT so they retain their existing
behaviour.
Signed-off-by: Alex Kiernan <alex.kiernan@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
The missing clock causes serial_msm driver probe to fail.
Added a dummy node so the probe succeeds, as the clock init
currently in db820c is empty.
Fixes: 11d59fe537 ("serial: serial_msm: fail probe if settings clocks fails")
Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Currently mvebu sata driver is in arch/arm/mach_mvebu directory, this
patch moves it to drivers/ata directory with renaming "sata.c" to
"ahci_mvebu.c" which is aligned to Linux.
New ahci driver's kconfig option is added as AHCI_MVEBU which selects
SCSI_AHCI and is based on AHCI.
Signed-off-by: Ken Ma <make@marvell.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Stefan Roese <sr@denx.de>
Enable SDHCI interface on AP and CP0 in A80x0 DTS files
Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Evan Wang <xswang@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
For pinctrl driver of mvebu, the compatible strings
supported are defined differently from Linux version.
The patch aligned the compatible string with
Linux 4.17-rc4.
Signed-off-by: Evan Wang <xswang@marvell.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
Import the dts files from Linux 4.17 and enable CONFIG_OF_CONTROL.
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Import the dts files from Linux 4.17 and enable CONFIG_OF_CONTROL.
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Import the dts files from Linux 4.17 and enable CONFIG_OF_CONTROL.
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Signed-off-by: Stefan Roese <sr@denx.de>
