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arm: mvebu: switch clearfog to use device-tree i2c and gpio
This switches the clearfog boards to use DM based gpio and i2c drivers. The io expanders are configured via their device-tree entries. Signed-off-by: Jon Nettleton <jon@solid-run.com> [baruch: add DT i2c aliases] Signed-off-by: Baruch Siach <baruch@tkos.co.il> Reviewed-by: Chris Packham <judge.packham@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Stefan Roese <sr@denx.de>
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d6db446f70
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4 changed files with 8 additions and 29 deletions
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@ -62,6 +62,8 @@
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ethernet2 = ð1;
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ethernet3 = ð2;
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spi1 = &spi1;
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i2c0 = &i2c0;
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i2c1 = &i2c1;
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};
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chosen {
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@ -32,22 +32,6 @@ DECLARE_GLOBAL_DATA_PTR;
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#define BOARD_GPP_POL_LOW 0x0
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#define BOARD_GPP_POL_MID 0x0
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/* IO expander on Marvell GP board includes e.g. fan enabling */
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struct marvell_io_exp {
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u8 chip;
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u8 addr;
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u8 val;
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};
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static struct marvell_io_exp io_exp[] = {
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{ 0x20, 2, 0x40 }, /* Deassert both mini pcie reset signals */
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{ 0x20, 6, 0xf9 },
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{ 0x20, 2, 0x46 }, /* rst signals and ena USB3 current limiter */
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{ 0x20, 6, 0xb9 },
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{ 0x20, 3, 0x00 }, /* Set SFP_TX_DIS to zero */
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{ 0x20, 7, 0xbf }, /* Drive SFP_TX_DIS to zero */
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};
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static struct serdes_map board_serdes_map[] = {
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{SATA0, SERDES_SPEED_3_GBPS, SERDES_DEFAULT_MODE, 0, 0},
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{SGMII1, SERDES_SPEED_1_25_GBPS, SERDES_DEFAULT_MODE, 0, 0},
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@ -126,8 +110,6 @@ int board_early_init_f(void)
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int board_init(void)
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{
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int i;
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/* Address of boot parameters */
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gd->bd->bi_boot_params = mvebu_sdram_bar(0) + 0x100;
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@ -142,10 +124,6 @@ int board_init(void)
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setbits_le32(MVEBU_GPIO0_BASE + 0x0, BIT(19));
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mdelay(10);
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/* Init I2C IO expanders */
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for (i = 0; i < ARRAY_SIZE(io_exp); i++)
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i2c_write(io_exp[i].chip, io_exp[i].addr, 1, &io_exp[i].val, 1);
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return 0;
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}
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@ -1,6 +1,7 @@
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CONFIG_ARM=y
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CONFIG_ARCH_MVEBU=y
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CONFIG_SYS_TEXT_BASE=0x00800000
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CONFIG_SPL_GPIO_SUPPORT=y
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CONFIG_SPL_LIBCOMMON_SUPPORT=y
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CONFIG_SPL_LIBGENERIC_SUPPORT=y
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CONFIG_SYS_MALLOC_F_LEN=0x2000
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@ -21,6 +22,7 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y
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CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x141
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CONFIG_SPL_I2C_SUPPORT=y
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# CONFIG_CMD_FLASH is not set
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CONFIG_CMD_GPIO=y
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CONFIG_CMD_I2C=y
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CONFIG_CMD_MMC=y
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CONFIG_CMD_PCI=y
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@ -36,6 +38,10 @@ CONFIG_ENV_IS_IN_MMC=y
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CONFIG_NET_RANDOM_ETHADDR=y
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CONFIG_SPL_OF_TRANSLATE=y
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CONFIG_SCSI_AHCI=y
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CONFIG_DM_GPIO=y
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CONFIG_DM_PCA953X=y
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CONFIG_DM_I2C=y
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CONFIG_SYS_I2C_MVTWSI=y
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CONFIG_MMC_SDHCI=y
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CONFIG_MMC_SDHCI_SDMA=y
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CONFIG_MMC_SDHCI_MV=y
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@ -21,13 +21,6 @@
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* Commands configuration
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*/
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/* I2C */
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#define CONFIG_SYS_I2C
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#define CONFIG_SYS_I2C_MVTWSI
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#define CONFIG_I2C_MVTWSI_BASE0 MVEBU_TWSI_BASE
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#define CONFIG_SYS_I2C_SLAVE 0x0
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#define CONFIG_SYS_I2C_SPEED 100000
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/* SPI NOR flash default params, used by sf commands */
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#define CONFIG_SF_DEFAULT_BUS 1
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