Commit graph

22992 commits

Author SHA1 Message Date
Shengzhou Liu
35c471e509 powerpc/t208x: some update to support t2081
- fix serdes definition for t2081.
- fix clock speed for t2081.
- update ids, as CONFIG_FSL_SATA_V2 is needed only for t2080,
  T2081 has no SATA.

Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2014-02-24 15:22:36 -08:00
Alexey Brodkin
22a240c32c serial/serial_arc - add driver for ARC UART
Driver for non-standard on-chip UART, instantiated in the ARC (Synopsys)
FPGA Boards such as ARCAngel4/ML50x

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>

Cc: Mischa Jonker <mjonker@synopsys.com>
Cc: Francois Bedard <fbedard@synopsys.com>
Cc: Tom Rini <trini@ti.com>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
2014-02-07 12:55:07 -05:00
Tom Rini
1a78d28d02 x600: Switch to CONFIG_PHYLIB
Now that the designware ethernet driver uses phylib we need to turn it
on here.

Acked-by: Stefan Roese <sr@denx.de>
Signed-off-by: Tom Rini <trini@ti.com>
2014-02-07 09:18:35 -05:00
Alexey Brodkin
50b0df814b net/designware: make driver compatible with data cache
Up until now this driver only worked with data cache disabled.
To make it work with enabled data cache following changes were required:

 * Flush Tx/Rx buffer descriptors their modification
 * Invalidate Tx/Rx buffer descriptors before reading its values
 * Flush cache for data passed from CPU to GMAC
 * Invalidate cache for data passed from GMAC to CPU

Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Vipin Kumar <vipin.kumar@st.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Mischa Jonker <mjonker@synopsys.com>
Cc: Shiraz Hashim <shiraz.hashim@st.com>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Cc: Amit Virdi <amit.virdi@st.com>
Cc: Sonic Zhang <sonic.zhang@analog.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2014-02-07 09:17:05 -05:00
Alexey Brodkin
92a190aaab net/designware - switch driver to phylib usage
With this change driver will benefit from existing phylib and thus
custom phy functionality implemented in the driver will go away:
 * Instantiation of the driver is now much shorter - 2 parameters
instead of 4.
 * Simplified phy management/functoinality in driver is replaced with
rich functionality of phylib.
 * Support of custom phy initialization is now done with existing
"board_phy_config".

Note that after this change some previously used config options
(driver-specific PHY configuration) will be obsolete and they are simply
substituted with similar options of phylib.

For example:
 * CONFIG_DW_AUTONEG - no need in this one. Autonegotiation is enabled
by default.
 * CONFIG_DW_SEARCH_PHY - if one wants to specify attached phy
explicitly CONFIG_PHY_ADDR board config option has to be used, otherwise
automatically the first discovered on MDIO bus phy will be used

I believe there's no need now in "doc/README.designware_eth" because
user only needs to instantiate the driver with "designware_initialize"
whose prototype exists in "include/netdev.h".

Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Vipin Kumar <vipin.kumar@st.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Mischa Jonker <mjonker@synopsys.com>
Cc: Shiraz Hashim <shiraz.hashim@st.com>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Cc: Amit Virdi <amit.virdi@st.com>
Cc: Sonic Zhang <sonic.zhang@analog.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2014-02-07 09:16:46 -05:00
Alexey Brodkin
27ee59af28 net: execute "miiphy_init" if CONFIG_PHYLIB defined
In "common/Makefile" "miiphyutil.o" gets built if any of the following
items enabled:
 * CONFIG_PHYLIB
 * CONFIG_MII
 * CONFIG_CMD_MII

So it's possible to not define CONFIG_MII or CONFIG_CMD_MII and still
use functions like "miiphy_get_dev_by_name".

In its turn "miiphy_get_dev_by_name" traverses "mii_devs" list which is
not initialized because "miiphy_init" never got called.

Cc: Rob Herring <rob.herring@calxeda.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Wolfgang Denk <wd@denx.de>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2014-02-07 09:16:36 -05:00
Alexey Brodkin
74cb708d58 net/designware: add explicit reset of {tx|rx}_currdescnum
Driver "init" function might be called multiple times.
On every "init" Tx/Rx buffer descriptors are initialized: "descs_init"
-> "{tx|rx}_descs_init".

In its turn those init functions set MAC's "{tx|rx}desclistaddr" to
point on the first buffer descriptor in the list.

So CPU to start operation from the first buffer descriptor as well after
every "init" we have to reset "{tx|rx}_currdescnum".

Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Vipin Kumar <vipin.kumar@st.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Mischa Jonker <mjonker@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2014-02-07 09:16:26 -05:00
Alexey Brodkin
bde237368a arc: add README for architecture
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>

Cc: Vineet Gupta <vgupta@synopsys.com>
Cc: Francois Bedard <fbedard@synopsys.com>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Heiko Schocher <hs@denx.de>
2014-02-07 08:14:34 -05:00
Alexey Brodkin
568c1fade9 arc: add architecture to MAKEALL
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>

Cc: Vineet Gupta <vgupta@synopsys.com>
Cc: Francois Bedard <fbedard@synopsys.com>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Heiko Schocher <hs@denx.de>
2014-02-07 08:14:33 -05:00
Alexey Brodkin
a7069ddfa9 arc: add AXS101 board support
AXS101 is a new generation of devlopment boards from Synopsys that houses
ASIC with ARC700 and lots of DesignWare peripherals:

 * DW APB UART
 * DW Mobile Storage (MMC/SD)
 * DW I2C
 * DW GMAC

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>

Cc: Vineet Gupta <vgupta@synopsys.com>
Cc: Francois Bedard <fbedard@synopsys.com>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Heiko Schocher <hs@denx.de>
2014-02-07 08:14:33 -05:00
Alexey Brodkin
66712b8b46 arc: add Arcangel4 board support
Arcangel4 is a FPGA-based development board that is used for prototyping and
verificationof of both ARC hardware (CPUs) and software running upon CPU.

This board avaialble in 2 flavours:
 * Little-endian (arcangel4)
 * Big-endian (arcangel4-be)

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>

Cc: Vineet Gupta <vgupta@synopsys.com>
Cc: Francois Bedard <fbedard@synopsys.com>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Heiko Schocher <hs@denx.de>
2014-02-07 08:14:33 -05:00
Alexey Brodkin
794ab57497 arc: add support for standalone programs
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>

Cc: Vineet Gupta <vgupta@synopsys.com>
Cc: Francois Bedard <fbedard@synopsys.com>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Heiko Schocher <hs@denx.de>
2014-02-07 08:14:33 -05:00
Alexey Brodkin
bc5d542880 arc: bdinfo, image and arc-specific init functions declarations support
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>

Cc: Vineet Gupta <vgupta@synopsys.com>
Cc: Francois Bedard <fbedard@synopsys.com>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Heiko Schocher <hs@denx.de>
2014-02-07 08:14:33 -05:00
Alexey Brodkin
2272382879 arc: add library functions
These are library functions used by ARC700 architecture.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>

Cc: Vineet Gupta <vgupta@synopsys.com>
Cc: Francois Bedard <fbedard@synopsys.com>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Heiko Schocher <hs@denx.de>
2014-02-07 08:14:32 -05:00
Alexey Brodkin
2f16ac9df4 arc: add cpu files
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>

Cc: Vineet Gupta <vgupta@synopsys.com>
Cc: Francois Bedard <fbedard@synopsys.com>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Heiko Schocher <hs@denx.de>
2014-02-07 08:14:32 -05:00
Alexey Brodkin
288aaacf2d arc: add architecture header files
These are header files used by ARC700 architecture.

Also note that "arch-arc700/hardware.h" is only required for compilation of
"designware_i2c" driver which refers to "asm/arch/hardware.h".
It would be good to fix mentioned driver sometime soon but it will cause
changes in ARM board configs that use "designware_i2c".

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>

Cc: Vineet Gupta <vgupta@synopsys.com>
Cc: Francois Bedard <fbedard@synopsys.com>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Heiko Schocher <hs@denx.de>
2014-02-07 08:14:32 -05:00
Aaron Wu
819ca38fa7 blackfin: Initialize the EMAC VLAN with proper default value
EMAC_VLANx regs is not properly initiallized in u-boot, once it's overwrite in the
kernel when DSA enabled, hot reset will lead to bringing up EMAC fail in u-boot.

Signed-off-by: Aaron Wu <Aaron.Wu@analog.com>
Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
2014-02-07 11:18:06 +08:00
Sonic Zhang
861aa63d6b blackfin: Change SMC dcplb entry flag to cover 16M address region
Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
2014-02-07 11:18:06 +08:00
Bob Liu
28bfc40ce9 blackfin: init bss early
Signed-off-by: Bob Liu <lliubbo@gmail.com>
Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
2014-02-07 11:18:06 +08:00
Sonic Zhang
ab784696fc blackfin: The logic of the BF609 macro is opposite.
Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
2014-02-07 11:18:06 +08:00
Tom Rini
dbf3de2dd2 include/usb/s3c_udc.h: Add <asm/sizes.h>
With e0059ea switching to using SZ_1K, we need to #include <asm/sizes.h>
here for everyone to build still.

Signed-off-by: Tom Rini <trini@ti.com>
2014-02-06 14:26:05 -05:00
Tom Rini
6e94258e25 Merge branch 'fpga' of git://www.denx.de/git/u-boot-microblaze 2014-02-06 11:20:23 -05:00
Michal Simek
31993d6a35 fpga: zynqpl: Add support for zc7015 device
Just extend tables with this new device.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2014-02-06 10:08:14 +01:00
Novasys Ingenierie
c83a35f652 fpga: zynq: Correct fpga load when buf is not aligned
When ARCH_DMA_MINALIGN is greater than header size of the bit file, and buf is
not aligned, new_buf address became greater then buf_start address and the
load_word loop corrupts bit file data.

A work around is to decrease new_buf of ARCH_DMA_MINALIGN, it might corrupt data
before buf but permits to load correctly.

Signed-off-by: Stany MARCEL <smarcel@novasys-ingenierie.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2014-02-06 10:08:03 +01:00
Marek Vasut
f016f8ca3d usb: mv_udc: Rename to ci_udc
The mv_udc is not marvell-specific anymore. The mv_udc is used to drive
generic ChipIdea CI13xxx series OTG cores, so rename the driver to ci_udc
instead.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Eric Nelson <eric.nelson@boundarydevices.com>
Cc: Stefano Babic <sbabic@denx.de>
2014-02-06 04:48:15 +01:00
Lukasz Majewski
fc2d5d04e1 usb:gadget:f_thor: cosmetic: Remove debug memset
Apparently debug memset (with a 0x55 value) has been overlooked in the
f_thor code.

Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Cc: Marek Vasut <marex@denx.de>
2014-02-06 02:22:45 +01:00
Lukasz Majewski
84c13e6f61 usb:gadget:f_thor: Allocate request up to THOR_PACKET_SIZE not ep->maxpacket
Now it is possible to allocate static request - which receives data from
the host (OUT transaction) to the size of THOR packet.

Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Cc: Marek Vasut <marex@denx.de>
2014-02-06 02:22:45 +01:00
Lukasz Majewski
e0059eaef1 usb:udc:samsung: Zero copy approach for data passed to Samsung's UDC driver
The Samsung's UDC driver is not anymore copying data from USB requests to
aligned internal buffers. Now it works directly in data allocated in the
upper layers like UMS, DFU, THOR.

This change is possible since those gadgets now must take care to allocate
buffers aligned to cache line (CONFIG_SYS_CACHELINE_SIZE).

This can be achieved by using DEFINE_CACHE_ALIGN_BUFFER() or
ALLOC_CACHE_ALIGN_BUFFER() macros. Those take care to allocate buffer
aligned to cache line in both starting address and its size.
Sometimes it is enough to just use memalign() with size being a
multiplication of cache line size.

Test condition
- test HW + measurement: Trats - Exynos4210 rev.1
- test HW Trats2 - Exynos4412 rev.1
400 MiB compressed rootfs image download with `thor 0 mmc 0`

Measurement:
Transmission speed: 27.04 MiB/s

Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Cc: Marek Vasut <marex@denx.de>
2014-02-06 02:22:45 +01:00
Lukasz Majewski
9c9822188c usb:udc:samsung: Allow burst transfers for non EP0 endpints
This patch removed obscure restriction on the HW setting of DMA transfers.
Before this change each transaction sent up to 512 bytes (with packet count
equal to 1) for non EP0 transfer.

Now it is possible to setup DMA transaction up to DMA_BUFFER_SIZE.

Test condition
- test HW + measurement: Trats - Exynos4210 rev.1
- test HW Trats2 - Exynos4412 rev.1
400 MiB compressed rootfs image download with `thor 0 mmc 0`

Measurement:
Transmission speed: 20.74 MiB/s

Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Cc: Marek Vasut <marex@denx.de>
2014-02-06 02:22:45 +01:00
Lukasz Majewski
716662bd19 usb:udc:samsung: Remove redundant cache operation from Samsung UDC driver
A set of cache operations (both invalidation and flush) were redundant
in the S3C HS OTG Samsung driver:

1. s3c_udc_ep0_zlp - to transmit EP0's ZLP packets one don't need to flush
the cache (since it is the zero length transmission)

2. s3c_udc_pre_setup and s3c_ep0_complete_out - cache invalidation is not
needed when the buffer for OUT EP0 transmission is setup, since no data
has yet arrived.

Cache cleanups presented above don't contribute much to transmission speed
up, hence shall be regarded as cosmetic changes.

3. setdma_rx - here the s3c UDC driver's internal buffers were invalidated.
This call is not needed anymore since we reuse the buffers passed from
gadgets. This is a key contribution to transmission speed improvement.

Test condition
- test HW + measurement: Trats - Exynos4210 rev.1
- test HW Trats2 - Exynos4412 rev.1
400 MiB compressed rootfs image download with `thor 0 mmc 0`

Measurements:

Base values (without improvement):
Transmission speed: 9.51 MiB/s

After the change:
Transmission speed: 10.15 MiB/s

Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Cc: Marek Vasut <marex@denx.de>
2014-02-06 02:22:45 +01:00
Lukasz Majewski
16b7a29fc6 usb:gadget:ums: Replace malloc calls with memalign to fix cache buffer alignment
Calls to malloc() have been replaced by memalign. It now provides proper
buffer alignment.

Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Cc: Marek Vasut <marex@denx.de>
2014-02-06 02:22:44 +01:00
Tom Rini
e141652b9c config: Fix line lengths in include/config_distro_defaults.h
Signed-off-by: Tom Rini <trini@ti.com>
2014-02-05 08:04:38 -05:00
Dennis Gilmore
13a49c3a73 config: add config_distro_defaults.h
describe a set of default features that distros can rely on being available.
having this common definition means that distros can easily support systems
implementing them.

Signed-off-by: Dennis Gilmore <dennis@ausil.us>
2014-02-04 17:29:44 -05:00
Dennis Gilmore
6d1a3e5fa1 cmd_pxe.c add any option for filesystem with sysboot uses generic load
Signed-off-by: Dennis Gilmore <dennis@ausil.us>
2014-02-04 17:29:36 -05:00
Tom Rini
0d74665059 Merge branch 'serial' of git://www.denx.de/git/u-boot-microblaze 2014-02-04 11:51:21 -05:00
Tom Rini
f763be224f Merge branch 'net' of git://www.denx.de/git/u-boot-microblaze 2014-02-04 11:51:20 -05:00
Tom Rini
9c1d0e9f16 Merge branch 'master' of git://www.denx.de/git/u-boot-microblaze 2014-02-04 11:51:20 -05:00
Tom Rini
c3a6e51c6f Merge branch 'clk' of git://www.denx.de/git/u-boot-microblaze 2014-02-04 11:51:20 -05:00
Tom Rini
b66af14dc9 Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx 2014-02-04 11:51:20 -05:00
Stephen Warren
c61d94d860 pxe: implement fdtdir extlinux.conf tag
People who write (or scripts that auto-generate) extlinux.conf don't
want to know about HW-specific information such as FDT filenames. Create
a new extlinux.conf tag "fdtdir" that specifies only the directory where
FDT files are located, and defer all knowledge of the filename to U-Boot.
The algorithm implemented is:

==========
if $fdt_addr_r is set:
  if "fdt" tag was specified in extlinux.conf:
    load the FDT from the filename in the tag
  else if "fdtdir" tag was specified in extlinux.conf:
    if "fdtfile" is set in the environment:
      load the FDT from filename in "$fdtfile"
    else:
      load the FDT from some automatically generated filename

if no FDT file was loaded, and $fdtaddr is set:
  # This indicates an FDT packaged with firmware
  use the FDT at $fdtaddr
==========

A small part of an example /boot/extlinux.conf might be:

==========
LABEL primary
        LINUX zImage
        FDTDIR ./

LABEL failsafe
        LINUX bkp/zImage
        FDTDIR bkp/
==========

... with /boot/tegra20-seaboard.dtb or /boot/bkp/tegra20-seaboard.dtb
being loaded by the sysboot/pxe code.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
2014-02-04 11:51:18 -05:00
Stephen Warren
f43c401b72 pxe: support "devicetree" tag
The specification for extlinux.conf[1] states that "fdt" is an alias for
"devicetree". To date, U-Boot only implements "fdt". Rectify that.

[1] http://freedesktop.org/wiki/Specifications/BootLoaderSpec/

Signed-off-by: Stephen Warren <swarren@nvidia.com>
2014-02-04 11:51:18 -05:00
Michal Simek
8c3bd6b596 serial: uartlite: Reset RX/TX in init
Just to be sure that there is no pending data.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2014-02-04 16:48:57 +01:00
Michal Simek
6f9b93723a net: axi_emac: Check if phy was correctly detected
As tsec and fm drivers checking phydev->link
ensure that u-boot don't try access device if link is not ready.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2014-02-04 16:42:45 +01:00
Michal Simek
9d24274509 microblaze: Add SPL support
Add support for U-BOOT SPL. NOR and RAM mode are supported.
There are 3 images in NOR flash. u-boot.img, dtb and kernel.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2014-02-04 16:39:50 +01:00
Michal Simek
22ff7f4d19 microblaze: Enable buffer write for NOR flashes
It speeds up writing a lot.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2014-02-04 16:39:37 +01:00
Michal Simek
ef2c1d8583 microblaze: Report priviledged or stack protection exception
Just list one more exception.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2014-02-04 16:39:25 +01:00
Michal Simek
6ba64f24a4 microblaze: Show u-boot banner
It is nice to see u-boot version.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2014-02-04 16:39:25 +01:00
Michal Simek
08d0d6f32e common: Add new clk command
Command provides just dump subcommand for showing clock
frequencies in a soc.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Stefano Babic <sbabic@denx.de>
2014-02-04 16:32:20 +01:00
Prabhakar Kushwaha
1b4175d6fa driver/ifc:Change accessor function to take care of endianness
IFC registers can be of type Little Endian or big Endian depending upon
Freescale SoC. Here SoC defines the register type of IFC IP.

So update acessor functions with common IFC acessor functions to take care
both type of endianness.

Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Acked-by: York Sun <yorksun@freescale.com>
2014-02-03 08:38:51 -08:00
Valentin Longchamp
27c78e06f2 kmp204x: initial support for PCIe FPGA configuration
The PEXHC PCIe configuration mechanism ensures that the FPGA get
configured at power-up. Since all the PCIe devices should be configured
when the kernel start, u-boot has to take care that the FPGA gets
configured also in other reset scenarios, mostly because of possible
configuration change.

The used mechanism is taken from the km_kirkwood design and adapted to
the kmp204x case (slightly different HW and PCIe configuration).

Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2014-02-03 08:38:51 -08:00