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fpga: zynq: Correct fpga load when buf is not aligned
When ARCH_DMA_MINALIGN is greater than header size of the bit file, and buf is not aligned, new_buf address became greater then buf_start address and the load_word loop corrupts bit file data. A work around is to decrease new_buf of ARCH_DMA_MINALIGN, it might corrupt data before buf but permits to load correctly. Signed-off-by: Stany MARCEL <smarcel@novasys-ingenierie.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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@ -187,6 +187,16 @@ int zynq_load(Xilinx_desc *desc, const void *buf, size_t bsize)
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if ((u32)buf != ALIGN((u32)buf, ARCH_DMA_MINALIGN)) {
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u32 *new_buf = (u32 *)ALIGN((u32)buf, ARCH_DMA_MINALIGN);
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/*
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* This might be dangerous but permits to flash if
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* ARCH_DMA_MINALIGN is greater than header size
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*/
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if (new_buf > buf_start) {
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debug("%s: Aligned buffer is after buffer start\n",
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__func__);
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new_buf -= ARCH_DMA_MINALIGN;
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}
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printf("%s: Align buffer at %x to %x(swap %d)\n", __func__,
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(u32)buf_start, (u32)new_buf, swap);
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