Commit graph

18 commits

Author SHA1 Message Date
Wolfgang Denk
1a4596601f Add GPL-2.0+ SPDX-License-Identifier to source files
Signed-off-by: Wolfgang Denk <wd@denx.de>
[trini: Fixup common/cmd_io.c]
Signed-off-by: Tom Rini <trini@ti.com>
2013-07-24 09:44:38 -04:00
Simon Glass
67ac13b1b9 ppc: Move lbc_clk and cpu to arch_global_data
Move these fields into arch_global_data and tidy up.

Signed-off-by: Simon Glass <sjg@chromium.org>
[trini: Update for bsc9132qds.c, b4860qds.c]
Signed-off-by: Tom Rini <trini@ti.com>
2013-02-04 09:04:57 -05:00
Timur Tabi
5d065c3e10 powerpc/85xx: don't display address map size (32-bit vs. 36-bit) during boot
Most 85xx boards can be built as a 32-bit or a 36-bit.  Current code sometimes
displays which of these is actually built, but it's inconsistent.  This is
especially problematic since the "default" build for a given 85xx board can
be either one, so if you don't see a message, you can't always know which
size is being used.  Not only that, but each board includes code that displays
the message, so there is duplication.

The 'bdinfo' command has been updated to display this information, so
we don't need to display it at boot time.  The board-specific code is
deleted.

Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2012-04-24 23:58:34 -05:00
Ramneek Mehresh
a311db6941 powerpc/85xx: Make inclusion of USB device fixup conditional
Include call to usb device-fixup only when CONFIG_HAS_FSL_DR_USB is
defined for the platform - P1020RDB, P1010RDB, P1020-PC

Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-11-08 08:36:04 -06:00
Ramneek Mehresh
86dda50484 qoriq/p1_p2_rdb: USB device-tree fixups for P1020
Resolve P1020 second USB controller multiplexing with eLBC
	- mandatory to mention USB2 in hwconfig string to select it
	  over eLBC, otherwise USB2 node is removed
	- works only for SPI and SD boot

Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-07-11 13:24:20 -05:00
Ramneek Mehresh
2bad42a0c8 powerpc/85xx: Add support for 2nd USB controller on p1_p2_rdb
Second USB controller only works for SPI and SD boot because of pin muxing

Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com>
2011-04-27 22:29:03 -05:00
Andy Fleming
063c12633d tsec: Convert tsec to use PHY Lib
This converts tsec to use the new PHY Lib.  All of the old PHY support
is ripped out.  The old MDIO driver is split off, and placed in
fsl_mdio.c.  The initialization is modified to initialize the MDIO
driver as well.  The powerpc config file is modified to configure PHYLIB
if TSEC_ENET is configured.

Signed-off-by: Mingkai Hu <Mingkai.hu@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Acked-by: Detlev Zundel <dzu@denx.de>
2011-04-20 15:09:34 -05:00
Poonam Aggrwal
e0082f7cb4 powerpc/85xx: Add 36-bit physical addressing support for P1_P2_RDB
Add support for 36-bit address map for NOR, SD, and SPI boot cfgs.

Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Priyanka Jain <priyanka.jain@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-04-04 09:24:42 -05:00
Poonam Aggrwal
3313b20b95 powerpc/85xx: Removed P1/P2 RDB RevB support
RevB boards never really made it outside of Freescale and have been
replaced with RevC & RevD which had various board bug fixes.

Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-04-04 09:24:42 -05:00
Priyanka Jain
cac29f25fd powerpc/85xx: Read board switch settings on p1_p2_rdb
PCA9557 is parallel I/O expansion device on I2C bus which stores various
board switch settings like NOR Flash-Bank selection, SD Data width.

On board:
switch SW5[6] is to select width for eSDHC
        ON  - 4-bit [Enable eSPI]
        OFF - 8-bit [Disable eSPI]

switch SW4[8] is to select NOR Flash Bank for Booting
        OFF - Primary Bank
        ON  - Secondary Bank

Read board switch settings on p1_p2_rdb and configure corresponding
eSDHC width.

Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com>
Signed-off-by: Dipen Dudhat <dipen.dudhat@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-04-04 09:24:42 -05:00
Kumar Gala
561e710a97 powerpc: Move cpu specific lmb reserve to arch_lmb_reserve
We've been utilizing board_lmb_reserve to reserve the boot page for MP
systems.  We can just move this into arch_lmb_reserve for 85xx & 86xx
systems rather than duplicating in each board port.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-04-04 09:24:40 -05:00
Prabhakar Kushwaha
b707090432 ppc/85xx: Fix compile err when PCI disabled on P1_P2_RDB
u-boot cannot be compiled after disabling CONFIG_PCI.

Place PCI related codes under #ifdef CONFIG_PCI

Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-01-19 22:58:24 -06:00
Kumar Gala
058d7dc7ba powerpc/85xx: Cleanup SGMII detection and reporting
Use new is_serdes_configured to determine if TSECs are in SGMII mode and
report that on the various boards that use or can be configured in SGMII
mode in board_eth_init() instead of in the PCI init code.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-01-14 01:32:19 -06:00
Priyanka Jain
39c2a6eb75 p1_p2_rdb: to set SQW/INT pin of RTC as INT line
SQW/INT pin in RTC can be used for generating square wave(by default) or
as interrupt line.  U-boot is registering this pin for interrupts.
Configuring SQW/INT bit as interrupt line during board initialization
to avoid spurious interrupts generated by square wave.

Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-11-12 09:45:11 -06:00
Poonam Aggrwal
75997dc54f 85xx/p1_p2_rdb: Added RevD board version support
- Also modified the code to use io accessors.

Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Dipen Dudhat <dipen.dudhat@freescale.com>
Acked-by: Kumar Gala <galak@kernel.crashing.org>
2010-06-29 21:07:26 +02:00
Kumar Gala
1749c3da8d ppc/85xx: Fixup PCI nodes for P1_P2_RDB
While we had ft_pci_board_setup it wasn't being called by
ft_board_setup.  Fix that so we actually update the device tree PCI
nodes on P1_P2_RDB boards.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-04-26 22:37:50 -05:00
Kumar Gala
5fb6ea3ad3 ppc/85xx: Make flash TLB entry determined at runtime on FSL boards
Rather than hard coding which TLB entry the FLASH is mapped with we can
use find_tlb_idx to determine the entry.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-01-05 13:49:08 -06:00
Poonam Aggrwal
728ece343e 85xx: Add support for P2020RDB board
The code base adds P1 & P2 RDB platforms support.
The folder and file names can cater to future SOCs of P1/P2 family.
P1 & P2 processors are 85xx platforms, part of Freescale QorIQ series.

Tested following on P2020RDB:
1. eTSECs
2. DDR, NAND, NOR, I2C.

Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-08-28 17:12:38 -05:00