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powerpc/85xx: don't display address map size (32-bit vs. 36-bit) during boot

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Most 85xx boards can be built as a 32-bit or a 36-bit.  Current code sometimes
displays which of these is actually built, but it's inconsistent.  This is
especially problematic since the "default" build for a given 85xx board can
be either one, so if you don't see a message, you can't always know which
size is being used.  Not only that, but each board includes code that displays
the message, so there is duplication.

The 'bdinfo' command has been updated to display this information, so
we don't need to display it at boot time.  The board-specific code is
deleted.

Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
This commit is contained in:
Timur Tabi 2012-03-15 11:42:27 +00:00 committed by Andy Fleming
parent 34e210f5bd
commit 5d065c3e10
11 changed files with 9 additions and 52 deletions
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4
board/freescale/corenet_ds/corenet_ds.c
View file

@ -62,10 +62,6 @@ int checkboard (void)
else
printf("invalid setting of SW%u\n", PIXIS_LBMAP_SWITCH);
#ifdef CONFIG_PHYS_64BIT
puts("36-bit Addressing\n");
#endif
/* Display the RCW, so that no one gets confused as to what RCW
* we're actually using for this boot.
*/

7
board/freescale/mpc8536ds/mpc8536ds.c
View file

@ -68,12 +68,7 @@ int checkboard (void)
u8 vboot;
u8 *pixis_base = (u8 *)PIXIS_BASE;
puts("Board: MPC8536DS ");
#ifdef CONFIG_PHYS_64BIT
puts("(36-bit addrmap) ");
#endif
printf ("Sys ID: 0x%02x, "
printf("Board: MPC8536DS Sys ID: 0x%02x, "
"Sys Ver: 0x%02x, FPGA Ver: 0x%02x, ",
in_8(pixis_base + PIXIS_ID), in_8(pixis_base + PIXIS_VER),
in_8(pixis_base + PIXIS_PVER));

6
board/freescale/mpc8572ds/mpc8572ds.c
View file

@ -45,11 +45,7 @@ int checkboard (void)
u8 vboot;
u8 *pixis_base = (u8 *)PIXIS_BASE;
puts ("Board: MPC8572DS ");
#ifdef CONFIG_PHYS_64BIT
puts ("(36-bit addrmap) ");
#endif
printf ("Sys ID: 0x%02x, "
printf("Board: MPC8572DS Sys ID: 0x%02x, "
"Sys Ver: 0x%02x, FPGA Ver: 0x%02x, ",
in_8(pixis_base + PIXIS_ID), in_8(pixis_base + PIXIS_VER),
in_8(pixis_base + PIXIS_PVER));

3
board/freescale/mpc8641hpcn/mpc8641hpcn.c
View file

@ -50,9 +50,6 @@ int checkboard(void)
else
puts ("Promjet\n");
#ifdef CONFIG_PHYS_64BIT
printf (" 36-bit physical address map\n");
#endif
return 0;
}

6
board/freescale/p1010rdb/p1010rdb.c
View file

@ -165,11 +165,7 @@ int checkboard(void)
struct cpu_type *cpu;
cpu = gd->cpu;
printf("Board: %sRDB ", cpu->name);
#ifdef CONFIG_PHYS_64BIT
puts("(36-bit addrmap)");
#endif
puts("\n");
printf("Board: %sRDB\n", cpu->name);
return 0;
}

8
board/freescale/p1022ds/p1022ds.c
View file

@ -56,12 +56,8 @@ int checkboard(void)
{
u8 sw;
puts("Board: P1022DS ");
#ifdef CONFIG_PHYS_64BIT
puts("(36-bit addrmap) ");
#endif
printf("Sys ID: 0x%02x, Sys Ver: 0x%02x, FPGA Ver: 0x%02x, ",
printf("Board: P1022DS Sys ID: 0x%02x, "
"Sys Ver: 0x%02x, FPGA Ver: 0x%02x, ",
in_8(&pixis->id), in_8(&pixis->arch), in_8(&pixis->scver));
sw = in_8(&PIXIS_SW(PIXIS_LBMAP_SWITCH));

4
board/freescale/p1_p2_rdb/p1_p2_rdb.c
View file

@ -110,9 +110,7 @@ int checkboard (void)
cpu = gd->cpu;
printf ("Board: %sRDB Rev%c\n", cpu->name, board_rev);
#ifdef CONFIG_PHYS_64BIT
puts ("(36-bit addrmap) \n");
#endif
setbits_be32(&pgpio->gpdir, GPIO_DIR);
/*

8
board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c
View file

@ -225,13 +225,7 @@ int checkboard(void)
ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
u8 in, out, io_config, val;
printf("Board: %s ", CONFIG_BOARDNAME);
#ifdef CONFIG_PHYS_64BIT
puts("(36-bit addrmap) ");
#endif
printf("CPLD: V%d.%d PCBA: V%d.0\n",
printf("Board: %s CPLD: V%d.%d PCBA: V%d.0\n", CONFIG_BOARDNAME,
in_8(&cpld_data->cpld_rev_major) & 0x0F,
in_8(&cpld_data->cpld_rev_minor) & 0x0F,
in_8(&cpld_data->pcba_rev) & 0x0F);

8
board/freescale/p2020ds/p2020ds.c
View file

@ -61,12 +61,8 @@ int checkboard(void)
{
u8 sw;
puts("Board: P2020DS ");
#ifdef CONFIG_PHYS_64BIT
puts("(36-bit addrmap) ");
#endif
printf("Sys ID: 0x%02x, Sys Ver: 0x%02x, FPGA Ver: 0x%02x, ",
printf("Board: P2020DS Sys ID: 0x%02x, "
"Sys Ver: 0x%02x, FPGA Ver: 0x%02x, ",
in_8(&pixis->id), in_8(&pixis->arch), in_8(&pixis->scver));
sw = in_8(&PIXIS_SW(PIXIS_LBMAP_SWITCH));

4
board/freescale/p2041rdb/p2041rdb.c
View file

@ -54,10 +54,6 @@ int checkboard(void)
sw = CPLD_READ(fbank_sel);
printf("vBank: %d\n", sw & 0x1);
#ifdef CONFIG_PHYS_64BIT
puts("36-bit Addressing\n");
#endif
/*
* Display the RCW, so that no one gets confused as to what RCW
* we're actually using for this boot.

3
board/freescale/p3060qds/p3060qds.c
View file

@ -68,9 +68,6 @@ int checkboard(void)
else
printf("invalid setting of SW%u\n", PIXIS_LBMAP_SWITCH);
#ifdef CONFIG_PHYS_64BIT
puts("36-bit Addressing\n");
#endif
puts("Reset Configuration Word (RCW):");
for (i = 0; i < ARRAY_SIZE(gur->rcwsr); i++) {
u32 rcw = in_be32(&gur->rcwsr[i]);