Commit graph

7884 commits

Author SHA1 Message Date
Kever Yang
69aaec0bca rockchip: dts: rk3328: add aliases for mmc controller
Add aliases for mmc controller to get a fixed order with
emmc at index 0 and sdmmc at index 1.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-07-11 10:08:19 -06:00
Andrew F. Davis
9e58d4dbe3 arm: mach-keystone: Modify secure image size before copy
The size of the secure image does not include the size of the
header, subtract this out before we move the image or we grab
extra data after the image.

Signed-off-by: Andrew F. Davis <afd@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
2017-07-10 14:26:05 -04:00
Lokesh Vutla
7bdc6947d2 ARM: dts: OMAP5+: Enable gpio in SPL
gpio2 is used to detect lcd based on which pin mux is done in SPL.
gpio7 is used to enable vtt regulator. Enable these two gpio nodes
in SPL.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2017-07-10 14:26:04 -04:00
Lokesh Vutla
3c9c4a2c50 arm: omap4+: Enable spl_early_init()
Enable spl_early_init() so that spl can use
DT very early during boot.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2017-07-10 14:26:04 -04:00
Lokesh Vutla
4bd754d8ab arm: omap: Detect boot mode very early
ROM stores the boot params information in a known location
and passes it to SPL. This information needs to be copied
very early during boot or else there is a chance of getting
corrupted by SPL. So move this boot device detection very early
during boot.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2017-07-10 14:26:04 -04:00
Jorge Ramirez-Ortiz
d754254f20 ARM64: poplar: hi3798cv200: u-boot support for Poplar 96Boards
This port adds support for:
        1) Serial
        2) eMMC
        3) USB

It has been tested with ARM TRUSTED FIRMWARE running u-boot as the
BL33 executable [see board's README]

eMMC has been tested for reading and booting the loader and linux
kernels as well as saving the u-boot environment.

USB has been tested with ASIX networking adapter and SanDisk 7.4GB
drive.

PSCI has been tested via the reset call (PSCI executes from DDR)

The firwmare upgrade process has been tested via TFTP and USB FAT
filesystem containing the fastboot.bin image in one of the partitions.

Signed-off-by: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
2017-07-10 14:26:03 -04:00
Jorge Ramirez-Ortiz
ccaa83f802 ARM64: dts: hi3798cv200-poplar: add device tree bindings
Pulled from Linux 4.12-rc3

Signed-off-by: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-07-10 14:26:02 -04:00
Cooper Jr., Franklin
6aba890eb6 ARM: dts: k2g: Add DT support for K2G Industrial Communication Engine evm
Add basic DT support for K2G ICE evm. Only minimal peripherals are
supported to allow console output and MMC boot.

Signed-off-by: Franklin S Cooper Jr <fcooper@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2017-07-10 14:26:01 -04:00
Cooper Jr., Franklin
42468c8b77 ARM: dts: k2g: Disable netcp by default
Disable netcp by default like all other peripherals in the dtsi file.
Enable the peripheral explicitly in the board specific dts file.

Signed-off-by: Franklin S Cooper Jr <fcooper@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2017-07-10 14:26:00 -04:00
Cooper Jr., Franklin
0d3f97db71 ARM: dts: keystone-k2g-evm: Add unit address to memory node
Upstream Linux has the unit address being added to the various 66AK2Gx
boards dts. Therefore, update the dts to mimic this change.

Also remove memory node from the base K2G dtsi file.

Signed-off-by: Franklin S Cooper Jr <fcooper@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2017-07-10 14:26:00 -04:00
Cooper Jr., Franklin
df5ec72d7a ARM: dts: keystone-k2g: Remove skeleton.dtsi
Adding the unit address to the memory node was causing the below error:
Warning (reg_format): "reg" property in /memory has invalid length
(8 bytes) (#address-cells == 2, #size-cells == 2)

Further debugging showed that this was due to the memory node added by
default to skeleton.dtsi which was being included in keystone-k2g.dtsi.
Adding a missing node was all that was needed to remove this deprecated
dtsi file from the SoC dtsi. With skeleton.dtsi removed the dtc compiler
no longer complained about including the unit address for the memory node.

Signed-off-by: Franklin S Cooper Jr <fcooper@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2017-07-10 14:26:00 -04:00
Cooper Jr., Franklin
e5e546aad1 ARM: k2g: Program DDRPHY_DATX8 registers via mask and value variables
Different K2G evms may need to program the various
KS2_DDRPHY_DATX8_X_OFFSET registers in different ways. Therefore, use
the mask and val registers for each KS2_DDRPHY_DATAX_X_OFFSET to
properly program the register.

Signed-off-by: Franklin S Cooper Jr <fcooper@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2017-07-10 14:25:57 -04:00
Cooper Jr., Franklin
a76a6f3e04 ARM: k2g: Program DDR PHY MR2 register with the default value
K2G GP doesn't require the MR2 register to be programed since the
default is good enough. However, newer K2G boards do need to change
this register value. Therefore, instead of not writing this register if
ran on a K2G board just program the value to be written to match the
default/reset value.

Signed-off-by: Franklin S Cooper Jr <fcooper@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2017-07-10 14:25:57 -04:00
Cooper Jr., Franklin
f8b4a2d7e2 ARM: keystone2: Add additional fields used for DDR3 configuration
Future boards will need to configure DDR3 registers in a slightly
different manner. Support this by defining additional variables and
defines that will be utilized later.

Signed-off-by: Franklin S Cooper Jr <fcooper@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2017-07-10 14:25:56 -04:00
Cooper Jr., Franklin
85bfe48b0a ARM: keystone2: Allow to build with all image formats
u-boot.bin is a copy of:
u-boot-fit-dtb.bin if CONFIG_FIT_EMBED is enabled,
u-boot-dtb.bin if CONFIG_OF_SEPARATE is enabled,
u-boot-nodtb.bin if DT is not enabled.
So, use u-boot.bin to to generate keystone images instead of
u-boot-dtb.bin

Signed-off-by: Franklin S Cooper Jr <fcooper@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2017-07-10 14:25:55 -04:00
Cooper Jr., Franklin
80364a42c1 arm: dts: Add new "generic" 66AK2Gx device tree file.
With U-boot runtime board detect for DTB selection a "default" dtb needs
to be created. This will be used temporarily until the "proper" dtb is
selected.

Signed-off-by: Franklin S Cooper Jr <fcooper@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2017-07-10 14:25:54 -04:00
Cooper Jr., Franklin
e0f3a3dc4f ARM: dts: k2g: Introduce U-boot specific dtsi file
Introduce K2G evm specific dtsi file for U-boot specific configurations.
This will help seperate U-boot only configurations thus making it easier to
keep device tree files synced between U-boot and Linux.

For now only add nodes to allow i2c drivers to be probed early during
the boot process.

Signed-off-by: Franklin S Cooper Jr <fcooper@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2017-07-10 14:25:53 -04:00
Cooper Jr., Franklin
a75df9aef0 ARM: dts: keystone-k2e-evm: Add U-boot specific dtsi file
With Davinci I2C switching to device model, K2E requires U-boot specific
device tree entries. This is only required for I2C 1 which is needed
extremely early during the boot process.

Fixes: 1743d040b1 ("ARM: keystone: Enable DM_I2C by default")
Signed-off-by: Franklin S Cooper Jr <fcooper@ti.com>
2017-07-10 13:45:34 -04:00
Simon Glass
747c4c68c0 stm32: Correct positioning of declaration
The current code gives a warning:

arch/arm/mach-stm32/stm32f7/soc.c: In function 'arch_cpu_init':
arch/arm/mach-stm32/stm32f7/soc.c:38:2: error: 'for' loop initial
    declarations are only allowed in C99 or C11 mode
  for (int i = 0; i < ARRAY_SIZE(stm32_region_config); i++)
  ^
arch/arm/mach-stm32/stm32f7/soc.c:38:2: note: use option -std=c99,
    -std=gnu99, -std=c11 or -std=gnu11 to compile your code

Fix it by moving the declaration to the top of the function.

Signed-off-by: Simon Glass <sjg@chromium.org>
Series-cc trini
2017-07-06 16:17:17 -04:00
Rob Clark
8bf5c1e191 arm64: use psci reset on snapdragon
This actually works on snapdragon.. not sure why we weren't using it.
Fixes reboot/poweroff when using UEFI.

Signed-off-by: Rob Clark <robdclark@gmail.com>
Reviewed-by: Alexander Graf <agraf@suse.de>
2017-07-06 16:17:13 -04:00
Tom Rini
3278e29130 Revert "armv7m: Disable D-cache when booting nommu(ARMv7M) Linux kernel"
The author of the commit discovered later on that this was already being
done in cleanup_before_linux() on arch/arm/cpu/armv7m/cpu.c.

This reverts commit 8f079cccb3.

Signed-off-by: Tom Rini <trini@konsulko.com>
2017-06-29 21:18:48 -04:00
Marek Vasut
f1d56dffd7 ARM: atmel: Rename MA5D4EVK
The board is now manufactured by Aries Embedded GmbH , rename it.

Signed-off-by: Marek Vasut <marex@denx.de>
2017-06-29 13:30:27 -04:00
Heiko Schocher
be2787bf29 atmel, at91: fix taurus board
since commit: f8b7fff1d5 "serial: atmel_usart: Add clk support"

taurus board comes not up anymore. Fix it.

Signed-off-by: Heiko Schocher <hs@denx.de>
Acked-by: Wenyou Yang <wenyou.yang@microchip.com>
2017-06-29 10:01:12 -04:00
Heiko Schocher
be884598da atmel, at91: fix smartweb board
since commit: f8b7fff1d5 "serial: atmel_usart: Add clk support"

smartweb board comes not up anymore. Fix it.

Signed-off-by: Heiko Schocher <hs@denx.de>
Acked-by: Wenyou Yang <wenyou.yang@microchip.com>
2017-06-29 10:01:11 -04:00
Andy Yan
f8136e68cc ARM: make memset and memcpy prompt message more clearly
The origin SPL_USE_ARCH_MEMSET/MEMCPY use same prompt message
as USE_ARCH_MEMSET/MEMCPY, which makes it's hard to distinguish
them in menuconfig interface. This patch gives them different
prompt messages for spl and none-spl config.

Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
2017-06-29 09:51:06 -04:00
Tom Rini
de8203653f ti816x: Enable ethernet support
The ti816x SoC revision of the ethernet IP block is handled by the
"davinci_emac" driver, rather than the "cpsw" driver as done by later
members of the family.  Enable the relevant plumbing.

Signed-off-by: Sriramakrishnan <srk@ti.com>
Signed-off-by: Vitaly Wool <vitaly.wool@konsulko.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2017-06-28 11:43:39 -04:00
Tom Rini
821560fd8e Merge git://www.denx.de/git/u-boot-imx
Signed-off-by: Tom Rini <trini@konsulko.com>

Conflicts:
	include/configs/imx6qdl_icore_rqs.h
	include/configs/imx6ul_geam.h
	include/configs/imx6ul_isiot.h
2017-06-27 09:32:37 -04:00
Fabio Estevam
65496a3483 mx6: soc: Fix typo in temperature unit name
The correct name is 'Celsius', so fix it accordingly.

Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
2017-06-27 09:06:09 +02:00
Tom Rini
524b42bc2c Merge git://git.denx.de/u-boot-uniphier
- fix sparse warnings
- sync DT with Linux
- add new board support (LD11/LD20 global)
2017-06-24 18:18:41 -04:00
Kunihiko Hayashi
7bf378043f arm64: dts: uniphier: add support for LD20 Global board
Add initial device tree support for LD20 Global board.

Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-06-25 06:06:09 +09:00
Kunihiko Hayashi
247137f245 arm64: dts: uniphier: add support for LD11 Global board
Add initial device tree support for LD11 Global board.

Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-06-25 06:06:09 +09:00
Masahiro Yamada
d940300178 ARM: dts: uniphier: sync DT with Linux next-20170622
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-06-25 06:06:09 +09:00
Masahiro Yamada
1d21e1b97c ARM: uniphier: fix various sparse warnings
Fix warnings reported by sparse:
 - ... was not declared. Should it be static?"
 - cast to restricted __be32

While fixing those, the type conflict of cci500_init() was found.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-06-25 06:06:09 +09:00
Heiko Schocher
72fa58931e atmel, at91: fix corvus board
since commit: f8b7fff1d5 "serial: atmel_usart: Add clk support"
corvus board comes not up anymore. Fix it.

Signed-off-by: Heiko Schocher <hs@denx.de>
2017-06-23 10:38:12 -04:00
Lokesh Vutla
964a34e602 ARM: dts: OMAP5+: Update spl specific dts
Now that we can specify DT nodes that can be used in spl, mark
all necessary nodes as u-boot,dm-spl.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2017-06-23 10:38:04 -04:00
Lokesh Vutla
f2c1cbe738 ARM: dts: am43xx: Update spl specific dts
Now that we can specify DT nodes that can be used in spl, mark
all necessary nodes as u-boot,dm-spl.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2017-06-23 10:38:03 -04:00
Tom Rini
207f981b56 ti816x: Add additional boot device detection logic
It has been observed that between PG1.0 and PG2.0/2.1 depending on
which device we boot from, we may see a different value here than is
documented in the TRM.  Update the values for NAND and MMC1 based on
real life usage on each revision.

Signed-off-by: Tom Rini <trini@konsulko.com>
2017-06-23 10:38:03 -04:00
Tom Rini
235c5b8315 Merge branch 'master' of git://git.denx.de/u-boot-samsung 2017-06-21 08:01:07 -04:00
Tom Rini
784667d7f9 Xilinx changes for v2017.07
ZynqMP:
 - config cleanup
 - SD LS mode support
 - psu_init* cleanup
 - unmap OCM
 - Support for SMC
 
 Zynq:
 - add ddrc to Kconfig
 - add topic-miamilite board support
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iEYEABECAAYFAllJNGcACgkQykllyylKDCEBrACdE1X8RroAQZQ3cN3yEXp/OQ3V
 D+gAn1PAUvy3zT8UDiJcF1rCxptvlKlv
 =4ans
 -----END PGP SIGNATURE-----

Merge tag 'xilinx-for-v2017.07' of git://www.denx.de/git/u-boot-microblaze

Xilinx changes for v2017.07

ZynqMP:
- config cleanup
- SD LS mode support
- psu_init* cleanup
- unmap OCM
- Support for SMC

Zynq:
- add ddrc to Kconfig
- add topic-miamilite board support
2017-06-21 07:57:37 -04:00
Tom Rini
ab43de8036 sunxi: Correct select's of SPL_STACK_R and SPL_SYS_MALLOC_SIMPLE
On ARCH_SUNXI we've been selecting these targets for a long time if
SUPPORT_SPL is set.  However, Lichee Pi Zero is the first platform we've
added that does support SPL but does not build SPL and has exposed a
latent bug.  Both of these symbols depend on SPL not SUPPORT_SPL, so we
need to update our select here otherwise we get a Kconfig warning.

Fixes: f02abb0608 ("sunxi: add support for Lichee Pi Zero")
Signed-off-by: Tom Rini <trini@konsulko.com>
2017-06-21 07:54:46 -04:00
Marek Vasut
dc759a9967 ARM: dts: omap3: Fix dts->dtb typo
Trivial, fix typo.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Tom Rini <trini@konsulko.com>
2017-06-20 14:03:33 -04:00
Mike Looijmans
e625881ad7 arm: zynq: Add support for the topic-miamilite system-on-module
The topic-miamilite SoM contains a Zynq xc7z010 SoC, 1GB DDR3L RAM,
64MB dual-parallel QSPI NOR flash and clock sources.

Signed-off-by: Mike Looijmans <mike.looijmans@topic.nl>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2017-06-20 16:42:13 +02:00
Michal Simek
fb4000e871 arm64: zynqmp: Check pmufw version
If PMUFW version is not v0.3 then panic.
ZynqMP switch to CCF based clock driver which requires
PMUFW to be present at certain version.
This patch ensure that you use correct and tested PMUFW
binary.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2017-06-20 16:42:13 +02:00
Siva Durga Prasad Paladugu
e0752bc184 arm64: zynqmp: Define routines for mmio write and read
Define routines of mmio write and read functionalities
for zynqmp platform.

Also do not call SMC from SPL because SPL is running before ATF in EL3
that's why SMCs can't be called because there is nothing to call.
zynqmp_mmio*() are doing direct read/write accesses and this patch does
the same. PMUFW is up and running at this time and there is a way to talk
to pmufw via IPI but there is no reason to implement IPI stuff in SPL if
we need just simple read for getting clock driver to work.

Also make invoke_smc as global so that it can be reused in
multile places where ever possible.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2017-06-20 16:42:06 +02:00
Siva Durga Prasad Paladugu
d84bd9284e arm: zynq: Add Kconfig option for any DDR specific initialization
Add Kconfig option for ddr init as this might be required
in cases like ddr less systems where we want to skip ddrc
init and this option is useful for it.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2017-06-20 16:41:44 +02:00
Michal Simek
6a1d91be31 arm64: zynqmp: Do not map unused OCM/TCM region
When OCM or TCM is protected this mapping still exist and it is causing access
violation.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2017-06-20 16:40:58 +02:00
Michal Simek
b0259c840e arm64: zynqmp: Add comment about level shifter mode v1
Silicon v1 didn't support SD boot mode with level shifter.
Because system can't boot any error message is not shown
that's why comment is just a record if someone tries to debug it.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2017-06-20 16:40:58 +02:00
Jean-Francois Dagenais
8bf62ae7da arm64: zynqmp: spl: use given boot_device instead of fetching it again
The boot_device argument to spl_boot_mode was massively added without
actually modifying the existing functions.

This commit actually makes use of the handed value, which is the same.

Signed-off-by: Jean-Francois Dagenais <jeff.dagenais@gmail.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2017-06-19 16:53:10 +02:00
Jean-Francois Dagenais
e3fdf5d056 arm64: zynqmp: spl: fix dual SD controller support
When enabling both SDHCI controllers, spl_mmc.c would actually choose
device sdhci0 even if booted from sdhci1 (boot_device). This is because
spl_mmc_get_device_index(boot_device) expects BOOT_DEVICE_MMC2[_2] in
order to return index 1 instead of 0.

The #if defined(...) statement is copied from board/xilinx/zynqmp/zynqmp.c

So the key to properly enabling both controllers as boot sources is
defining both CONFIG_ZYNQ_SDHCI0 and CONFIG_ZYNQ_SDHCI1 in your board's
include/configs/*.h.

Signed-off-by: Jean-Francois Dagenais <jeff.dagenais@gmail.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2017-06-19 16:53:09 +02:00
Michal Simek
bd89fba202 arm64: zynqmp: Wire SD1 level shifter mode to SPL
Add missing SD boot mode to SPL. zcu102-rev1.0 is supporting
this boot mode.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2017-06-19 16:53:09 +02:00