Commit graph

86 commits

Author SHA1 Message Date
Weijie Gao
df4c82f014 reset: mediatek: add reset definition for MediaTek MT7988 SoC
This patch adds reset bits for MediaTek MT7988

Signed-off-by: Sam Shih <sam.shih@mediatek.com>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2023-08-03 09:40:50 -04:00
Patrick Delaunay
08002ffd08 ARM: dts: stm32mp: alignment with v6.3
Device tree alignment with Linux kernel v6.3:
- f5a058023239 - ARM: dts: stm32: add i2c nodes into stm32mp131.dtsi
- 8539ebb435a5 - ARM: dts: stm32: enable i2c1 and i2c5 on
  stm32mp135f-dk.dts
- 8539ebb435a5 - ARM: dts: stm32: add spi nodes into stm32mp131.dtsi
- 15f72e0da4da - ARM: dts: stm32: add pinctrl and disabled spi5 node in
  stm32mp135f-dk
- ea99a5a02ebc - ARM: dts: stm32: Create separate pinmux for qspi cs pin
  in stm32mp15-pinctrl.dtsi
- a306d8962a24 - ARM: dts: stm32: Rename mdio0 to mdio
- 0a5ebb1f3367 - ARM: dts: stm32: Replace SAI format with dai-format DT
  property
- ccdab19738a6 - ARM: dts: stm32: add adc support to stm32mp13
- 022932ab55fd - ARM: dts: stm32: add adc pins muxing on stm32mp135f-dk
- ab2806ddad9d - ARM: dts: stm32: add dummy vdd_adc regulator on
  stm32mp135f-dk
- e46a180c060f - ARM: dts: stm32: add adc support on stm32mp135f-dk
- 9ebf215fbae1 - ARM: dts: stm32: add PWR fixed regulators on stm32mp131
- 16f4ff60519a - ARM: dts: stm32: add USBPHYC and dual USB HS PHY support
  on stm32mp131
- 4a47f0f3e936 - ARM: dts: stm32: add UBSH EHCI and OHCI support on
  stm32mp131
- 2a46bb66c47f - ARM: dts: stm32: add USB OTG HS support on stm32mp131
- 9ebf215fbae1 - ARM: dts: stm32: add fixed regulators to support usb on
  stm32mp135f-dk
- 16f4ff60519a - ARM: dts: stm32: enable USB HS phys on stm32mp135f-dk
- c4e7254cf6dc - ARM: dts: stm32: enable USB Host EHCI on stm32mp135f-dk
- 44978e135916 - ARM: dts: stm32: add pins for stm32g0 typec controller on stm32mp13
- 4f532403b1e5 - ARM: dts: stm32: enable USB OTG in dual role mode on
  stm32mp135f-dk
- e1f15571c96c - ARM: dts: stm32: add mcp23017 pinctrl entry for stm32mp13
- 6cc71374002e - ARM: dts: stm32: add mcp23017 IO expander on I2C1 on
  stm32mp135f-dk
- 7ffd2266bd32 - ARM: dts: stm32: Fix qspi pinctrl phandle for
  stm32mp15xx-dhcor-som
- 21d83512bf2b - ARM: dts: stm32: Fix qspi pinctrl phandle for
  stm32mp15xx-dhcom-som
- 732dbcf52f74 - ARM: dts: stm32: Fix qspi pinctrl phandle for
  stm32mp151a-prtt1l
- 003b7c6b24f4 - ARM: dts: stm32: remove sai kernel clock on
  stm32mp15xx-dkx
- f2b17b39bfff - ARM: dts: stm32: rename sound card on stm32mp15xx-dkx
- dee3cb759d3d - ARM: dts: stm32: Remove the pins-are-numbered property
- ae8cf3b48727 - ARM: dts: stm32: add i2s nodes on stm32mp131
- 619746a27bd0 - ARM: dts: stm32: add sai nodes on stm32mp131
- c5e05d08ef90 - ARM: dts: stm32: add spdifrx node on stm32mp131
- 0a5afd3ee0d0 - ARM: dts: stm32: add dfsdm node on stm32mp131
- bf9d876bea2e - ARM: dts: stm32: add timers support on stm32mp131
- a3183748371d - ARM: dts: stm32: add timer pins muxing for stm32mp135f-dk
- a9060c1326bc - ARM: dts: stm32: add timers support on stm32mp135f-dk
- a12154058f75 - ARM: dts: stm32: Fix User button on stm32mp135f-dk
- 2f33df889e99 - ARM: dts: stm32: Use new media bus type macros
- 366384e49551 - ARM: dts: stm32: Update part number NVMEM description on
  stm32mp131

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2023-06-16 11:22:07 +02:00
Yanhong Wang
c10483045e dt-bindings: reset: Add StarFive JH7110 reset definitions
Add resets for the StarFive JH7110 system(SYS),system-top-group(STG) and
always-on(AON) reset controller.

Signed-off-by: Yanhong Wang <yanhong.wang@starfivetech.com>
Tested-by: Conor Dooley <conor.dooley@microchip.com>
2023-04-20 16:08:44 +08:00
Jagan Teki
a0f5a61dc1 dt-bindings: reset: add rk3588 reset definitions
Add reset ID defines for rk3588.

commit <0a8eb7dae617> ("dt-bindings: reset: add rk3588 reset
definitions")

Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Signed-off-by: Jagan Teki <jagan@edgeble.ai>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-02-28 18:07:28 +08:00
Tom Rini
b82f12b642 First set of u-boot-at91 features for the 2023.04 cycle
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Merge tag 'u-boot-at91-2023.04-a' of https://source.denx.de/u-boot/custodians/u-boot-at91 into next

First set of u-boot-at91 features for the 2023.04 cycle:

This feature set includes the new DM-based NAND flash driver (old non-DM
driver is still kept for backwards compatibility), and the move to DM
NAND flash driver for sam9x60ek board. Feature set also includes
devicetree alignment for sama7g5 with Linux, devicetree alignment on USB
with Linux for all boards (sama5, sam9x60), chip id for sama7g5, minor
configs and tweaks.
2023-01-06 11:53:26 -05:00
Sergiu Moga
7b88887ba7 dt-bindings: reset: add sama7g5 definitions
Upstream linux commit 5994f58977e0.

Add reset bindings for SAMA7G5. At the moment only USB PHYs are
included.

The three reset USB phy's have their ID's mapped from 4 to 6. There are
no USB phy's with ID's numbered from 0 to 3.

Signed-off-by: Sergiu Moga <sergiu.moga@microchip.com>
2023-01-05 10:04:57 +02:00
Gabriel Fernandez
01c8b664d2 dt-bindings: stm32mp13: add clock & reset support for STM32MP13
Add support of stm32mp13 DT bindings of clock and reset.

Signed-off-by: Gabriel Fernandez <gabriel.fernandez@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2022-12-07 16:49:35 +01:00
Marcel Ziswiler
0b42fdca2d imx8mp: synchronise device tree with linux
Synchronise device tree with linux v6.1-rc3.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Tested-By: Tim Harvey <tharvey@gateworks.com> #imx8m{m,n,p}-venice-*
2022-11-08 17:35:00 +01:00
Marcel Ziswiler
cb9b70fd2f imx8mq: synchronise device tree with linux
Synchronise device tree with linux v6.1-rc3.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2022-11-08 17:35:00 +01:00
Marcel Ziswiler
ed7bda5710 imx8ulp: synchronise device tree with linux
Synchronise device tree with linux v6.1-rc3.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2022-11-08 17:35:00 +01:00
Jim Liu
9ca71c9c19 arm: nuvoton: Add support for Nuvoton NPCM845 BMC
Add basic support for the Nuvoton NPCM845 EVB (Arbel).

Signed-off-by: Jim Liu <JJLIU0@nuvoton.com>
2022-10-06 21:05:17 -04:00
Michal Simek
165694b125 dt-bindings: versal: Add versal reset IDs
The same file is already the part of Linux kernel that's why add it also to
u-boot to be able to use it in source code and DT files.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/1c3bc464536a9bf64a2e8bfe18a938c9cb490620.1657192249.git.michal.simek@amd.com
2022-07-26 08:23:55 +02:00
Weijie Gao
daf4ce6b5e reset: mtmips: add reset controller support for MediaTek MT7621 SoC
This patch adds reset controller bits definition header file for MediaTek
MT7621 SoC

Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2022-07-13 23:03:37 +02:00
Patrick Delaunay
69ef98b209 ARM: dts: stm32mp15: alignment with v5.19
Device tree alignment with Linux kernel v5.19-rc1

- ARM: dts: stm32: Add alternate pinmux for ethernet0 pins
- ARM: dts: stm32: Add alternate pinmux for mco2 pins
- ARM: dts: stm32: fix pinctrl node name warnings (MPU soc)
- ARM: dts: stm32: stm32mp15-pinctrl: add spi1-1 pinmux group
- dt-bindings: clock: add IDs for SCMI clocks on stm32mp15
- dt-bindings: reset: add IDs for SCMI reset domains on stm32mp15
- dt-bindings: clock: stm32mp15: rename CK_SCMI define
- dt-bindings: reset: stm32mp15: rename RST_SCMI define
- dt-bindings: reset: add MCU HOLD BOOT ID for SCMI reset domains
  on stm32mp15
- dt-bindings: clk: cleanup comments
- ARM: dts: align SPI NOR node name with dtschema
- ARM: dts: stm32: enable optee firmware and SCMI support on STM32MP15
- ARM: dts: stm32: Add SCMI version of STM32 boards (DK1/DK2/ED1/EV1)
- ARM: dts: stm32: move SCMI related nodes in a dedicated file for
  stm32mp15

+ patch from stm32-dt-for-v5.19-fixes-2

- ARM: dts: stm32: move SCMI related nodes in a dedicated file for
  stm32mp15
- ARM: dts: stm32: fix pwr regulators references to use scmi
- ARM: dts: stm32: use the correct clock source for CEC on stm32mp151
- ARM: dts: stm32: DSI should use LSE SCMI clock on DK1/ED1 STM32 board
- ARM: dts: stm32: delete fixed clock node on STM32MP15-SCMI
- ARM: dts: stm32: add missing usbh clock and fix clk order on stm32mp15

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2022-07-12 11:46:31 +02:00
Samuel Holland
9a50489c60 dt-bindings: sunxi: Update clock/reset binding headers
Some devicetree updates make use of newly-exposed clocks and resets.
To support that, copy the binding headers from the Linux v5.18-rc1 tag.

Signed-off-by: Samuel Holland <samuel@sholland.org>
2022-05-23 00:37:50 +01:00
Jim Liu
84335544ea arm: nuvoton: Add support for Nuvoton NPCM750 BMC
Add basic support for the Nuvoton NPCM750 EVB (Poleg).

Signed-off-by: Jim Liu <JJLIU0@nuvoton.com>
2022-05-05 09:28:47 -04:00
Icenowy Zheng
ce2b6c4481 ARM: dts: suniv: Add device tree files and bindings for F1C100s
Add device tree files for suniv and
Lichee Pi Nano it is a board based on F1C100s.
dt-bindings/dts are synced with 5.16.0

Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-02-04 00:09:57 +00:00
Green Wan
2113c0045c riscv: dts: add fu740 support
Add dts support for fu740. The HiFive Unmatched support is based on
fu740 cpu and drivers in following patch set.

Signed-off-by: Green Wan <green.wan@sifive.com>
[greentime.hu: set fu740 speed to 1.2GHz]
Signed-off-by: Greentime Hu <greentime.hu@sifive.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Rick Chen <rick@andestech.com>
2021-05-31 16:35:54 +08:00
Tom Rini
e262b2973e Merge https://gitlab.denx.de/u-boot/custodians/u-boot-sunxi
- New Allwinner H616 SoC support (sans Ethernet & USB)
- H6 DT update
- Tanix TX6 TV box support
- OrangePi 3 support
- OrangePi Zero2 (H616) support
2021-01-25 19:46:02 -05:00
Jernej Skrabec
80b2c65bc2 arm: sunxi: add initial H616 DTSI and headers
This commit introduces H616 DTSI file and dt-bindings headers needed for
device tree files.

Files are taken from v3 Linux H616 support submission[1], as the
H616 .dtsi file is not merged upstream yet.

[1] http://lists.infradead.org/pipermail/linux-arm-kernel/2021-January/632082.html

Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2021-01-25 21:52:01 +00:00
Weijie Gao
4075928c36 reset: mtmips: add reset controller support for MediaTek MT7620 SoC
This patch adds reset controller bits definition header file for MediaTek
MT7620 SoC

Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2021-01-24 21:39:26 +01:00
Chia-Wei, Wang
9fc21086b7 reset: aspeed: Add AST2600 reset support
Add controller reset support through the
System Control Unit (SCU) of AST2600 SoC.

Signed-off-by: Chia-Wei, Wang <chiawei_wang@aspeedtech.com>
Reviewed-by: Ryan Chen <ryan_chen@aspeedtech.com>
2021-01-18 15:23:06 -05:00
Patrick Delaunay
d8d29a4489 reset: stm32: Add support of MCU HOLD BOOT
Handle the register RCC_MP_GCR without SET/CLR registers
but with a direct access to bit BOOT_MCU:
- deassert => set the bit: The MCU will not be in HOLD_BOOT
- assert => clear the bit: The MCU will be set in HOLD_BOOT

With this patch the RCC driver handles the MCU_HOLD_BOOT_R value
added in binding stm32mp1-resets.h

Cc: Fabien DESSENNE <fabien.dessenne@st.com>
Cc: Arnaud POULIQUEN <arnaud.pouliquen@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-11-25 11:32:31 +01:00
Samuel Holland
e210ec0181 sunxi: DT: A64: update device tree files
Import updated device trees from Linux tag v5.9. This picks up new
hardware (PinePhone, PineTab); and it drops the U-Boot specific DTSI
files for the Pinebook and the Teres-I, since the ANX6345 bridge is
now supported upstream.

A couple of headers needed updates for recently-added hardware support.

Acked-by: Maxime Ripard <mripard@kernel.org>
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2020-11-17 00:42:20 +00:00
Chia-Wei, Wang
611a28ce27 reset: ast2500: Use SCU for reset control
The System Control Unit (SCU) controller of Aspeed
SoCs provides the reset control for each peripheral.

This patch refactors the reset method to leverage
the SCU reset control. Thus the driver dependency
on watchdog including dedicated WDT API and reset
flag encoding can be eliminated.

The Kconfig description is also updated accordingly.

Signed-off-by: Chia-Wei, Wang <chiawei_wang@aspeedtech.com>
Reviewed-by: Ryan Chen <ryan_chen@aspeedtech.com>
2020-10-22 11:26:14 -04:00
Tom Rini
987ab49366 - generate unique mac address from SoC serial on S400 board
- Add USB support for GXL and AXG SoCs
 - Update Gadget code to use the new GXL and AXG USB glue driver
 - Add a VIM3 board support to add dynamic PCIe enable in OS DT
 - Fix AXG pinmux with requesting GPIOs
 - Add missing GPIOA_18 for AXG pinctrl
 - Add Amlogic PWM driver
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Merge tag 'u-boot-amlogic-20201005' of https://gitlab.denx.de/u-boot/custodians/u-boot-amlogic

- generate unique mac address from SoC serial on S400 board
- Add USB support for GXL and AXG SoCs
- Update Gadget code to use the new GXL and AXG USB glue driver
- Add a VIM3 board support to add dynamic PCIe enable in OS DT
- Fix AXG pinmux with requesting GPIOs
- Add missing GPIOA_18 for AXG pinctrl
- Add Amlogic PWM driver
2020-10-06 08:36:10 -04:00
Neil Armstrong
4e7b0a3f2a ARM: dts: sync amlogic AXG/GXL/GXM DT from Linux 5.8-rc1
This imports the AXG, GXL & GXM SoC and boards DT changes from the Linux
commit b3a9e3b9622a ("Linux 5.8-rc1").

This change also removes GXL & GXM u-boot.dtsi hacks for USB gadget.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2020-10-05 17:59:45 +02:00
Robert Marko
8ef7df5df3 reset: Add IPQ40xx reset controller driver
On Qualcomm IPQ40xx SoC series, GCC clock IP also handles the resets.
So since this will be needed by further drivers, lets add a driver for the reset controller.

Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Cc: Luka Perkov <luka.perkov@sartura.hr>
2020-09-18 16:20:47 -04:00
Frank Wunderlich
362e5e1e19 arm: dts: mt7622: add SATA reset constants
add reset constants used for SATA to header file

Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
2020-08-19 17:38:14 -04:00
Sagar Shrikant Kadam
ef9f65f389 dt-bindings: prci: add indexes for reset signals available in prci
Add bit indexes for reset signals within the PRCI module
on FU540-C000 SoC.
The DDR and ethernet sub-system's have reset signals
indicated by these reset indexes.

Signed-off-by: Sagar Shrikant Kadam <sagar.kadam@sifive.com>
Reviewed-by: Pragnesh Patel <pragnesh.patel@sifive.com>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
2020-08-04 09:19:41 +08:00
Nicolas Saenz Julienne
f676eb217b reset: Add Raspberry Pi 4 firmware reset controller
Raspberry Pi 4's co-processor controls some of the board's HW
initialization process, but it's up to Linux to trigger it when
relevant. Introduce a reset controller capable of interfacing with
RPi4's co-processor that models these firmware initialization routines as
reset lines.

Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
2020-07-10 11:49:28 +02:00
Sean Anderson
bba8618c8e riscv: Add device tree for K210 and Sipeed Maix BitM
Where possible, I have tried to find compatible drivers based on the layout
of registers. However, many devices remain untested. All untested devices
have been left disabled, but some tentative properties (such as compatible
strings, and clocks, interrupts, and resets properties) have been added.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
2020-07-01 15:01:22 +08:00
Amit Singh Tomar
1050eaa082 arm: actions: add S700 SoC device tree
This patch adds .dtsi file(sync with Linux 5.5-rc6 with hash "b3a987b0264d")
and required binding for S700 SoC that is a 64-bit Quad-core ARM
Cortex-A53 cores.

It also provisions dts file to be built based on selected
platform(CONFIG_MACH_S900/S700).

Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Amit Singh Tomar <amittomer25@gmail.com>
2020-04-24 16:40:09 -04:00
Amit Singh Tomar
4939beea8e arm: dts: sync dts for Action Semi S900
Synchronize device tree bindings with v5.5-rc6 tag with commit id
"b3a987b0264d".

Also, it removes older clock binding defined for S900 along with undocumented
compatible string "actions,s900-serial" from serial driver and adapts clock
driver to cater to new bindings.

Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Amit Singh Tomar <amittomer25@gmail.com>
2020-04-24 16:40:09 -04:00
Jerome Brunet
dd5f2351e9 arm64: dts: meson: sync dt and bindings from v5.6-rc2
Sync the device tree and dt-bindings from Linux v5.6-rc2
11a48a5a18c6 ("Linux 5.6-rc2")

The only exception to this is the mmc pinctrl pin bias of gxl SoC family.
This is a fix which found its way to u-boot but not Linux yet.

Acked-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2020-04-06 09:56:35 +02:00
Chen-Yu Tsai
b5fe523bbc sunxi: H3/H5 Sync DT files from upstream Linux kernel as of next-20200108
Sync the device tree files and device tree header files from upstream
Linux kernel, as of 2020-01-08. The commit synced to in the sunxi repo

    98d25b0b266d Merge branch 'sunxi/dt-for-5.6' into sunxi/for-next

which is also part of next-20200108.

Changes brought in include:

  - cleanup of pinmux node names
  - addition of Security ID, MBUS, CSI, crypto engine, video codec,
    pmu, and thermal sensor device nodes for both SoCs
  - addition of deinterlacing engine device node on H3
  - cleanup of RTC device node and addition of its clocks
  - various board cleanups and improvements
    - removal of pinmux node for GPIO lines
    - cpufreq / DVFS
    - HDMI output
    - UART-based Bluetooth
    - audio codec
    - USB ports
  - new boards

Most of the changes don't concern U-boot.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2020-01-24 23:06:49 +05:30
Eugeniy Paltsev
c597e248d9 ARC: HSDK: introduce reset driver
Introduce reset driver for Synopsys ARC HSDK SoC

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2019-11-01 16:45:40 +03:00
Tom Rini
ffc379b42c - bmips: add BCRM NAND support for BCM6368, BCM6328, BCM6362 and BCM63268 SoCs
- bmips: various small fixes
 - mtmips: add new drivers for clock, reset-controller and pinctrl
 - mtmips: add support for high speed UART
 - mtmips: update/enhance drivers for SPI and ethernet
 - mtmips: add support for MMC
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Merge tag 'mips-pull-2019-10-25' of git://git.denx.de/u-boot-mips

- bmips: add BCRM NAND support for BCM6368, BCM6328, BCM6362 and BCM63268 SoCs
- bmips: various small fixes
- mtmips: add new drivers for clock, reset-controller and pinctrl
- mtmips: add support for high speed UART
- mtmips: update/enhance drivers for SPI and ethernet
- mtmips: add support for MMC
2019-10-25 20:07:24 -04:00
Weijie Gao
f7ae6b682c reset: add reset controller driver for MediaTek MIPS platform
This patch adds reset controller driver for MediaTek MIPS platform and
header file for mt7628.

Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2019-10-25 17:20:44 +02:00
Álvaro Fernández Rojas
f923c758e0 bmips: correct name characters
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
2019-10-25 17:20:43 +02:00
Michal Simek
0435a82f32 dt-bindings: arm64: zynqmp: Add power and reset headers
Add power and reset headers to be sources by ZynqMP dtses.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-10-24 13:37:02 +02:00
Andreas Färber
1a87cc7891 arm: dts: Import and update DT for Khadas VIM3
In Linux meson-g12-common.dtsi was introduced as well as new g12b nodes
and headers, as dependencies of new meson-g12b-a311d-khadas-vim3.dts.

Copied from da0c9ea146cb ("Linux 5.4-rc2")

Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2019-10-18 11:57:00 +02:00
Ryder Lee
898cc1365c arm: dts: split mtk-reset.h into per-chip header
This follows the linux header rules to avoid conflict bitfields.

Tested-by: Frank Wunderlich <frank-w@public-files.de>
Signed-off-by: Ryder Lee <ryder.lee@mediatek.com>
Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
2019-10-11 10:10:18 -04:00
Patrick Wildt
6300dc4c61 imx: add support for i.MX7/i.MX8MQ reset controller
Add support for the reset controller that's used on the i.MX7D
and i.MX8MQ.  This will be needed to be able to assert the PCIe
reset pins.  Bindings taken from Linux, driver implementation
mostly taken from Linux and adjusted to U-Boot infrastructure.

Signed-off-by: Patrick Wildt <patrick@blueri.se>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
2019-10-08 16:36:36 +02:00
Ryder Lee
4f3ee271eb ARM: dts: add hifsys reset for MediaTek SoCs
This adds missing hifsys reset parts in header files.

Tested-by: Frank Wunderlich <frank-w@public-files.de>
Signed-off-by: Ryder Lee <ryder.lee@mediatek.com>
2019-08-07 15:31:03 -04:00
Neil Armstrong
b1e81e67ee ARM: dts: sync Amlogic G12A DT with Linux 5.2-rc1
Sync from Linux commit a188339ca5a3 ("Linux 5.2-rc1")

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2019-05-31 09:57:49 +02:00
Neil Armstrong
f9e605437e ARM: dts: Import Amlogic G12A u200 DT from Linux 5.1-rc1
Import Linux 5.1-rc1 DT from 9e98c678c2d6 ("Linux 5.1-rc1") for the
meson-g12a-u200 board, the meson-g12a.dtsi and the corresponding bindings.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2019-04-23 11:19:09 +02:00
Jagan Teki
8dcc7e6922 ARM: dts: sun8i: Update A80 dts(i) from Linux-v4.18-rc3
Update all A80 devicetree dtsi and dtsi files from
Linux-v4.18-rc3 with below commits.

arch/arm/boot/dts/sun9i-a80*:

commit 190e3138f9577885691540dca59c2f07540bde04
Merge: cafc87023b0d a7affb13b271
Author: Arnd Bergmann <arnd@arndb.de>
Date:   Tue Mar 27 14:58:00 2018 +0200

    Merge tag 'sunxi-h3-h5-for-4.17' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into next/dt

include/dt-bindings/*/sun9i-a80-*:

commit 783ab76ae553abc23f80ef7511052d055697531b
Author: Chen-Yu Tsai <wens@csie.org>
Date:   Sat Jan 28 20:22:36 2017 +0800

    clk: sunxi-ng: Add A80 Display Engine CCU

Note: sun9i-a80-cx-a99.dts is updated only uart0, since the same
dts is not available in Linux.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2019-01-18 22:19:09 +05:30
Weijie Gao
3e066bcaef reset: MedaiTek: add reset controller driver for MediaTek SoCs
This patch adds reset controller driver for MediaTek SoCs.

Signed-off-by: Ryder Lee <ryder.lee@mediatek.com>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2019-01-14 17:43:18 -05:00
Neil Armstrong
78a08019cd ARM: dts: Sync Amlogic Meson AXG DT from Linux 4.20-rc1
Synchronize the Amlogic AXG Device Tree files and bindings include from
the recent Linux 4.20-rc1, because it includes patches fixing support for
U-boot.

Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2018-11-26 14:40:52 +01:00