Commit graph

16830 commits

Author SHA1 Message Date
Tom Rini
12c1e57824 Merge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-marvell
- mvebu: Boot support for 4K Native disks (Pali)
- a38x: Perform DDR training sequence again for 2nd boot (Tony)
2023-04-14 10:50:55 -04:00
Pali Rohár
c62af15393 arm: mvebu: spl: Allow to build SATA kwbimage for 4K Native disks
Add a new config option CONFIG_MVEBU_SPL_SATA_BLKSZ for specifying block
size of SATA disk. This information is used during building of SATA
kwbimage and must be correctly set, otherwise BootROM does not load SPL.

For 4K Native disks CONFIG_MVEBU_SPL_SATA_BLKSZ must be set to 4096.

Signed-off-by: Pali Rohár <pali@kernel.org>
Tested-by: Martin Rowe <martin.p.rowe@gmail.com>
2023-04-13 11:34:47 +02:00
Pali Rohár
fa06a6df65 arm: mvebu: spl: Do not hardcode SATA block size to 512
Find SATA block device by blk_get_devnum_by_uclass_id() function and read
from it the real block size of the SATA disk.

Signed-off-by: Pali Rohár <pali@kernel.org>
2023-04-13 11:34:24 +02:00
Andre Przywara
0a137ac501 sunxi: arm64: boot0.h: runtime check for RVBAR address
Some SoCs of the H616 family use a die variant, that puts some CPU power
and reset control registers at a different address. There are examples
of two instances of the same board, using different die revisions of the
otherwise same H313 SoC. We need to write to a register in that block
*very* early in the SPL boot, to switch the core to AArch64.

Since the devices are otherwise indistinguishable, let the SPL code read
that die variant and use the respective RVBAR address based on that.
That is a bit tricky, since we need to do that in hand-coded AArch32
machine language, shared by all 64-bit SoCs. To avoid build dependencies
in this mess, we always provide two addresses to choose from, and just
give identical values for all other SoCs. This allows the same code to
run on all 64-bit SoCs, and controls this switch behaviour purely from
Kconfig.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>
2023-04-12 00:17:22 +01:00
Andre Przywara
342abc1472 sunxi: boot0.h: allow RVBAR MMIO address customisation
To switch the ARMv8 Allwinner SoCs into the 64-bit AArch64 ISA, we need
to program the 64-bit start code address into an MMIO mapped register
that shadows the architectural RVBAR register.
This address is SoC specific, with just two versions out there so far.
Now a third address emerged, on a *variant* of an existing SoC (H616).

Change the boot0.h start code to make this address a Kconfig
selectable option, to allow easier maintenance.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>
2023-04-12 00:17:22 +01:00
Jernej Skrabec
deb77f18bf sunxi: Add TPR2 parameter for H616 DRAM driver
It turns out that some H616 and related SoCs (like H313) need TPR2
parameter for proper working. Add it.

Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2023-04-12 00:17:22 +01:00
Jernej Skrabec
4a967cb95f sunxi: Parameterize some of H616 DDR3 timings
Currently twr2rd, trd2wr and twtp are constants, but according to
vendor driver they are calculated from other values. Do that here too,
in preparation for later introduction of new parameter.

While at it, introduce constant for t_wr_lat, which was incorrectly
calculated from tcl before.

Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2023-04-12 00:17:22 +01:00
Jernej Skrabec
b3cb03cf79 sunxi: Parameterize "unknown feature" in H616 DRAM driver
Part of the code, previously known as "unknown feature", also doesn't
have constant values. They are derived from TPR0 parameter in vendor
DRAM code.

Let's move that code to separate function and introduce TPR0 parameter
here too, to ease adding new boards.

Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Acked-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2023-04-12 00:17:21 +01:00
Jernej Skrabec
ae6f66d5b5 sunxi: Parameterize bit delay code in H616 DRAM driver
These values are highly board specific and thus make sense to add
parameter for them. To ease adding support for new boards, let's make
them same as in vendor DRAM settings.

Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Acked-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2023-04-12 00:17:21 +01:00
Jernej Skrabec
83118bfa04 sunxi: Make bit delay function in H616 DRAM code void
Mentioned function result is always true and result isn't checked
anyway. Let's make it void.

Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2023-04-12 00:17:21 +01:00
Jernej Skrabec
7742eac7af sunxi: Always configure ODT on H616 DRAM
Vendor H616 DRAM code always configure part which we call ODT
configuration. Let's reflect that here too.

Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2023-04-12 00:17:21 +01:00
Jernej Skrabec
f221411caa sunxi: Convert H616 DRAM options to single setting
Vendor DRAM settings use TPR10 parameter to enable various features.
There are many mores features that just those that are currently
mentioned. Since new will be added later and most are not known, let's
reuse value from vendor DRAM driver as-is. This will also help adding
support for new boards.

Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2023-04-12 00:17:21 +01:00
Jernej Skrabec
f35ec2105e sunxi: parameterize H616 DRAM ODT values
While ODT values for same memory type are similar, they are not
necessary the same. Let's parameterize them and make parameter same as
in vendor DRAM settings. That way it will be easy to introduce new board
support.

Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2023-04-12 00:17:21 +01:00
Jernej Skrabec
cdb5aadd59 sunxi: cosmetic: Fix H616 DRAM driver code style
Fix code style for pointer declaration. This is just cosmetic change to
avoid checkpatch errors in later commits.

Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2023-04-12 00:17:21 +01:00
Jernej Skrabec
7230bebfe3 sunxi: Fix write to H616 DRAM CR register
Vendor DRAM code actually writes to whole CR register and not just sets
bit 31 in mctl_ctrl_init().

Just to be safe, do that here too.

Acked-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2023-04-12 00:17:21 +01:00
Samuel Holland
f050069297 ARM: dts: sun6i: mixtile-loftq: Add USB1 VBUS regulator
This board is configured with CONFIG_USB1_VBUS_PIN="PH24", but no
regulator exists in its device tree. Add the regulator, so USB will
continue to work when the PHY driver switches to using the regulator
uclass instead of a GPIO.

Update the device tree here because it does not exist in Linux.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2023-04-12 00:17:21 +01:00
Tom Rini
187c7aba22 - fix building sandbox without SDL
- improve tegra DC driver to work with panel ops and implement
    native 180 degree panel rotation support
  - add T30 support to tegra DC driver
  - add DSI driver (based on mainline Linux one with minor
    adjustments, only T30 tested)
  - add get_display_timing ops to simple panel driver
  - extend simple panel driver to use it for MIPI DSI panels
    which do not require additional DSI commands for setup
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Merge tag 'video-20230407' of https://source.denx.de/u-boot/custodians/u-boot-video

 - fix building sandbox without SDL
 - improve tegra DC driver to work with panel ops and implement
   native 180 degree panel rotation support
 - add T30 support to tegra DC driver
 - add DSI driver (based on mainline Linux one with minor
   adjustments, only T30 tested)
 - add get_display_timing ops to simple panel driver
 - extend simple panel driver to use it for MIPI DSI panels
   which do not require additional DSI commands for setup
2023-04-08 11:20:47 -04:00
Tom Rini
965f74b5b3 Merge branch 'master_sh/gen4/initial' of https://source.denx.de/u-boot/custodians/u-boot-sh
- Initial R-Car Generation 4 support
2023-04-07 15:55:50 -04:00
Svyatoslav Ryhel
acbb871af5 video: tegra20: add DSI controller driver
Adds support for both DSI outputs found on Tegra. Only very
minimal functionality is implemented, so advanced features
like ganged mode won't work. Driver is heavily based on
mainline Tegra DSI and re-uses much of its features.

Only T30 is supported for now but T20 support can be added
if any supported devices will be found.

Driver is wrapped as panel driver since Tegra DC driver supports
only panel drivers calls.

Tested-by: Andreas Westman Dorcsak <hedmoo@yahoo.com> # ASUS TF600T T30
Tested-by: Svyatoslav Ryhel <clamor95@gmail.com> # HTC One X T30
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2023-04-07 19:52:54 +02:00
Svyatoslav Ryhel
a8f4f9f815 video: tegra-dc: pass DC regmap to internal devices
Internal video devices like DSI and HDMI controllers
require sending commands into DC register field.
To make this available, lets create platform data,
which is restricted to pass DC regmap only to
pre-defined devices.

Tested-by: Andreas Westman Dorcsak <hedmoo@yahoo.com> # ASUS TF T30
Tested-by: Nicolas Chauvet <kwizart@gmail.com> # Paz00
Tested-by: Robert Eckelmann <longnoserob@gmail.com> # ASUS TF101 T20
Tested-by: Svyatoslav Ryhel <clamor95@gmail.com> # HTC One X T30
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2023-04-07 19:47:52 +02:00
Marcel Ziswiler
8dfeee651f tegra: lcd: video: integrate display driver for t30
On popular request make the display driver from T20 work on T30 as
well. Turned out to be quite straight forward. However a few notes
about some things encountered during porting: Of course the T30 device
tree was completely missing host1x as well as PWM support but it turns
out this can simply be copied from T20. The only trouble compiling the
Tegra video driver for T30 had to do with some hard-coded PWM pin
muxing for T20 which is quite ugly anyway. On T30 this gets handled by
a board specific complete pin muxing table. The older Chromium U-Boot
2011.06 which to my knowledge was the only prior attempt at enabling a
display driver for T30 for whatever reason got some clocking stuff
mixed up. Turns out at least for a single display controller T20 and
T30 can be clocked quite similar. Enjoy.

Tested-by: Andreas Westman Dorcsak <hedmoo@yahoo.com> # ASUS TF T30
Tested-by: Jonas Schwöbel <jonasschwoebel@yahoo.de> # Surface RT T30
Tested-by: Svyatoslav Ryhel <clamor95@gmail.com> # LG P895 T30
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2023-04-07 18:24:42 +02:00
Hai Pham
36b63c92c3 ARM: renesas: Add R8A779G0 V4H White Hawk board code
Add board code for R8A779G0 V4H White Hawk board.

Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
[Marek: Synchronize configuration symbols which are now switched to Kconfig
        Mallocate gd->bd->bi_boot_params, i.e. drop the assignment
        Sort headers, use clrbits_le32(), use BIT macros where appropriate
        Use CONFIG_SYS_CLK_FREQ for counter frequency instead of custom macro]
2023-04-07 17:13:28 +02:00
Hai Pham
e4e242b296 ARM: renesas: Add R8A779G0 V4H Kconfig entry and PRR ID
Add Kconfig entry and PRR ID to support R8A779G0 V4H SoC.

Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
[Marek: Update commit message]
2023-04-07 17:13:28 +02:00
Tho Vu
2ea98fc9f9 ARM: dts: renesas: Add R8A779G0 V4H White Hawk DTs
Add DTs for R8A779G0 V4H White Hawk CPU and BreakOut boards.

Based on Linux next 20230228 DTs up to
commit 058f4df42121 ("Add linux-next specific files for 20230228")

Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Signed-off-by: Tho Vu <tho.vu.wh@renesas.com>
Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
[Marek: Sync with Linux next 20230228, update commit message
        Rename DTs to match Linux, which has dash between white-hawk]
2023-04-07 17:13:28 +02:00
Hai Pham
2ed192361e ARM: dts: renesas: Add R8A779G0 V4H DT extras
Add R8A779G0 V4H DT extras for U-Boot.

Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
[Marek: Update compatible string to match latest upstream]
2023-04-07 17:13:28 +02:00
Phong Hoang
2c8941659d ARM: dts: renesas: Add R8A779G0 V4H DT
Add initial DT support for R8A779G0 (R-Car V4H). Based on Linux next
commit 058f4df42121 ("Add linux-next specific files for 20230228")

Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Signed-off-by: Phong Hoang <phong.hoang.wz@renesas.com>
Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
[Marek: Sync with Linux next 20230228, update commit message]
2023-04-07 17:13:28 +02:00
Hai Pham
558d10620b ARM: renesas: Add R8A779F0 S4 Spider board code
Add board code for R8A779F0 S4 Spider board.

Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
[Marek: Synchronize configuration symbols which are now switched to Kconfig
        Mallocate gd->bd->bi_boot_params, i.e. drop the assignment
	Sort headers, use clrbits_le32(), use BIT macros where appropriate
	Use CONFIG_SYS_CLK_FREQ for counter frequency instead of custom macro]
2023-04-07 17:13:28 +02:00
Hai Pham
8f098fd623 ARM: renesas: Add R8A779F0 S4 Kconfig entry and PRR ID
Add Kconfig entry and PRR ID to support R8A779F0 S4 SoC.

Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
[Marek: Update commit message]
2023-04-07 17:13:28 +02:00
Hai Pham
d1bbe1bedd ARM: dts: renesas: Add R8A779F0 S4 Spider DTs
Add DTs for R8A779F0 S4 Spider CPU boards and Breakout boards.

Based on Linux next 20230228 DTs up to
commit 058f4df42121 ("Add linux-next specific files for 20230228")

Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
[Marek: Sync with Linux next 20230228, update commit message]
2023-04-07 17:13:28 +02:00
Hai Pham
d29bc87173 ARM: dts: renesas: Add R8A779F0 S4 DT extras
Add R8A779F0 S4 DT extras for U-Boot.

Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
[Marek: Update compatible string to match latest upstream]
2023-04-07 17:13:28 +02:00
Hai Pham
b51f953053 ARM: dts: renesas: Add R8A779F0 S4 DT
Add initial DT for R8A779F0 S4 SoC. Based on Linux next
commit 058f4df42121 ("Add linux-next specific files for 20230228")

Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
[Marek: Sync with Linux next 20230228, update commit message]
2023-04-07 17:13:28 +02:00
Hai Pham
32e6893caf ARM: rmobile: Turn R-Car V3U into R-Car Gen4
Despite the name, R-Car V3U is the first member of the R-Car Gen4
family [1]. Hence reflect this in related files, select appropriate
configuration options and split DT build into its own GEN4 entry.

[1] https://www.renesas.com/us/en/products/automotive-products/automotive-system-chips-socs/r-car-v3u-best-class-r-car-v3u-asil-d-system-chip-automated-driving

Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
[Marek: Deduplicate DTC_FLAGS addition using RCAR_64 symbol
        Update commit message]
2023-04-07 17:13:28 +02:00
Hai Pham
5a3b074255 ARM: rmobile: Add R-Car Generation 4 support
This adds R-Car Generation 4 (Gen4) support as Renesas ARM64 SoC.

In this version, reusing R-Car Gen3 lowlevel initialize routine [1]
and R-Car Gen3 memory map tables [2] .

[1] arch/arm/mach-rmobile/lowlevel_init_gen3.S
[2] arch/arm/mach-rmobile/memmap-gen3.c

Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
[Marek: - Enable DTO support by default
        - Sort the Kconfig lists
	- Select RCAR_64 Kconfig option to pull in all the shared
	  Kconfig options with Gen3, and use where applicable to
	  deduplicate entries.
	- Fix reference [2] typo in commit message
	- Drop config options moved to Kconfig, rename rest to CFG_
	  accordingly to synchronize with upstream changes. Drop
	  removed CONFIG_VERY_BIG_RAM.
        - Move board size limit to arch/Kconfig
	- Move GICR_BASE to headers instead of common config]
2023-04-07 14:33:46 +02:00
Francis Laniel
5ffcf7c590 arm: lib: add __gnu_thumb1_case_si
The assembly for __gnu_thumb1_case_si was taken from upstream gcc and adapted
as width suffix was removed for the add instruction [1].

Signed-off-by: Francis Laniel <francis.laniel@amarulasolutions.com>
Tested-by: Tony Dinh <mibodhi@gmail.com>
[1] 4f181f9c7e/libgcc/config/arm/lib1funcs.S (L2156)
Acked-by: Pali Rohár <pali@kernel.org>
Acked-by:  Tony Dinh <mibodhi@gmail.com>
2023-04-06 19:10:08 -04:00
Tom Rini
b0b77fdf3d Merge tag 'fsl-qoriq-2023-4-6' of https://source.denx.de/u-boot/custodians/u-boot-fsl-qoriq
convert NXP LS1028A RDB and QDS to DM_SERIAL
enable DM_SERIAL for ls1088a
sync serial nodes with linux for lx2160a/ls1088a
2023-04-05 22:19:57 -04:00
Tom Rini
0916377b83 u-boot-imx-next-20230404
------------------------
 
 CI : https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/15887
 
 - boards : DH-Electronics, Toradex, imx8mp-beacon-kit
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Merge tag 'u-boot-imx-next-20230404' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx

u-boot-imx-next-20230404
------------------------

CI : https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/15887

- boards : DH-Electronics, Toradex, imx8mp-beacon-kit
2023-04-04 09:50:13 -04:00
Ioana Ciornei
f2ac9f6a17 arch: arm: dts: fsl-lx2160a.dtsi: tag serial nodes with bootph-all
Tag the serial nodes with bootph-all in order to have these nodes and
the drivers available before relocation.

Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2023-04-04 17:31:47 +08:00
Ioana Ciornei
dea0f1a27f arch: arm: dts: fsl-lx2160a.dtsi: sync serial nodes with Linux
Sync the serial nodes of the LX2160A based boards with their
representation in Linux. We also imported the clockgen and sysclk nodes
which are dependencies.

Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2023-04-04 17:31:46 +08:00
Ioana Ciornei
853493b9f9 arch: arm: dts: fsl-lx2160a.dtsi: move the serial nodes under soc
Move the serial nodes under the soc node. No changes are made to the
nodes, just their location is changed.

Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2023-04-04 17:31:46 +08:00
Ioana Ciornei
677fb95372 arch: arm: dts: fsl-lx2160a.dtsi: add an 'soc' node
The u-boot dts for these boards do not have an soc node, unlike its
Linux counterpart. This patch just adds the soc node as seen in Linux,
the next patches will move some nodes under it.

Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2023-04-04 17:31:46 +08:00
Ioana Ciornei
a593c1fec5 arch: arm: dts: fsl-ls1088a.dtsi: tag serial nodes with bootph-all
Tag the serial nodes with bootph-all in order to have these nodes and
the drivers available before relocation.

Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2023-04-04 17:31:46 +08:00
Ioana Ciornei
571c49789d arch: arm: dts: fsl-ls1088a.dtsi: sync serial nodes with Linux
Sync the serial nodes of the LS1088A based boards with their
representation in Linux. We also imported the clockgen and sysclk nodes
which are dependencies.

Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2023-04-04 17:31:46 +08:00
Ioana Ciornei
2b7d2c236b arch: arm: dts: fsl-ls1088a.dtsi: move the serial nodes under soc
Move the serial nodes under the soc node. No changes are made to the
nodes, just their location is changed.

Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2023-04-04 17:31:46 +08:00
Ioana Ciornei
204d574fe4 arch: arm: dts: fsl-ls1088a.dtsi: add an 'soc' node
The u-boot dts for these boards do not have an soc node, unlike its
Linux counterpart. This patch just adds the soc node as seen in Linux,
the next patches will move some nodes under it.

Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2023-04-04 17:31:46 +08:00
Adam Ford
ab53bd43db arm64: imx: Add support for imx8mp-beacon-kit
Beacon Embedded has an i.MX8M Plus development kit which consists
of a SOM + baseboard.  The SOM includes Bluetooth, WiFi, QSPI, eMMC,
and one Ethernet PHY. The baseboard includes audio, HDMI, USB-C Dual
Role port, USB Hub with five ports, a PCIe slot, and a second Ethernet
PHY.  The device trees are already queued for inclusion in Linux 6.3.

Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2023-04-04 09:40:25 +02:00
Marek Vasut
302f7e80b9 ARM: dts: imx: Add support for Data Modul i.MX8M Plus eDM SBC
Add support for Data Modul i.MX8M Plus eDM SBC board. This is an
evaluation board for various custom display units. Currently
supported are serial console, ethernet, eMMC, SD, SPI NOR, USB.

Signed-off-by: Marek Vasut <marex@denx.de>
2023-04-04 09:35:39 +02:00
Marek Vasut
240a274f0f ARM: dts: imx: Add WDT reboot bindings on DH i.MX6 DHSOM
Add WDT reboot bindings on DH i.MX6 DHSOM to permit the platform
to reboot via WDT in U-Boot. These are custom U-Boot bindings,
hence they are placed in -u-boot.dtsi .

Reviewed-by: Fabio Estevam <festevam@denx.de>
Signed-off-by: Marek Vasut <marex@denx.de>
2023-04-04 09:35:39 +02:00
Luca Ceresoli
95942f99a7 arm: imx: add u-boot-nand.imx to boot from NAND without SPL
U-Boot can be booted from NAND without SPL by prepending the DCD header to
the actual U-Boot binary. However this requires prepending 1024 bytes to
u-boot.imx (DCD + u-boot.bin).

There is already a similar target to build spl/u-boot-nand-spl.imx, add the
same option for no-SPL boot.

Tested on i.MX6ULL.

The resulting layout of u-boot-nand.imx is:

 - Offset 0x0000 (0 KiB): padding
 - Offset 0x0400 (1 KiB): DCD header
 - Offset 0x1000 (4 KiB): u-boot.bin

Signed-off-by: Luca Ceresoli <luca.ceresoli@bootlin.com>
2023-04-04 09:35:39 +02:00
Tom Rini
8ca4202595 mx6sx-udoo-neo-basic-u-boot.dtsi: Correct to bootph-all
Updating this was missed in the merge of the next branch back in to
master.

Signed-off-by: Tom Rini <trini@konsulko.com>
2023-04-03 20:48:24 -04:00
Tom Rini
288fe30a23 Merge branch 'next'
Signed-off-by: Tom Rini <trini@konsulko.com>
2023-04-03 16:45:41 -04:00