Merge branch 'next'

Signed-off-by: Tom Rini <trini@konsulko.com>
This commit is contained in:
Tom Rini 2023-04-03 16:45:41 -04:00
commit 288fe30a23
1254 changed files with 34309 additions and 23377 deletions

View file

@ -2,7 +2,7 @@ variables:
windows_vm: windows-2019
ubuntu_vm: ubuntu-22.04
macos_vm: macOS-12
ci_runner_image: trini/u-boot-gitlab-ci-runner:jammy-20230126-10Feb2023
ci_runner_image: trini/u-boot-gitlab-ci-runner:jammy-20230308-21Mar2023
# Add '-u 0' options for Azure pipelines, otherwise we get "permission
# denied" error when it tries to "useradd -m -u 1001 vsts_azpcontainer",
# since our $(ci_runner_image) user is not root.
@ -187,6 +187,13 @@ stages:
options: $(container_option)
steps:
- script: |
mkdir nokia_rx51_tmp
ln -s /opt/nokia/u-boot-gen-combined nokia_rx51_tmp/
ln -s /opt/nokia/qemu-n900.tar.gz nokia_rx51_tmp/
ln -s /opt/nokia/kernel_2.6.28-20103103+0m5_armel.deb nokia_rx51_tmp/
ln -s /opt/nokia/libc6_2.5.1-1eglibc27+0m5_armel.deb nokia_rx51_tmp/
ln -s /opt/nokia/busybox_1.10.2.legal-1osso30+0m5_armel.deb nokia_rx51_tmp/
ln -s /opt/nokia/qemu-system-arm nokia_rx51_tmp/
export PATH=/opt/gcc-12.2.0-nolibc/arm-linux-gnueabi/bin:$PATH
test/nokia_rx51_test.sh
@ -213,6 +220,28 @@ stages:
export PYTHONPATH=${UBOOT_TRAVIS_BUILD_DIR}/scripts/dtc/pylibfdt
make pylint_err
- job: check_for_pre_schema_tags
displayName: 'Check for pre-schema driver model tags'
pool:
vmImage: $(ubuntu_vm)
container:
image: $(ci_runner_image)
options: $(container_option)
steps:
# If grep succeeds and finds a match the test fails as we should
# have no matches.
- script: git grep u-boot,dm- -- '*.dts*' && exit 1 || exit 0
- job: check_packing_of_python_tools
displayName: 'Check we can package the Python tools'
pool:
vmImage: $(ubuntu_vm)
container:
image: $(ci_runner_image)
options: $(container_option)
steps:
- script: make pip
- stage: test_py
jobs:
- job: test_py
@ -234,7 +263,7 @@ stages:
TEST_PY_TEST_SPEC: "test_ofplatdata or test_handoff or test_spl"
sandbox_vpl:
TEST_PY_BD: "sandbox_vpl"
TEST_PY_TEST_SPEC: "test_vpl_help or test_spl"
TEST_PY_TEST_SPEC: "vpl or test_spl"
sandbox_noinst:
TEST_PY_BD: "sandbox_noinst"
TEST_PY_TEST_SPEC: "test_ofplatdata or test_handoff or test_spl"
@ -397,10 +426,11 @@ stages:
virtualenv -p /usr/bin/python3 /tmp/venv
. /tmp/venv/bin/activate
pip install -r test/py/requirements.txt
pip install pytest-azurepipelines
export PATH=/opt/qemu/bin:/tmp/uboot-test-hooks/bin:${PATH};
export PYTHONPATH=/tmp/uboot-test-hooks/py/travis-ci;
# "${var:+"-k $var"}" expands to "" if $var is empty, "-k $var" if not
./test/py/test.py -ra --bd ${TEST_PY_BD} ${TEST_PY_ID} ${TEST_PY_TEST_SPEC:+"-k ${TEST_PY_TEST_SPEC}"} --build-dir "$UBOOT_TRAVIS_BUILD_DIR";
./test/py/test.py -ra -o cache_dir="$UBOOT_TRAVIS_BUILD_DIR"/.pytest_cache --bd ${TEST_PY_BD} ${TEST_PY_ID} ${TEST_PY_TEST_SPEC:+"-k ${TEST_PY_TEST_SPEC}"} --build-dir "$UBOOT_TRAVIS_BUILD_DIR" --report-dir "$UBOOT_TRAVIS_BUILD_DIR";
# the below corresponds to .gitlab-ci.yml "after_script"
rm -rf /tmp/uboot-test-hooks /tmp/venv
EOF

View file

@ -1,8 +1,16 @@
# SPDX-License-Identifier: GPL-2.0+
variables:
DEFAULT_TAG: ""
MIRROR_DOCKER: docker.io
default:
tags:
- ${DEFAULT_TAG}
# Grab our configured image. The source for this is found
# in the u-boot tree at tools/docker/Dockerfile
image: trini/u-boot-gitlab-ci-runner:jammy-20230126-10Feb2023
image: ${MIRROR_DOCKER}/trini/u-boot-gitlab-ci-runner:jammy-20230308-21Mar2023
# We run some tests in different order, to catch some failures quicker.
stages:
@ -30,6 +38,7 @@ stages:
fi
after_script:
- cp -v /tmp/${TEST_PY_BD}/*.{html,css} .
- rm -rf /tmp/uboot-test-hooks /tmp/venv
script:
# If we've been asked to use clang only do one configuration.
@ -76,10 +85,12 @@ stages:
./test/py/test.py -ra --bd ${TEST_PY_BD} ${TEST_PY_ID}
${TEST_PY_TEST_SPEC:+"-k ${TEST_PY_TEST_SPEC}"}
--build-dir "$UBOOT_TRAVIS_BUILD_DIR"
# It seems that the files in /tmp go away, so copy out what we need
- if [[ "${TEST_PY_BD}" == "coreboot" ]]; then
cp -v /tmp/coreboot/*.{html,css} .;
fi
artifacts:
when: always
paths:
- "*.html"
- "*.css"
expire_in: 1 week
build all 32bit ARM platforms:
stage: world build
@ -213,7 +224,14 @@ Run binman, buildman, dtoc, Kconfig and patman testsuites:
Run tests for Nokia RX-51 (aka N900):
stage: testsuites
script:
- export PATH=/opt/gcc-12.2.0-nolibc/arm-linux-gnueabi/bin:$PATH;
- mkdir nokia_rx51_tmp;
ln -s /opt/nokia/u-boot-gen-combined nokia_rx51_tmp/;
ln -s /opt/nokia/qemu-n900.tar.gz nokia_rx51_tmp/;
ln -s /opt/nokia/kernel_2.6.28-20103103+0m5_armel.deb nokia_rx51_tmp/;
ln -s /opt/nokia/libc6_2.5.1-1eglibc27+0m5_armel.deb nokia_rx51_tmp/;
ln -s /opt/nokia/busybox_1.10.2.legal-1osso30+0m5_armel.deb nokia_rx51_tmp/;
ln -s /opt/nokia/qemu-system-arm nokia_rx51_tmp/;
export PATH=/opt/gcc-12.2.0-nolibc/arm-linux-gnueabi/bin:$PATH;
test/nokia_rx51_test.sh
# Check for any pylint regressions
@ -235,6 +253,21 @@ Run pylint:
- export PYTHONPATH="${UBOOT_TRAVIS_BUILD_DIR}/scripts/dtc/pylibfdt"
- make pylint_err
# Check for pre-schema driver model tags
Check for pre-schema tags:
stage: testsuites
script:
- git config --global --add safe.directory "${CI_PROJECT_DIR}";
# If grep succeeds and finds a match the test fails as we should
# have no matches.
- git grep u-boot,dm- -- '*.dts*' && exit 1 || exit 0
# Check we can package the Python tools
Check packing of Python tools:
stage: testsuites
script:
- make pip
# Test sandbox with test.py
sandbox test.py:
variables:
@ -268,7 +301,7 @@ sandbox_noinst_test.py:
sandbox_vpl test.py:
variables:
TEST_PY_BD: "sandbox_vpl"
TEST_PY_TEST_SPEC: "test_vpl_help or test_spl"
TEST_PY_TEST_SPEC: "vpl or test_spl"
<<: *buildman_and_testpy_dfn
# Enable tracing and disable LTO, to ensure functions are not elided
@ -454,9 +487,4 @@ coreboot test.py:
TEST_PY_BD: "coreboot"
TEST_PY_TEST_SPEC: "not sleep"
TEST_PY_ID: "--id qemu"
artifacts:
paths:
- "*.html"
- "*.css"
expire_in: 1 week
<<: *buildman_and_testpy_dfn

18
Kconfig
View file

@ -427,16 +427,16 @@ config REMAKE_ELF
config BUILD_TARGET
string "Build target special images"
default "u-boot-elf.srec" if RCAR_GEN3
default "u-boot-with-spl.bin" if ARCH_AT91 && SPL_NAND_SUPPORT
default "u-boot-with-spl.bin" if MPC85xx && !E500MC && !E5500 && !E6500 && SPL
default "u-boot-with-spl.imx" if ARCH_MX6 && SPL
default "u-boot-with-spl.kwb" if ARMADA_32BIT && SPL
default "u-boot-with-spl.sfp" if TARGET_SOCFPGA_ARRIA10
default "u-boot-with-spl.sfp" if TARGET_SOCFPGA_GEN5
default "u-boot-with-spl.kwb" if ARMADA_32BIT && SPL
default "u-boot-elf.srec" if RCAR_GEN3
default "u-boot.itb" if !BINMAN && SPL_LOAD_FIT && (ARCH_ROCKCHIP || \
ARCH_SUNXI || RISCV || ARCH_ZYNQMP)
default "u-boot.kwb" if (ARCH_KIRKWOOD || ARMADA_32BIT) && !SPL
default "u-boot-with-spl.bin" if MPC85xx && !E500MC && !E5500 && !E6500 && SPL
default "u-boot-with-spl.bin" if ARCH_AT91 && SPL_NAND_SUPPORT
default "u-boot-with-spl.imx" if ARCH_MX6 && SPL
help
Some SoCs need special image types (e.g. U-Boot binary
with a special header) as build targets. By defining
@ -575,14 +575,6 @@ config MP
This provides an option to bringup different processors
in multiprocessor cases.
config EXAMPLES
bool "Compile API examples"
depends on !SANDBOX
default y if ARCH_QEMU
help
U-Boot provides an API for standalone applications. Examples are
provided in directory examples/.
endmenu # General setup
source "api/Kconfig"

View file

@ -1249,6 +1249,12 @@ M: Heiko Schocher <hs@denx.de>
S: Maintained
F: drivers/pci/pci_mpc85xx.c
PCI MPS
M: Stephen Carlson <stcarlso@linux.microsoft.com>
S: Maintained
F: cmd/pci_mps.c
F: test/cmd/pci_mps.c
POWER
M: Jaehoon Chung <jh80.chung@samsung.com>
S: Maintained

View file

@ -522,7 +522,7 @@ env_h := include/generated/environment.h
no-dot-config-targets := clean clobber mrproper distclean \
help %docs check% coccicheck \
ubootversion backup tests check pcheck qcheck tcheck \
pylint pylint_err
pylint pylint_err _pip pip pip_test pip_release
config-targets := 0
mixed-targets := 0
@ -790,6 +790,7 @@ KBUILD_CFLAGS += $(call cc-disable-warning, tautological-compare)
# See modpost pattern 2
KBUILD_CFLAGS += $(call cc-option, -mno-global-merge,)
KBUILD_CFLAGS += $(call cc-option, -fcatch-undefined-behavior)
KBUILD_CFLAGS += $(call cc-disable-warning, deprecated-non-prototype)
endif
# These warnings generated too much noise in a regular build.
@ -957,7 +958,6 @@ endif
# Always append INPUTS so that arch config.mk's can add custom ones
INPUTS-y += u-boot.srec u-boot.bin u-boot.sym System.map binary_size_check
INPUTS-$(CONFIG_ONENAND_U_BOOT) += u-boot-onenand.bin
ifeq ($(CONFIG_SPL_FSL_PBL),y)
INPUTS-$(CONFIG_RAMBOOT_PBL) += u-boot-with-spl-pbl.bin
else
@ -2274,6 +2274,21 @@ backup:
F=`basename $(srctree)` ; cd .. ; \
gtar --force-local -zcvf `LC_ALL=C date "+$$F-%Y-%m-%d-%T.tar.gz"` $$F
PHONY += _pip pip pip_release
pip_release: PIP_ARGS="--real"
pip_test: PIP_ARGS=""
pip: PIP_ARGS="-n"
pip pip_test pip_release: _pip
_pip:
scripts/make_pip.sh u_boot_pylib ${PIP_ARGS}
scripts/make_pip.sh patman ${PIP_ARGS}
scripts/make_pip.sh buildman ${PIP_ARGS}
scripts/make_pip.sh dtoc ${PIP_ARGS}
scripts/make_pip.sh binman ${PIP_ARGS}
help:
@echo 'Cleaning targets:'
@echo ' clean - Remove most generated files but keep the config'
@ -2307,6 +2322,11 @@ help:
@echo " cfg - Don't build, just create the .cfg files"
@echo " envtools - Build only the target-side environment tools"
@echo ''
@echo 'PyPi / pip targets:'
@echo ' pip - Check building of PyPi packages'
@echo ' pip_test - Build PyPi pakages and upload to test server'
@echo ' pip_release - Build PyPi pakages and upload to release server'
@echo ''
@echo 'Static analysers'
@echo ' checkstack - Generate a list of stack hogs'
@echo ' coccicheck - Execute static code analysis with Coccinelle'

View file

@ -10,9 +10,16 @@ config SYS_MMC_MAX_DEVICE
depends on API
default 1
endmenu
config EXAMPLES
bool "Compile API examples"
depends on !SANDBOX
default y if ARCH_QEMU
help
U-Boot provides an API for standalone applications. Examples are
provided in directory examples/.
config STANDALONE_LOAD_ADDR
depends on EXAMPLES
hex "Address in memory to link standalone applications to"
default 0xffffffff80200000 if MIPS && 64BIT
default 0x8c000000 if SH
@ -30,3 +37,5 @@ config STANDALONE_LOAD_ADDR
This option defines a board specific value for the address where
standalone program gets loaded, thus overwriting the architecture
dependent default settings.
endmenu

View file

@ -18,7 +18,7 @@
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <500000000>;
u-boot,dm-pre-reloc;
bootph-all;
};
};

View file

@ -11,7 +11,7 @@
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <750000000>;
u-boot,dm-pre-reloc;
bootph-all;
};
};
};

View file

@ -11,7 +11,7 @@
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <100000000>;
u-boot,dm-pre-reloc;
bootph-all;
};
};
};

View file

@ -13,11 +13,11 @@
#address-cells = <1>;
#size-cells = <1>;
ranges = <0x00000000 0xe0000000 0x10000000>;
u-boot,dm-pre-reloc;
bootph-all;
clocks {
compatible = "simple-bus";
u-boot,dm-pre-reloc;
bootph-all;
apbclk: apbclk {
compatible = "fixed-clock";
@ -29,7 +29,7 @@
compatible = "fixed-clock";
clock-frequency = <33333333>;
#clock-cells = <0>;
u-boot,dm-pre-reloc;
bootph-all;
};
mmcclk_ciu: mmcclk-ciu {

View file

@ -21,7 +21,7 @@
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <40000000>;
u-boot,dm-pre-reloc;
bootph-all;
};
};

View file

@ -23,7 +23,7 @@
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <500000000>;
u-boot,dm-pre-reloc;
bootph-all;
};
};

View file

@ -19,7 +19,7 @@
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <144000000>;
u-boot,dm-pre-reloc;
bootph-all;
};
};

View file

@ -18,7 +18,7 @@
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <70000000>;
u-boot,dm-pre-reloc;
bootph-all;
};
};

View file

@ -14,7 +14,7 @@
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
u-boot,dm-pre-reloc;
bootph-all;
timer@0 {
compatible = "snps,arc-timer";

View file

@ -588,6 +588,7 @@ config ARCH_KIRKWOOD
config ARCH_MVEBU
bool "Marvell MVEBU family (Armada XP/375/38x/3700/7K/8K)"
select ARCH_EARLY_INIT_R if ARM64
select DM
select DM_SERIAL
select DM_SPI
@ -1208,6 +1209,7 @@ config ARCH_VF610
config ARCH_ZYNQ
bool "Xilinx Zynq based platform"
select ARM_TWD_TIMER
select ARCH_EARLY_INIT_R if FPGA || (SPL && SPL_FPGA)
select CLK
select CLK_ZYNQ
select CPU_V7A
@ -1229,7 +1231,6 @@ config ARCH_ZYNQ
select SPL_TIMER if SPL
select SUPPORT_SPL
select TIMER
imply ARCH_EARLY_INIT_R
imply BOARD_LATE_INIT
imply CMD_CLK
imply CMD_DM

View file

@ -13,7 +13,6 @@ endif
endif
obj-$(if $(filter mxs,$(SOC)),y) += mxs/
obj-$(if $(filter spear,$(SOC)),y) += spear/
obj-$(CONFIG_ARCH_SUNXI) += sunxi/
# some files can only build in ARM or THUMB2, not THUMB1

View file

@ -25,11 +25,7 @@ DECLARE_GLOBAL_DATA_PTR;
void ft_fixup_enet_phy_connect_type(void *fdt)
{
#ifdef CONFIG_DM_ETH
struct udevice *dev;
#else
struct eth_device *dev;
#endif
struct tsec_private *priv;
const char *enet_path, *phy_path;
char enet[16];
@ -37,12 +33,8 @@ void ft_fixup_enet_phy_connect_type(void *fdt)
int phy_node;
int i = 0;
uint32_t ph;
#ifdef CONFIG_DM_ETH
char *name[3] = { "ethernet@2d10000", "ethernet@2d50000",
"ethernet@2d90000" };
#else
char *name[3] = { "eTSEC1", "eTSEC2", "eTSEC3" };
#endif
for (; i < ARRAY_SIZE(name); i++) {
dev = eth_get_dev_by_name(name[i]);
@ -53,11 +45,7 @@ void ft_fixup_enet_phy_connect_type(void *fdt)
continue;
}
#ifdef CONFIG_DM_ETH
priv = dev_get_priv(dev);
#else
priv = dev->priv;
#endif
if (priv->flags & TSEC_SGMII)
continue;

View file

@ -84,10 +84,3 @@ void enable_caches(void)
/* Enable D-cache. I-cache is already enabled in start.S */
dcache_enable();
}
#if defined(CONFIG_ARCH_MISC_INIT)
int arch_misc_init(void)
{
return 0;
}
#endif /* CONFIG_ARCH_MISC_INIT */

View file

@ -1,5 +1,9 @@
if ARM64
config CMO_BY_VA_ONLY
bool "Force cache maintenance to be exclusively by VA"
depends on !SYS_DISABLE_DCACHE_OPS
config ARMV8_SPL_EXCEPTION_VECTORS
bool "Install crash dump exception vectors"
depends on SPL

View file

@ -12,6 +12,7 @@
#include <asm/system.h>
#include <linux/linkage.h>
#ifndef CONFIG_CMO_BY_VA_ONLY
/*
* void __asm_dcache_level(level)
*
@ -116,6 +117,41 @@ ENTRY(__asm_invalidate_dcache_all)
ENDPROC(__asm_invalidate_dcache_all)
.popsection
.pushsection .text.__asm_flush_l3_dcache, "ax"
WEAK(__asm_flush_l3_dcache)
mov x0, #0 /* return status as success */
ret
ENDPROC(__asm_flush_l3_dcache)
.popsection
.pushsection .text.__asm_invalidate_l3_icache, "ax"
WEAK(__asm_invalidate_l3_icache)
mov x0, #0 /* return status as success */
ret
ENDPROC(__asm_invalidate_l3_icache)
.popsection
#else /* CONFIG_CMO_BY_VA */
/*
* Define these so that they actively clash with in implementation
* accidentally selecting CONFIG_CMO_BY_VA
*/
.pushsection .text.__asm_invalidate_l3_icache, "ax"
ENTRY(__asm_invalidate_l3_icache)
mov x0, xzr
ret
ENDPROC(__asm_invalidate_l3_icache)
.popsection
.pushsection .text.__asm_flush_l3_dcache, "ax"
ENTRY(__asm_flush_l3_dcache)
mov x0, xzr
ret
ENDPROC(__asm_flush_l3_dcache)
.popsection
#endif /* CONFIG_CMO_BY_VA */
/*
* void __asm_flush_dcache_range(start, end)
*
@ -189,20 +225,6 @@ WEAK(__asm_invalidate_l3_dcache)
ENDPROC(__asm_invalidate_l3_dcache)
.popsection
.pushsection .text.__asm_flush_l3_dcache, "ax"
WEAK(__asm_flush_l3_dcache)
mov x0, #0 /* return status as success */
ret
ENDPROC(__asm_flush_l3_dcache)
.popsection
.pushsection .text.__asm_invalidate_l3_icache, "ax"
WEAK(__asm_invalidate_l3_icache)
mov x0, #0 /* return status as success */
ret
ENDPROC(__asm_invalidate_l3_icache)
.popsection
/*
* void __asm_switch_ttbr(ulong new_ttbr)
*

View file

@ -163,6 +163,83 @@ static u64 *find_pte(u64 addr, int level)
return NULL;
}
#ifdef CONFIG_CMO_BY_VA_ONLY
static void __cmo_on_leaves(void (*cmo_fn)(unsigned long, unsigned long),
u64 pte, int level, u64 base)
{
u64 *ptep;
int i;
ptep = (u64 *)(pte & GENMASK_ULL(47, PAGE_SHIFT));
for (i = 0; i < PAGE_SIZE / sizeof(u64); i++) {
u64 end, va = base + i * BIT(level2shift(level));
u64 type, attrs;
pte = ptep[i];
type = pte & PTE_TYPE_MASK;
attrs = pte & PMD_ATTRINDX_MASK;
debug("PTE %llx at level %d VA %llx\n", pte, level, va);
/* Not valid? next! */
if (!(type & PTE_TYPE_VALID))
continue;
/* Not a leaf? Recurse on the next level */
if (!(type == PTE_TYPE_BLOCK ||
(level == 3 && type == PTE_TYPE_PAGE))) {
__cmo_on_leaves(cmo_fn, pte, level + 1, va);
continue;
}
/*
* From this point, this must be a leaf.
*
* Start excluding non memory mappings
*/
if (attrs != PTE_BLOCK_MEMTYPE(MT_NORMAL) &&
attrs != PTE_BLOCK_MEMTYPE(MT_NORMAL_NC))
continue;
end = va + BIT(level2shift(level)) - 1;
/* No intersection with RAM? */
if (end < gd->ram_base ||
va >= (gd->ram_base + gd->ram_size))
continue;
/*
* OK, we have a partial RAM mapping. However, this
* can cover *more* than the RAM. Yes, u-boot is
* *that* braindead. Compute the intersection we care
* about, and not a byte more.
*/
va = max(va, (u64)gd->ram_base);
end = min(end, gd->ram_base + gd->ram_size);
debug("Flush PTE %llx at level %d: %llx-%llx\n",
pte, level, va, end);
cmo_fn(va, end);
}
}
static void apply_cmo_to_mappings(void (*cmo_fn)(unsigned long, unsigned long))
{
u64 va_bits;
int sl = 0;
if (!gd->arch.tlb_addr)
return;
get_tcr(NULL, &va_bits);
if (va_bits < 39)
sl = 1;
__cmo_on_leaves(cmo_fn, gd->arch.tlb_addr, sl, 0);
}
#else
static inline void apply_cmo_to_mappings(void *dummy) {}
#endif
/* Returns and creates a new full table (512 entries) */
static u64 *create_table(void)
{
@ -222,153 +299,110 @@ static void split_block(u64 *pte, int level)
set_pte_table(pte, new_table);
}
/* Add one mm_region map entry to the page tables */
static void add_map(struct mm_region *map)
static void map_range(u64 virt, u64 phys, u64 size, int level,
u64 *table, u64 attrs)
{
u64 *pte;
u64 virt = map->virt;
u64 phys = map->phys;
u64 size = map->size;
u64 attrs = map->attrs | PTE_TYPE_BLOCK | PTE_BLOCK_AF;
u64 blocksize;
int level;
u64 *new_table;
u64 map_size = BIT_ULL(level2shift(level));
int i, idx;
while (size) {
pte = find_pte(virt, 0);
if (pte && (pte_type(pte) == PTE_TYPE_FAULT)) {
debug("Creating table for virt 0x%llx\n", virt);
new_table = create_table();
set_pte_table(pte, new_table);
idx = (virt >> level2shift(level)) & (MAX_PTE_ENTRIES - 1);
for (i = idx; size; i++) {
u64 next_size, *next_table;
if (level >= 1 &&
size >= map_size && !(virt & (map_size - 1))) {
if (level == 3)
table[i] = phys | attrs | PTE_TYPE_PAGE;
else
table[i] = phys | attrs;
virt += map_size;
phys += map_size;
size -= map_size;
continue;
}
for (level = 1; level < 4; level++) {
pte = find_pte(virt, level);
if (!pte)
panic("pte not found\n");
/* Going one level down */
if (pte_type(&table[i]) == PTE_TYPE_FAULT)
set_pte_table(&table[i], create_table());
blocksize = 1ULL << level2shift(level);
debug("Checking if pte fits for virt=%llx size=%llx blocksize=%llx\n",
virt, size, blocksize);
if (size >= blocksize && !(virt & (blocksize - 1))) {
/* Page fits, create block PTE */
debug("Setting PTE %p to block virt=%llx\n",
pte, virt);
if (level == 3)
*pte = phys | attrs | PTE_TYPE_PAGE;
else
*pte = phys | attrs;
virt += blocksize;
phys += blocksize;
size -= blocksize;
break;
} else if (pte_type(pte) == PTE_TYPE_FAULT) {
/* Page doesn't fit, create subpages */
debug("Creating subtable for virt 0x%llx blksize=%llx\n",
virt, blocksize);
new_table = create_table();
set_pte_table(pte, new_table);
} else if (pte_type(pte) == PTE_TYPE_BLOCK) {
debug("Split block into subtable for virt 0x%llx blksize=0x%llx\n",
virt, blocksize);
split_block(pte, level);
}
}
next_table = (u64 *)(table[i] & GENMASK_ULL(47, PAGE_SHIFT));
next_size = min(map_size - (virt & (map_size - 1)), size);
map_range(virt, phys, next_size, level + 1, next_table, attrs);
virt += next_size;
phys += next_size;
size -= next_size;
}
}
enum pte_type {
PTE_INVAL,
PTE_BLOCK,
PTE_LEVEL,
};
/*
* This is a recursively called function to count the number of
* page tables we need to cover a particular PTE range. If you
* call this with level = -1 you basically get the full 48 bit
* coverage.
*/
static int count_required_pts(u64 addr, int level, u64 maxaddr)
static void add_map(struct mm_region *map)
{
int levelshift = level2shift(level);
u64 levelsize = 1ULL << levelshift;
u64 levelmask = levelsize - 1;
u64 levelend = addr + levelsize;
int r = 0;
int i;
enum pte_type pte_type = PTE_INVAL;
u64 attrs = map->attrs | PTE_TYPE_BLOCK | PTE_BLOCK_AF;
u64 va_bits;
int level = 0;
for (i = 0; mem_map[i].size || mem_map[i].attrs; i++) {
struct mm_region *map = &mem_map[i];
u64 start = map->virt;
u64 end = start + map->size;
get_tcr(NULL, &va_bits);
if (va_bits < 39)
level = 1;
/* Check if the PTE would overlap with the map */
if (max(addr, start) <= min(levelend, end)) {
start = max(addr, start);
end = min(levelend, end);
map_range(map->virt, map->phys, map->size, level,
(u64 *)gd->arch.tlb_addr, attrs);
}
/* We need a sub-pt for this level */
if ((start & levelmask) || (end & levelmask)) {
pte_type = PTE_LEVEL;
break;
}
static void count_range(u64 virt, u64 size, int level, int *cntp)
{
u64 map_size = BIT_ULL(level2shift(level));
int i, idx;
/* Lv0 can not do block PTEs, so do levels here too */
if (level <= 0) {
pte_type = PTE_LEVEL;
break;
}
idx = (virt >> level2shift(level)) & (MAX_PTE_ENTRIES - 1);
for (i = idx; size; i++) {
u64 next_size;
/* PTE is active, but fits into a block */
pte_type = PTE_BLOCK;
if (level >= 1 &&
size >= map_size && !(virt & (map_size - 1))) {
virt += map_size;
size -= map_size;
continue;
}
/* Going one level down */
(*cntp)++;
next_size = min(map_size - (virt & (map_size - 1)), size);
count_range(virt, next_size, level + 1, cntp);
virt += next_size;
size -= next_size;
}
}
/*
* Block PTEs at this level are already covered by the parent page
* table, so we only need to count sub page tables.
*/
if (pte_type == PTE_LEVEL) {
int sublevel = level + 1;
u64 sublevelsize = 1ULL << level2shift(sublevel);
static int count_ranges(void)
{
int i, count = 0, level = 0;
u64 va_bits;
/* Account for the new sub page table ... */
r = 1;
get_tcr(NULL, &va_bits);
if (va_bits < 39)
level = 1;
/* ... and for all child page tables that one might have */
for (i = 0; i < MAX_PTE_ENTRIES; i++) {
r += count_required_pts(addr, sublevel, maxaddr);
addr += sublevelsize;
for (i = 0; mem_map[i].size || mem_map[i].attrs; i++)
count_range(mem_map[i].virt, mem_map[i].size, level, &count);
if (addr >= maxaddr) {
/*
* We reached the end of address space, no need
* to look any further.
*/
break;
}
}
}
return r;
return count;
}
/* Returns the estimated required size of all page tables */
__weak u64 get_page_table_size(void)
{
u64 one_pt = MAX_PTE_ENTRIES * sizeof(u64);
u64 size = 0;
u64 va_bits;
int start_level = 0;
get_tcr(NULL, &va_bits);
if (va_bits < 39)
start_level = 1;
u64 size;
/* Account for all page tables we would need to cover our memory map */
size = one_pt * count_required_pts(0, start_level - 1, 1ULL << va_bits);
size = one_pt * count_ranges();
/*
* We need to duplicate our page table once to have an emergency pt to
@ -447,8 +481,12 @@ __weak void mmu_setup(void)
*/
void invalidate_dcache_all(void)
{
#ifndef CONFIG_CMO_BY_VA_ONLY
__asm_invalidate_dcache_all();
__asm_invalidate_l3_dcache();
#else
apply_cmo_to_mappings(invalidate_dcache_range);
#endif
}
/*
@ -458,6 +496,7 @@ void invalidate_dcache_all(void)
*/
inline void flush_dcache_all(void)
{
#ifndef CONFIG_CMO_BY_VA_ONLY
int ret;
__asm_flush_dcache_all();
@ -466,6 +505,9 @@ inline void flush_dcache_all(void)
debug("flushing dcache returns 0x%x\n", ret);
else
debug("flushing dcache successfully.\n");
#else
apply_cmo_to_mappings(flush_dcache_range);
#endif
}
#ifndef CONFIG_SYS_DISABLE_DCACHE_OPS
@ -520,9 +562,19 @@ void dcache_disable(void)
if (!(sctlr & CR_C))
return;
if (IS_ENABLED(CONFIG_CMO_BY_VA_ONLY)) {
/*
* When invalidating by VA, do it *before* turning the MMU
* off, so that at least our stack is coherent.
*/
flush_dcache_all();
}
set_sctlr(sctlr & ~(CR_C|CR_M));
flush_dcache_all();
if (!IS_ENABLED(CONFIG_CMO_BY_VA_ONLY))
flush_dcache_all();
__asm_invalidate_tlb_all();
}

View file

@ -48,18 +48,26 @@ int cleanup_before_linux(void)
disable_interrupts();
/*
* Turn off I-cache and invalidate it
*/
icache_disable();
invalidate_icache_all();
if (IS_ENABLED(CONFIG_CMO_BY_VA_ONLY)) {
/*
* Disable D-cache.
*/
dcache_disable();
} else {
/*
* Turn off I-cache and invalidate it
*/
icache_disable();
invalidate_icache_all();
/*
* turn off D-cache
* dcache_disable() in turn flushes the d-cache and disables MMU
*/
dcache_disable();
invalidate_dcache_all();
/*
* turn off D-cache
* dcache_disable() in turn flushes the d-cache and disables
* MMU
*/
dcache_disable();
invalidate_dcache_all();
}
return 0;
}

View file

@ -996,6 +996,7 @@ dtb-$(CONFIG_ARCH_IMX8M) += \
imx8mq-mnt-reform2.dtb \
imx8mq-phanbell.dtb \
imx8mp-dhcom-pdk2.dtb \
imx8mp-dhcom-pdk3.dtb \
imx8mp-evk.dtb \
imx8mp-icore-mx8mp-edimm2.2.dtb \
imx8mp-msc-sm2s.dtb \
@ -1259,7 +1260,10 @@ dtb-$(CONFIG_SOC_K3_AM654) += \
k3-am6528-iot2050-basic.dtb \
k3-am6528-iot2050-basic-pg2.dtb \
k3-am6548-iot2050-advanced.dtb \
k3-am6548-iot2050-advanced-pg2.dtb
k3-am6548-iot2050-advanced-pg2.dtb \
k3-am6548-iot2050-advanced-m2.dtb \
k3-am6548-iot2050-advanced-m2-bkey-usb3-overlay.dtbo \
k3-am6548-iot2050-advanced-m2-bkey-ekey-pcie-overlay.dtbo
dtb-$(CONFIG_SOC_K3_J721E) += k3-j721e-common-proc-board.dtb \
k3-j721e-r5-common-proc-board.dtb \
k3-j7200-common-proc-board.dtb \

View file

@ -6,69 +6,69 @@
/ {
ocp {
u-boot,dm-pre-reloc;
bootph-all;
};
};
&l4_wkup {
u-boot,dm-pre-reloc;
bootph-all;
segment@200000 {
u-boot,dm-pre-reloc;
bootph-all;
target-module@0
{
u-boot,dm-pre-reloc;
bootph-all;
compatible = "simple-bus";
};
target-module@7000 {
u-boot,dm-pre-reloc;
bootph-all;
compatible = "simple-bus";
};
target-module@9000 {
u-boot,dm-pre-reloc;
bootph-all;
compatible = "simple-bus";
};
};
};
&wkup_cm {
u-boot,dm-pre-reloc;
bootph-all;
};
&l4_wkup_clkctrl {
u-boot,dm-pre-reloc;
bootph-all;
};
&l4_per {
u-boot,dm-pre-reloc;
bootph-all;
segment@0 {
u-boot,dm-pre-reloc;
bootph-all;
compatible = "simple-bus";
target-module@4c000 {
u-boot,dm-pre-reloc;
bootph-all;
compatible = "simple-bus";
};
};
segment@100000 {
u-boot,dm-pre-reloc;
bootph-all;
compatible = "simple-bus";
target-module@ac000 {
u-boot,dm-pre-reloc;
bootph-all;
compatible = "simple-bus";
};
target-module@ae000 {
u-boot,dm-pre-reloc;
bootph-all;
compatible = "simple-bus";
};
};
};
&prcm {
u-boot,dm-pre-reloc;
bootph-all;
};
&gpio0_target {
u-boot,dm-pre-reloc;
bootph-all;
};
&prcm_clocks {
@ -80,33 +80,33 @@
};
&i2c0 {
u-boot,dm-pre-reloc;
bootph-all;
};
&uart0 {
u-boot,dm-pre-reloc;
bootph-all;
};
&mmc1 {
u-boot,dm-pre-reloc;
bootph-all;
};
&mmc2 {
u-boot,dm-pre-reloc;
bootph-all;
};
&gpio0 {
u-boot,dm-pre-reloc;
bootph-all;
};
&gpio1 {
u-boot,dm-pre-reloc;
bootph-all;
};
&gpio2 {
u-boot,dm-pre-reloc;
bootph-all;
};
&gpio3 {
u-boot,dm-pre-reloc;
bootph-all;
};

View file

@ -122,7 +122,7 @@
};
&uart0 { /* console uart */
u-boot,dm-spl;
bootph-pre-ram;
status = "okay";
};
@ -139,12 +139,12 @@
};
&i2c0 {
u-boot,dm-spl;
bootph-pre-ram;
status = "okay";
clock-frequency = <100000>;
tps: tps@24 { /* PMIC controller */
u-boot,dm-spl;
bootph-pre-ram;
reg = <0x24>;
compatible = "ti,tps65217";
};
@ -176,12 +176,12 @@
};
&i2c1 {
u-boot,dm-spl;
bootph-pre-ram;
status = "okay";
};
&spi0 {
u-boot,dm-spl;
bootph-pre-ram;
status = "okay";
cs-gpios = <&gpio0 5 GPIO_ACTIVE_HIGH>,
@ -192,8 +192,8 @@
spi-max-frequency = <24000000>;
spi_flash: spiflash@0 {
u-boot,dm-spl;
u-boot,dm-pre-reloc;
bootph-pre-ram;
bootph-all;
compatible = "spidev", "spi-flash";
spi-max-frequency = <24000000>;
reg = <0>;
@ -201,7 +201,7 @@
};
&spi1 {
u-boot,dm-spl;
bootph-pre-ram;
status = "okay";
cs-gpios = <&gpio3 17 GPIO_ACTIVE_HIGH>,
<&gpio0 19 GPIO_ACTIVE_HIGH>,
@ -302,10 +302,10 @@
segment@300000 {
target-module@e000 {
u-boot,dm-pre-reloc;
bootph-all;
lcdc: lcdc@0 {
u-boot,dm-pre-reloc;
bootph-all;
status = "okay";
ti,no-reset-on-init;
ti,no-idle-on-init;
@ -327,22 +327,22 @@
};
&gpio0 {
u-boot,dm-spl;
bootph-pre-ram;
ti,no-reset-on-init;
};
&gpio1 {
u-boot,dm-spl;
bootph-pre-ram;
ti,no-reset-on-init;
};
&gpio2 {
u-boot,dm-spl;
bootph-pre-ram;
ti,no-reset-on-init;
};
&gpio3 {
u-boot,dm-spl;
bootph-pre-ram;
ti,no-reset-on-init;
};

View file

@ -113,7 +113,7 @@
};
&uart0 { /* console uart */
u-boot,dm-spl;
bootph-pre-ram;
status = "okay";
};
@ -130,12 +130,12 @@
};
&i2c0 {
u-boot,dm-spl;
bootph-pre-ram;
status = "okay";
clock-frequency = <100000>;
tps: tps@24 { /* PMIC controller */
u-boot,dm-spl;
bootph-pre-ram;
reg = <0x24>;
compatible = "ti,tps65217";
@ -233,7 +233,7 @@
};
&mmc1 {
u-boot,dm-pre-reloc;
bootph-all;
vmmc-supply = <&vmmcsd_fixed>;
bus-width = <0x4>;
ti,non-removable;
@ -243,7 +243,7 @@
};
&mmc2 {
u-boot,dm-pre-reloc;
bootph-all;
vmmc-supply = <&vmmcsd_fixed>;
bus-width = <0x8>;
ti,non-removable;
@ -257,10 +257,10 @@
segment@300000 {
target-module@e000 {
u-boot,dm-pre-reloc;
bootph-all;
lcdc: lcdc@0 {
u-boot,dm-pre-reloc;
bootph-all;
status = "okay";
ti,no-reset-on-init;
ti,no-idle-on-init;
@ -282,22 +282,22 @@
};
&gpio0 {
u-boot,dm-spl;
bootph-pre-ram;
ti,no-reset-on-init;
};
&gpio1 {
u-boot,dm-spl;
bootph-pre-ram;
ti,no-reset-on-init;
};
&gpio2 {
u-boot,dm-spl;
bootph-pre-ram;
ti,no-reset-on-init;
};
&gpio3 {
u-boot,dm-spl;
bootph-pre-ram;
ti,no-reset-on-init;
};

View file

@ -6,14 +6,14 @@
#include "am33xx-u-boot.dtsi"
&l4_per {
u-boot,dm-pre-reloc;
bootph-all;
segment@300000 {
u-boot,dm-pre-reloc;
bootph-all;
target-module@e000 {
u-boot,dm-pre-reloc;
bootph-all;
lcdc: lcdc@0 {
u-boot,dm-pre-reloc;
bootph-all;
};
};
};
@ -28,27 +28,27 @@
};
&i2c0 {
u-boot,dm-pre-reloc;
bootph-all;
};
&l4_wkup {
u-boot,dm-pre-reloc;
bootph-all;
segment@200000 {
u-boot,dm-pre-reloc;
bootph-all;
target-module@9000 {
u-boot,dm-pre-reloc;
bootph-all;
};
};
};
&uart0 {
u-boot,dm-pre-reloc;
bootph-all;
};
&mmc1 {
u-boot,dm-pre-reloc;
bootph-all;
};
&mmc2 {
u-boot,dm-pre-reloc;
bootph-all;
};

View file

@ -12,10 +12,10 @@
segment@300000 {
target-module@e000 {
u-boot,dm-pre-reloc;
bootph-all;
lcdc: lcdc@0 {
u-boot,dm-pre-reloc;
bootph-all;
};
};
};

View file

@ -8,12 +8,12 @@
/ {
ocp {
u-boot,dm-pre-reloc;
bootph-all;
};
};
&l4_wkup {
u-boot,dm-pre-reloc;
bootph-all;
};
&l4_per {
@ -21,25 +21,25 @@
segment@300000 {
target-module@e000 {
u-boot,dm-pre-reloc;
bootph-all;
lcdc: lcdc@0 {
u-boot,dm-pre-reloc;
bootph-all;
};
};
};
};
&mmc1 {
u-boot,dm-pre-reloc;
bootph-all;
};
&mmc1_pins {
u-boot,dm-pre-reloc;
bootph-all;
};
&scm {
u-boot,dm-pre-reloc;
bootph-all;
};
&spi0 {
@ -54,31 +54,31 @@
};
&uart0 {
u-boot,dm-pre-reloc;
bootph-all;
};
&uart0_pins {
u-boot,dm-pre-reloc;
bootph-all;
};
&usb {
u-boot,dm-pre-reloc;
bootph-all;
};
&usb_ctrl_mod {
u-boot,dm-pre-reloc;
bootph-all;
};
&usb0 {
u-boot,dm-pre-reloc;
bootph-all;
};
&usb0_phy {
u-boot,dm-pre-reloc;
bootph-all;
};
&am33xx_pinmux {
u-boot,dm-pre-reloc;
bootph-all;
lcd0_pins: pinmux_lcd0_pins {
pinctrl-single,pins = <

View file

@ -6,65 +6,65 @@
#include "am33xx-u-boot.dtsi"
&l4_wkup {
u-boot,dm-pre-reloc;
bootph-all;
segment@200000 {
target-module@10000 {
u-boot,dm-pre-reloc;
bootph-all;
};
};
};
&l4_per {
u-boot,dm-pre-reloc;
bootph-all;
segment@100000 {
u-boot,dm-pre-reloc;
bootph-all;
target-module@a6000 {
u-boot,dm-pre-reloc;
bootph-all;
};
};
segment@300000 {
target-module@e000 {
u-boot,dm-pre-reloc;
bootph-all;
lcdc: lcdc@0 {
u-boot,dm-pre-reloc;
bootph-all;
};
};
};
};
&scm {
u-boot,dm-pre-reloc;
bootph-all;
};
&am33xx_pinmux {
u-boot,dm-pre-reloc;
bootph-all;
};
&uart3_pins {
u-boot,dm-pre-reloc;
bootph-all;
};
&uart3 {
u-boot,dm-pre-reloc;
bootph-all;
};
&mmc1 {
u-boot,dm-pre-reloc;
bootph-all;
};
&mmc1_pins {
u-boot,dm-pre-reloc;
bootph-all;
};
&mmc2 {
u-boot,dm-pre-reloc;
bootph-all;
};
&mmc2_pins {
u-boot,dm-pre-reloc;
bootph-all;
};

View file

@ -12,10 +12,10 @@
segment@300000 {
target-module@e000 {
u-boot,dm-pre-reloc;
bootph-all;
lcdc: lcdc@0 {
u-boot,dm-pre-reloc;
bootph-all;
};
};
};

View file

@ -15,19 +15,19 @@
};
ocp {
u-boot,dm-pre-reloc;
bootph-all;
};
};
&i2c0 {
u-boot,dm-pre-reloc;
bootph-all;
};
&uart0 {
u-boot,dm-pre-reloc;
bootph-all;
};
&mmc1 {
u-boot,dm-pre-reloc;
bootph-all;
cd-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
};

View file

@ -12,10 +12,10 @@
segment@300000 {
target-module@e000 {
u-boot,dm-pre-reloc;
bootph-all;
lcdc: lcdc@0 {
u-boot,dm-pre-reloc;
bootph-all;
};
};
};

View file

@ -9,36 +9,36 @@
&l4_wkup {
segment@200000 {
target-module@0 {
u-boot,dm-pre-reloc;
bootph-all;
};
};
};
&prcm {
u-boot,dm-pre-reloc;
bootph-all;
};
&per_cm {
u-boot,dm-pre-reloc;
bootph-all;
};
&l4ls_clkctrl {
u-boot,dm-pre-reloc;
bootph-all;
};
&l4_per {
u-boot,dm-pre-reloc;
bootph-all;
segment@0 {
u-boot,dm-pre-reloc;
bootph-all;
target-module@30000 {
u-boot,dm-pre-reloc;
bootph-all;
};
};
};
&spi0 {
u-boot,dm-pre-reloc;
bootph-all;
channel@0 {
u-boot,dm-pre-reloc;
bootph-all;
};
};

View file

@ -7,45 +7,45 @@
/ {
ocp {
u-boot,dm-pre-reloc;
bootph-all;
};
};
&l4_wkup {
u-boot,dm-pre-reloc;
bootph-all;
};
&scm {
u-boot,dm-pre-reloc;
bootph-all;
};
&am33xx_pinmux {
u-boot,dm-pre-reloc;
bootph-all;
};
&uart0_pins {
u-boot,dm-pre-reloc;
bootph-all;
};
&uart0 {
u-boot,dm-pre-reloc;
bootph-all;
};
&mmc1 {
u-boot,dm-pre-reloc;
bootph-all;
cd-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
};
&emmc_pins {
u-boot,dm-pre-reloc;
bootph-all;
};
&mmc2 {
u-boot,dm-pre-reloc;
bootph-all;
};
&mmc1_pins {
u-boot,dm-pre-reloc;
bootph-all;
};
&mmc3 {

View file

@ -15,16 +15,16 @@
};
ocp {
u-boot,dm-pre-reloc;
bootph-all;
l4_wkup@44c00000 {
u-boot,dm-pre-reloc;
bootph-all;
segment@200000 {
u-boot,dm-pre-reloc;
bootph-all;
target-module@9000 {
u-boot,dm-pre-reloc;
bootph-all;
};
};
};
@ -32,14 +32,14 @@
};
&i2c0 {
u-boot,dm-pre-reloc;
bootph-all;
};
&uart0 {
u-boot,dm-pre-reloc;
bootph-all;
};
&mmc1 {
u-boot,dm-pre-reloc;
bootph-all;
cd-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
};

View file

@ -6,7 +6,7 @@
/ {
ocp {
u-boot,dm-pre-reloc;
bootph-all;
};
};

View file

@ -18,37 +18,37 @@
};
&gpio1 {
/delete-property/ u-boot,dm-spl;
/delete-property/ bootph-pre-ram;
};
&gpio2 {
/delete-property/ u-boot,dm-spl;
/delete-property/ bootph-pre-ram;
};
&gpio3 {
/delete-property/ u-boot,dm-spl;
/delete-property/ bootph-pre-ram;
};
&gpio5 {
/delete-property/ u-boot,dm-spl;
/delete-property/ bootph-pre-ram;
};
&gpio6 {
/delete-property/ u-boot,dm-spl;
/delete-property/ bootph-pre-ram;
};
&mmc2 {
/delete-property/ u-boot,dm-spl;
/delete-property/ bootph-pre-ram;
};
&mmc3 {
/delete-property/ u-boot,dm-spl;
/delete-property/ bootph-pre-ram;
};
&uart1 {
/delete-property/ u-boot,dm-spl;
/delete-property/ bootph-pre-ram;
};
&uart2 {
/delete-property/ u-boot,dm-spl;
/delete-property/ bootph-pre-ram;
};

View file

@ -7,10 +7,10 @@
/{
ocp {
u-boot,dm-pre-reloc;
bootph-all;
};
};
&i2c0 {
u-boot,dm-pre-reloc;
bootph-all;
};

View file

@ -27,41 +27,41 @@
};
&dwc3_1 {
u-boot,dm-spl;
bootph-pre-ram;
};
&usb1 {
u-boot,dm-spl;
bootph-pre-ram;
};
&usb2_phy1 {
u-boot,dm-spl;
bootph-pre-ram;
};
&am43xx_control_usb2phy1 {
u-boot,dm-spl;
bootph-pre-ram;
};
&ocp2scp0 {
u-boot,dm-spl;
bootph-pre-ram;
};
&dwc3_2 {
u-boot,dm-spl;
bootph-pre-ram;
};
&usb2 {
u-boot,dm-spl;
bootph-pre-ram;
};
&usb2_phy2 {
u-boot,dm-spl;
bootph-pre-ram;
};
&am43xx_control_usb2phy2 {
u-boot,dm-spl;
bootph-pre-ram;
};
&ocp2scp1 {
u-boot,dm-spl;
bootph-pre-ram;
};

View file

@ -11,50 +11,50 @@
/{
ocp {
u-boot,dm-spl;
bootph-pre-ram;
};
};
&uart0 {
u-boot,dm-spl;
bootph-pre-ram;
};
&mmc1 {
u-boot,dm-spl;
bootph-pre-ram;
};
&mac {
u-boot,dm-spl;
bootph-pre-ram;
};
&davinci_mdio {
u-boot,dm-spl;
bootph-pre-ram;
};
&cpsw_emac0 {
u-boot,dm-spl;
bootph-pre-ram;
};
&phy_sel {
u-boot,dm-spl;
bootph-pre-ram;
};
&i2c0 {
u-boot,dm-spl;
bootph-pre-ram;
};
&l4_wkup {
u-boot,dm-spl;
bootph-pre-ram;
};
&scm {
u-boot,dm-spl;
bootph-pre-ram;
};
&scm_conf {
u-boot,dm-spl;
bootph-pre-ram;
};
&ethphy0 {
u-boot,dm-spl;
bootph-pre-ram;
};

View file

@ -7,7 +7,7 @@
/{
ocp {
u-boot,dm-spl;
bootph-pre-ram;
};
xtal25mhz: xtal25mhz {
@ -18,11 +18,11 @@
};
&uart0 {
u-boot,dm-spl;
bootph-pre-ram;
};
&i2c0 {
u-boot,dm-spl;
bootph-pre-ram;
cdce913: cdce913@65 {
compatible = "ti,cdce913";
@ -34,5 +34,5 @@
};
&mmc1 {
u-boot,dm-spl;
bootph-pre-ram;
};

View file

@ -7,18 +7,18 @@
/{
ocp {
u-boot,dm-spl;
bootph-pre-ram;
};
};
&uart0 {
u-boot,dm-spl;
bootph-pre-ram;
};
&i2c0 {
u-boot,dm-spl;
bootph-pre-ram;
};
&mmc1 {
u-boot,dm-spl;
bootph-pre-ram;
};

View file

@ -21,15 +21,15 @@
};
&spi0 {
u-boot,dm-pre-reloc;
bootph-all;
spi-flash@0 {
u-boot,dm-pre-reloc;
bootph-all;
};
};
&sdhci0 {
u-boot,dm-pre-reloc;
bootph-all;
};
&eth0 {

View file

@ -21,15 +21,15 @@
};
&spi0 {
u-boot,dm-pre-reloc;
bootph-all;
spi-flash@0 {
u-boot,dm-pre-reloc;
bootph-all;
};
};
&sdhci0 {
u-boot,dm-pre-reloc;
bootph-all;
};
&pinctrl_sb {

View file

@ -1,7 +1,7 @@
// SPDX-License-Identifier: GPL-2.0
&watchdog {
u-boot,dm-pre-reloc;
bootph-all;
};
#include "mvebu-u-boot.dtsi"

View file

@ -12,24 +12,24 @@
};
&i2c0 {
u-boot,dm-pre-reloc;
bootph-all;
i2cmux: i2cmux@70 {
u-boot,dm-pre-reloc;
bootph-all;
i2c@0 {
u-boot,dm-pre-reloc;
bootph-all;
};
i2c@1 {
u-boot,dm-pre-reloc;
bootph-all;
};
i2c@5 {
u-boot,dm-pre-reloc;
bootph-all;
crypto@64 {
u-boot,dm-pre-reloc;
bootph-all;
};
};
};

View file

@ -1,38 +1,39 @@
// SPDX-License-Identifier: GPL-2.0+
&spi1 {
u-boot,dm-spl;
bootph-pre-ram;
spi-flash@0 {
u-boot,dm-spl;
bootph-pre-ram;
};
};
&sdhci {
u-boot,dm-spl;
bootph-pre-ram;
non-removable; /* assume that the card is always present, required for eMMC variant */
};
&gpio0 {
u-boot,dm-spl;
bootph-pre-ram;
};
&ahci0 {
u-boot,dm-spl;
bootph-pre-ram;
};
&ahci1 {
u-boot,dm-spl;
bootph-pre-ram;
};
&i2c0 {
u-boot,dm-spl;
bootph-pre-ram;
eeprom@52 {
u-boot,dm-spl;
bootph-pre-ram;
};
eeprom@53 {
u-boot,dm-spl;
bootph-pre-ram;
};
};

View file

@ -5,41 +5,41 @@
};
&spi1 {
u-boot,dm-spl;
bootph-pre-ram;
spi-flash@0 {
u-boot,dm-spl;
bootph-pre-ram;
};
};
&w25q32 {
u-boot,dm-spl;
bootph-pre-ram;
};
&gpio0 {
u-boot,dm-spl;
bootph-pre-ram;
};
&ahci0 {
u-boot,dm-spl;
bootph-pre-ram;
};
&ahci1 {
u-boot,dm-spl;
bootph-pre-ram;
};
&sdhci {
u-boot,dm-spl;
bootph-pre-ram;
};
&i2c0 {
u-boot,dm-spl;
bootph-pre-ram;
eeprom@52 {
u-boot,dm-spl;
bootph-pre-ram;
};
eeprom@53 {
u-boot,dm-spl;
bootph-pre-ram;
};
};

View file

@ -1,25 +1,25 @@
&gpio0 {
u-boot,dm-pre-reloc;
bootph-all;
};
&gpio1 {
u-boot,dm-pre-reloc;
bootph-all;
};
&uart1 {
u-boot,dm-pre-reloc;
bootph-all;
};
&spi1 {
u-boot,dm-pre-reloc;
bootph-all;
};
&I2C0 {
u-boot,dm-pre-reloc;
bootph-all;
};
&PCA22 {
u-boot,dm-pre-reloc;
bootph-all;
};
#include "mvebu-u-boot.dtsi"

View file

@ -18,7 +18,7 @@
cpu@000 {
clocks;
u-boot,dm-pre-reloc;
bootph-all;
device_type = "cpu";
compatible = "arm,cortex-a72", "arm,armv8";
reg = <0x000>;
@ -26,7 +26,7 @@
};
cpu@001 {
clocks;
u-boot,dm-pre-reloc;
bootph-all;
device_type = "cpu";
compatible = "arm,cortex-a72", "arm,armv8";
reg = <0x001>;
@ -34,7 +34,7 @@
};
cpu@100 {
clocks;
u-boot,dm-pre-reloc;
bootph-all;
device_type = "cpu";
compatible = "arm,cortex-a72", "arm,armv8";
reg = <0x100>;
@ -42,7 +42,7 @@
};
cpu@101 {
clocks;
u-boot,dm-pre-reloc;
bootph-all;
device_type = "cpu";
compatible = "arm,cortex-a72", "arm,armv8";
reg = <0x101>;

View file

@ -1,5 +1,5 @@
&lcd0 {
u-boot,dm-pre-reloc;
bootph-all;
};
#include "mvebu-u-boot.dtsi"

View file

@ -19,7 +19,7 @@
};
&uart5 {
u-boot,dm-pre-reloc;
bootph-all;
status = "okay";
};
@ -28,17 +28,17 @@
};
&wdt1 {
u-boot,dm-pre-reloc;
bootph-all;
status = "okay";
};
&wdt2 {
u-boot,dm-pre-reloc;
bootph-all;
status = "okay";
};
&wdt3 {
u-boot,dm-pre-reloc;
bootph-all;
status = "okay";
};

View file

@ -8,19 +8,19 @@
scu: clock-controller@1e6e2000 {
compatible = "aspeed,ast2500-scu";
reg = <0x1e6e2000 0x1000>;
u-boot,dm-pre-reloc;
bootph-all;
#clock-cells = <1>;
#reset-cells = <1>;
};
rst: reset-controller {
u-boot,dm-pre-reloc;
bootph-all;
compatible = "aspeed,ast2500-reset";
#reset-cells = <1>;
};
sdrammc: sdrammc@1e6e0000 {
u-boot,dm-pre-reloc;
bootph-all;
compatible = "aspeed,ast2500-sdrammc";
reg = <0x1e6e0000 0x174
0x1e6e0200 0x1d4 >;
@ -51,7 +51,7 @@
};
&timer {
u-boot,dm-pre-reloc;
bootph-all;
};
&mac0 {

View file

@ -58,7 +58,7 @@
};
&uart5 {
u-boot,dm-pre-reloc;
bootph-all;
status = "okay";
};
@ -258,11 +258,11 @@
};
&hace {
u-boot,dm-pre-reloc;
bootph-all;
status = "okay";
};
&acry {
u-boot,dm-pre-reloc;
bootph-all;
status = "okay";
};

View file

@ -8,21 +8,21 @@
scu: clock-controller@1e6e2000 {
compatible = "aspeed,ast2600-scu";
reg = <0x1e6e2000 0x1000>;
u-boot,dm-pre-reloc;
bootph-all;
#clock-cells = <1>;
#reset-cells = <1>;
uart-clk-source = <0x0>; /* uart clock source selection: 0: uxclk 1: huxclk*/
};
rst: reset-controller {
u-boot,dm-pre-reloc;
bootph-all;
compatible = "aspeed,ast2600-reset";
aspeed,wdt = <&wdt1>;
#reset-cells = <1>;
};
sdrammc: sdrammc@1e6e0000 {
u-boot,dm-pre-reloc;
bootph-all;
compatible = "aspeed,ast2600-sdrammc";
reg = <0x1e6e0000 0x100
0x1e6e0100 0x300
@ -33,10 +33,10 @@
};
ahb {
u-boot,dm-pre-reloc;
bootph-all;
apb {
u-boot,dm-pre-reloc;
bootph-all;
};
};

View file

@ -10,70 +10,70 @@
/ {
ahb {
u-boot,dm-pre-reloc;
bootph-all;
apb {
u-boot,dm-pre-reloc;
bootph-all;
pinctrl {
u-boot,dm-pre-reloc;
bootph-all;
};
};
};
chosen {
u-boot,dm-pre-reloc;
bootph-all;
};
};
&clk32 {
u-boot,dm-pre-reloc;
bootph-all;
};
&dbgu {
u-boot,dm-pre-reloc;
bootph-all;
};
&main_rc {
u-boot,dm-pre-reloc;
bootph-all;
};
&main_xtal {
u-boot,dm-pre-reloc;
bootph-all;
};
&pinctrl_dbgu {
u-boot,dm-pre-reloc;
bootph-all;
};
&pinctrl_sdhci0 {
u-boot,dm-pre-reloc;
bootph-all;
};
&pioA {
u-boot,dm-pre-reloc;
bootph-all;
};
&pioB {
u-boot,dm-pre-reloc;
bootph-all;
};
&pit64b0 {
u-boot,dm-pre-reloc;
bootph-all;
};
&pmc {
u-boot,dm-pre-reloc;
bootph-all;
};
&sdhci0 {
u-boot,dm-pre-reloc;
bootph-all;
};
&slow_rc_osc {
u-boot,dm-pre-reloc;
bootph-all;
};
&slow_xtal {
u-boot,dm-pre-reloc;
bootph-all;
};

View file

@ -22,7 +22,7 @@
};
chosen {
u-boot,dm-pre-reloc;
bootph-all;
stdout-path = &uart1;
};
@ -32,7 +32,7 @@
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_sdmmc1_default>;
status = "okay";
u-boot,dm-pre-reloc;
bootph-all;
};
apb {
@ -41,7 +41,7 @@
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart1_default>;
status = "okay";
u-boot,dm-pre-reloc;
bootph-all;
};
i2c0: i2c@f8028000 {
@ -65,12 +65,12 @@
pit: timer@f8048030 {
status = "okay";
u-boot,dm-pre-reloc;
bootph-all;
};
sfr: sfr@f8030000 {
status = "okay";
u-boot,dm-pre-reloc;
bootph-all;
};
pioA: pinctrl@fc038000 {
@ -82,14 +82,14 @@
<PIN_PA20__SDMMC1_DAT2>,
<PIN_PA21__SDMMC1_DAT3>;
bias-pull-up;
u-boot,dm-pre-reloc;
bootph-all;
};
ck_cd {
pinmux = <PIN_PA22__SDMMC1_CK>,
<PIN_PA30__SDMMC1_CD>;
bias-disable;
u-boot,dm-pre-reloc;
bootph-all;
};
};
@ -97,7 +97,7 @@
pinmux = <PIN_PD2__URXD1>,
<PIN_PD3__UTXD1>;
bias-disable;
u-boot,dm-pre-reloc;
bootph-all;
};
pinctrl_i2c0_default: i2c0_default {

View file

@ -51,7 +51,7 @@
compatible = "atmel,sama5d27-som1-ek", "atmel,sama5d2", "atmel,sama5";
chosen {
u-boot,dm-pre-reloc;
bootph-all;
stdout-path = &uart1;
};
@ -85,7 +85,7 @@
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_sdmmc0_default>;
status = "okay";
u-boot,dm-pre-reloc;
bootph-all;
};
sdmmc1: sdio-host@b0000000 {
@ -93,7 +93,7 @@
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_sdmmc1_default>;
status = "okay"; /* conflict with qspi0 */
u-boot,dm-pre-reloc;
bootph-all;
};
apb {
@ -103,10 +103,10 @@
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_lcd_base &pinctrl_lcd_pwm &pinctrl_lcd_rgb666>;
status = "okay";
u-boot,dm-pre-reloc;
bootph-all;
display-timings {
u-boot,dm-pre-reloc;
bootph-all;
480x272 {
clock-frequency = <9000000>;
hactive = <480>;
@ -117,7 +117,7 @@
vfront-porch = <2>;
vback-porch = <2>;
vsync-len = <11>;
u-boot,dm-pre-reloc;
bootph-all;
};
};
};
@ -126,7 +126,7 @@
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart1_default>;
status = "okay";
u-boot,dm-pre-reloc;
bootph-all;
};
pioA: pinctrl@fc038000 {
@ -178,7 +178,7 @@
<PIN_PA8__SDMMC0_DAT6>,
<PIN_PA9__SDMMC0_DAT7>;
bias-pull-up;
u-boot,dm-pre-reloc;
bootph-all;
};
ck_cd {
@ -186,7 +186,7 @@
<PIN_PA10__SDMMC0_RSTN>,
<PIN_PA13__SDMMC0_CD>;
bias-disable;
u-boot,dm-pre-reloc;
bootph-all;
};
};
@ -198,14 +198,14 @@
<PIN_PA20__SDMMC1_DAT2>,
<PIN_PA21__SDMMC1_DAT3>;
bias-pull-up;
u-boot,dm-pre-reloc;
bootph-all;
};
ck_cd {
pinmux = <PIN_PA22__SDMMC1_CK>,
<PIN_PA30__SDMMC1_CD>;
bias-disable;
u-boot,dm-pre-reloc;
bootph-all;
};
};
@ -213,7 +213,7 @@
pinmux = <PIN_PD2__URXD1>,
<PIN_PD3__UTXD1>;
bias-disable;
u-boot,dm-pre-reloc;
bootph-all;
};
pinctrl_usb_default: usb_default {

View file

@ -9,42 +9,42 @@
/ {
chosen {
u-boot,dm-pre-reloc;
bootph-all;
};
};
&hlcdc {
u-boot,dm-pre-reloc;
bootph-all;
};
&qspi1 {
u-boot,dm-pre-reloc;
bootph-all;
};
&qspi1_flash {
u-boot,dm-pre-reloc;
bootph-all;
};
&sdmmc0 {
u-boot,dm-pre-reloc;
bootph-all;
};
&uart0 {
u-boot,dm-pre-reloc;
bootph-all;
};
&sfr {
u-boot,dm-pre-reloc;
bootph-all;
};
&pinctrl_sdmmc0_default {
u-boot,dm-pre-reloc;
bootph-all;
};
&pinctrl_uart0_default {
u-boot,dm-pre-reloc;
bootph-all;
};
&pinctrl_qspi1_default {
u-boot,dm-pre-reloc;
bootph-all;
};

View file

@ -9,39 +9,39 @@
/ {
chosen {
u-boot,dm-pre-reloc;
bootph-all;
};
};
&pinctrl_mikrobus1_uart {
u-boot,dm-pre-reloc;
bootph-all;
};
&pinctrl_qspi1_sck_cs_default {
u-boot,dm-pre-reloc;
bootph-all;
};
&pinctrl_qspi1_dat_default {
u-boot,dm-pre-reloc;
bootph-all;
};
&pinctrl_sdmmc0_default {
u-boot,dm-pre-reloc;
bootph-all;
};
&qspi1 {
u-boot,dm-pre-reloc;
bootph-all;
flash@0 {
u-boot,dm-pre-reloc;
bootph-all;
};
};
&sdmmc0 {
u-boot,dm-pre-reloc;
bootph-all;
};
&uart0 { /* mikrobus1 uart */
u-boot,dm-pre-reloc;
bootph-all;
};

View file

@ -52,7 +52,7 @@
compatible = "atmel,sama5d2-ptc_ek", "atmel,sama5d2", "atmel,sama5";
chosen {
u-boot,dm-pre-reloc;
bootph-all;
stdout-path = &uart0;
};
@ -96,7 +96,7 @@
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_sdmmc0_default>;
status = "okay";
u-boot,dm-pre-reloc;
bootph-all;
};
sdmmc1: sdio-host@b0000000 {
@ -104,7 +104,7 @@
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_sdmmc1_default>;
status = "disabled"; /* conflicts with nand and qspi0*/
u-boot,dm-pre-reloc;
bootph-all;
};
apb {
@ -123,7 +123,7 @@
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart0_default>;
status = "okay";
u-boot,dm-pre-reloc;
bootph-all;
};
i2c1: i2c@fc028000 {
@ -175,7 +175,7 @@
<PIN_PA8__SDMMC0_DAT6>,
<PIN_PA9__SDMMC0_DAT7>;
bias-pull-up;
u-boot,dm-pre-reloc;
bootph-all;
};
ck_cd {
@ -184,7 +184,7 @@
<PIN_PA11__SDMMC0_VDDSEL>,
<PIN_PA13__SDMMC0_CD>;
bias-disable;
u-boot,dm-pre-reloc;
bootph-all;
};
};
@ -196,14 +196,14 @@
<PIN_PA20__SDMMC1_DAT2>,
<PIN_PA21__SDMMC1_DAT3>;
bias-pull-up;
u-boot,dm-pre-reloc;
bootph-all;
};
ck_cd {
pinmux = <PIN_PA22__SDMMC1_CK>,
<PIN_PA30__SDMMC1_CD>;
bias-disable;
u-boot,dm-pre-reloc;
bootph-all;
};
};
@ -211,7 +211,7 @@
pinmux = <PIN_PB26__URXD0>,
<PIN_PB27__UTXD0>;
bias-disable;
u-boot,dm-pre-reloc;
bootph-all;
};
pinctrl_usb_default: usb_default {

View file

@ -8,7 +8,7 @@
compatible = "atmel,sama5d2-xplained", "atmel,sama5d2", "atmel,sama5";
chosen {
u-boot,dm-pre-reloc;
bootph-all;
stdout-path = &uart1;
};
@ -46,7 +46,7 @@
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_sdmmc0_default>;
status = "okay";
u-boot,dm-pre-reloc;
bootph-all;
};
sdmmc1: sdio-host@b0000000 {
@ -54,7 +54,7 @@
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_sdmmc1_default>;
status = "okay"; /* conflict with qspi0 */
u-boot,dm-pre-reloc;
bootph-all;
};
apb {
@ -64,10 +64,10 @@
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_lcd_base &pinctrl_lcd_pwm &pinctrl_lcd_rgb666>;
status = "okay";
u-boot,dm-pre-reloc;
bootph-all;
display-timings {
u-boot,dm-pre-reloc;
bootph-all;
480x272 {
clock-frequency = <9000000>;
hactive = <480>;
@ -78,7 +78,7 @@
vfront-porch = <2>;
vback-porch = <2>;
vsync-len = <11>;
u-boot,dm-pre-reloc;
bootph-all;
};
};
};
@ -87,7 +87,7 @@
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_qspi0_sck_cs_default &pinctrl_qspi0_dat_default>;
status = "okay";
u-boot,dm-pre-reloc;
bootph-all;
flash@0 {
compatible = "jedec,spi-nor";
@ -95,7 +95,7 @@
spi-max-frequency = <83000000>;
spi-rx-bus-width = <4>;
spi-tx-bus-width = <4>;
u-boot,dm-pre-reloc;
bootph-all;
};
};
@ -104,13 +104,13 @@
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_spi0_default>;
status = "okay";
u-boot,dm-pre-reloc;
bootph-all;
spi_flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <50000000>;
u-boot,dm-pre-reloc;
bootph-all;
};
};
@ -129,7 +129,7 @@
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart1_default>;
status = "okay";
u-boot,dm-pre-reloc;
bootph-all;
};
i2c1: i2c@fc028000 {
@ -208,7 +208,7 @@
pinmux = <PIN_PA22__QSPI0_SCK>,
<PIN_PA23__QSPI0_CS>;
bias-disable;
u-boot,dm-pre-reloc;
bootph-all;
};
pinctrl_qspi0_dat_default: qspi0_dat_default {
@ -217,7 +217,7 @@
<PIN_PA26__QSPI0_IO2>,
<PIN_PA27__QSPI0_IO3>;
bias-pull-up;
u-boot,dm-pre-reloc;
bootph-all;
};
pinctrl_sdmmc0_default: sdmmc0_default {
@ -232,7 +232,7 @@
<PIN_PA8__SDMMC0_DAT6>,
<PIN_PA9__SDMMC0_DAT7>;
bias-pull-up;
u-boot,dm-pre-reloc;
bootph-all;
};
ck_cd_default {
@ -241,7 +241,7 @@
<PIN_PA11__SDMMC0_VDDSEL>,
<PIN_PA13__SDMMC0_CD>;
bias-disable;
u-boot,dm-pre-reloc;
bootph-all;
};
};
@ -253,14 +253,14 @@
<PIN_PA20__SDMMC1_DAT2>,
<PIN_PA21__SDMMC1_DAT3>;
bias-pull-up;
u-boot,dm-pre-reloc;
bootph-all;
};
ck_cd {
pinmux = <PIN_PA22__SDMMC1_CK>,
<PIN_PA30__SDMMC1_CD>;
bias-disable;
u-boot,dm-pre-reloc;
bootph-all;
};
};
@ -269,14 +269,14 @@
<PIN_PA15__SPI0_MOSI>,
<PIN_PA16__SPI0_MISO>;
bias-disable;
u-boot,dm-pre-reloc;
bootph-all;
};
pinctrl_uart1_default: uart1_default {
pinmux = <PIN_PD2__URXD1>,
<PIN_PD3__UTXD1>;
bias-disable;
u-boot,dm-pre-reloc;
bootph-all;
};
pinctrl_usb_default: usb_default {

View file

@ -14,7 +14,7 @@
compatible = "atmel,sama5d3-xplained", "atmel,sama5d3", "atmel,sama5";
chosen {
u-boot,dm-pre-reloc;
bootph-all;
stdout-path = &dbgu;
};
@ -51,7 +51,7 @@
ahb {
apb {
mmc0: mmc@f0000000 {
u-boot,dm-pre-reloc;
bootph-all;
pinctrl-0 = <&pinctrl_mmc0_clk_cmd_dat0 &pinctrl_mmc0_dat1_3 &pinctrl_mmc0_dat4_7 &pinctrl_mmc0_cd>;
vmmc-supply = <&vcc_mmc0_reg>;
vqmmc-supply = <&vcc_3v3_reg>;
@ -64,7 +64,7 @@
};
mmc1: mmc@f8000000 {
u-boot,dm-pre-reloc;
bootph-all;
vmmc-supply = <&vcc_3v3_reg>;
vqmmc-supply = <&vcc_3v3_reg>;
status = "disabled";
@ -215,13 +215,13 @@
};
dbgu: serial@ffffee00 {
u-boot,dm-pre-reloc;
bootph-all;
status = "okay";
};
pinctrl@fffff200 {
board {
u-boot,dm-pre-reloc;
bootph-all;
pinctrl_i2c0_pu: i2c0_pu {
atmel,pins =
<AT91_PIOA 30 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>,
@ -240,13 +240,13 @@
};
pinctrl_mmc0_cd: mmc0_cd {
u-boot,dm-pre-reloc;
bootph-all;
atmel,pins =
<AT91_PIOE 0 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>;
};
pinctrl_mmc1_cd: mmc1_cd {
u-boot,dm-pre-reloc;
bootph-all;
atmel,pins =
<AT91_PIOE 1 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>;
};

View file

@ -54,7 +54,7 @@
};
chosen {
u-boot,dm-pre-reloc;
bootph-all;
stdout-path = &usart3;
};
@ -92,10 +92,10 @@
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_lcd_base &pinctrl_lcd_pwm &pinctrl_lcd_rgb888>;
status = "okay";
u-boot,dm-pre-reloc;
bootph-all;
display-timings {
u-boot,dm-pre-reloc;
bootph-all;
480x272 {
clock-frequency = <9000000>;
hactive = <480>;
@ -106,17 +106,17 @@
vfront-porch = <2>;
vback-porch = <2>;
vsync-len = <11>;
u-boot,dm-pre-reloc;
bootph-all;
};
};
};
spi0: spi@f8010000 {
u-boot,dm-pre-reloc;
bootph-all;
cs-gpios = <&pioC 3 0>, <0>, <0>, <0>;
status = "okay";
spi_flash@0 {
u-boot,dm-pre-reloc;
bootph-all;
compatible = "jedec,spi-nor";
spi-max-frequency = <50000000>;
reg = <0>;
@ -146,7 +146,7 @@
};
mmc1: mmc@fc000000 {
u-boot,dm-pre-reloc;
bootph-all;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_mmc1_clk_cmd_dat0 &pinctrl_mmc1_dat1_3 &pinctrl_mmc1_cd>;
vmmc-supply = <&vcc_mmc1_reg>;
@ -160,7 +160,7 @@
};
usart3: serial@fc00c000 {
u-boot,dm-pre-reloc;
bootph-all;
status = "okay";
};
@ -193,9 +193,9 @@
pinctrl@fc06a000 {
board {
u-boot,dm-pre-reloc;
bootph-all;
pinctrl_mmc1_cd: mmc1_cd {
u-boot,dm-pre-reloc;
bootph-all;
atmel,pins =
<AT91_PIOE 3 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>;
};

View file

@ -54,7 +54,7 @@
};
chosen {
u-boot,dm-pre-reloc;
bootph-all;
stdout-path = &usart3;
};
@ -82,10 +82,10 @@
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_lcd_base &pinctrl_lcd_pwm &pinctrl_lcd_rgb666>;
status = "okay";
u-boot,dm-pre-reloc;
bootph-all;
display-timings {
u-boot,dm-pre-reloc;
bootph-all;
800x480 {
clock-frequency = <33260000>;
hactive = <800>;
@ -96,7 +96,7 @@
vfront-porch = <23>;
vback-porch = <22>;
vsync-len = <5>;
u-boot,dm-pre-reloc;
bootph-all;
};
};
};
@ -132,11 +132,11 @@
};
spi0: spi@f8010000 {
u-boot,dm-pre-reloc;
bootph-all;
cs-gpios = <&pioC 3 0>, <0>, <0>, <0>;
status = "okay";
spi_flash@0 {
u-boot,dm-pre-reloc;
bootph-all;
compatible = "jedec,spi-nor";
spi-max-frequency = <50000000>;
reg = <0>;
@ -186,7 +186,7 @@
};
mmc1: mmc@fc000000 {
u-boot,dm-pre-reloc;
bootph-all;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_mmc1_clk_cmd_dat0 &pinctrl_mmc1_dat1_3 &pinctrl_mmc1_cd>;
status = "okay";
@ -202,7 +202,7 @@
};
usart3: serial@fc00c000 {
u-boot,dm-pre-reloc;
bootph-all;
status = "okay";
};
@ -216,7 +216,7 @@
pinctrl@fc06a000 {
board {
u-boot,dm-pre-reloc;
bootph-all;
pinctrl_macb0_phy_irq: macb0_phy_irq {
atmel,pins =
<AT91_PIOE 1 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
@ -226,7 +226,7 @@
<AT91_PIOE 5 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>;
};
pinctrl_mmc1_cd: mmc1_cd {
u-boot,dm-pre-reloc;
bootph-all;
atmel,pins =
<AT91_PIOE 6 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>;
};

View file

@ -16,7 +16,7 @@
/ {
chosen {
u-boot,dm-pre-reloc;
bootph-all;
};
utmi {
@ -68,7 +68,7 @@
};
soc {
u-boot,dm-pre-reloc;
bootph-all;
usb2: usb@400000 {
compatible = "microchip,sama7g5-ohci", "usb-ohci";
@ -96,23 +96,23 @@
};
&main_rc {
u-boot,dm-pre-reloc;
bootph-all;
};
&main_xtal {
u-boot,dm-pre-reloc;
bootph-all;
};
&pioA {
u-boot,dm-pre-reloc;
bootph-all;
};
&pinctrl_flx3_default {
u-boot,dm-pre-reloc;
bootph-all;
};
&pioA {
u-boot,dm-pre-reloc;
bootph-all;
pinctrl_usb_default: usb_default {
pinmux = <PIN_PC6__GPIO>;
@ -121,23 +121,23 @@
};
&pit64b0 {
u-boot,dm-pre-reloc;
bootph-all;
};
&pmc {
u-boot,dm-pre-reloc;
bootph-all;
};
&slow_rc_osc {
u-boot,dm-pre-reloc;
bootph-all;
};
&slow_xtal {
u-boot,dm-pre-reloc;
bootph-all;
};
&uart3 {
u-boot,dm-pre-reloc;
bootph-all;
};
&usb2 {

View file

@ -18,7 +18,7 @@
compatible = "atmel,at91sam9260", "atmel,at91sam9";
chosen {
u-boot,dm-pre-reloc;
bootph-all;
stdout-path = &dbgu;
};
@ -49,7 +49,7 @@
};
dbgu: serial@fffff200 {
u-boot,dm-pre-reloc;
bootph-all;
status = "okay";
};

View file

@ -77,14 +77,14 @@
#address-cells = <1>;
#size-cells = <1>;
ranges;
u-boot,dm-pre-reloc;
bootph-all;
apb {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
ranges;
u-boot,dm-pre-reloc;
bootph-all;
aic: interrupt-controller@fffff000 {
#interrupt-cells = <3>;
@ -107,7 +107,7 @@
#address-cells = <1>;
#size-cells = <0>;
#interrupt-cells = <1>;
u-boot,dm-pre-reloc;
bootph-all;
main_osc: main_osc {
compatible = "atmel,at91rm9200-clk-main-osc";
@ -165,7 +165,7 @@
clocks = <&clk32k>, <&main>, <&plla>, <&pllb>;
atmel,clk-output-range = <0 105000000>;
atmel,clk-divisors = <1 2 4 0>;
u-boot,dm-pre-reloc;
bootph-all;
};
usb: usbck {
@ -230,24 +230,24 @@
#address-cells = <1>;
#size-cells = <0>;
clocks = <&mck>;
u-boot,dm-pre-reloc;
bootph-all;
pioA_clk: pioA_clk@2 {
#clock-cells = <0>;
reg = <2>;
u-boot,dm-pre-reloc;
bootph-all;
};
pioB_clk: pioB_clk@3 {
#clock-cells = <0>;
reg = <3>;
u-boot,dm-pre-reloc;
bootph-all;
};
pioC_clk: pioC_clk@4 {
#clock-cells = <0>;
reg = <4>;
u-boot,dm-pre-reloc;
bootph-all;
};
adc_clk: adc_clk@5 {
@ -410,7 +410,7 @@
interrupt-controller;
#interrupt-cells = <2>;
clocks = <&pioA_clk>;
u-boot,dm-pre-reloc;
bootph-all;
};
pioB: gpio@fffff600 {
@ -422,7 +422,7 @@
interrupt-controller;
#interrupt-cells = <2>;
clocks = <&pioB_clk>;
u-boot,dm-pre-reloc;
bootph-all;
};
pioC: gpio@fffff800 {
@ -434,7 +434,7 @@
interrupt-controller;
#interrupt-cells = <2>;
clocks = <&pioC_clk>;
u-boot,dm-pre-reloc;
bootph-all;
};
pinctrl: pinctrl@fffff400 {
@ -453,11 +453,11 @@
0xffffffff 0x7fff3ccf /* pioB */
0xffffffff 0x007fffff /* pioC */
>;
u-boot,dm-pre-reloc;
bootph-all;
/* shared pinctrl settings */
dbgu {
u-boot,dm-pre-reloc;
bootph-all;
pinctrl_dbgu: dbgu-0 {
atmel,pins =
<AT91_PIOB 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB14 periph A */

View file

@ -50,7 +50,7 @@
compatible = "atmel,at91sam9260ek", "atmel,at91sam9260", "atmel,at91sam9";
chosen {
u-boot,dm-pre-reloc;
bootph-all;
stdout-path = &dbgu;
};
@ -124,7 +124,7 @@
};
dbgu: serial@fffff200 {
u-boot,dm-pre-reloc;
bootph-all;
status = "okay";
};

View file

@ -68,7 +68,7 @@
#address-cells = <1>;
#size-cells = <1>;
ranges;
u-boot,dm-pre-reloc;
bootph-all;
usb0: ohci@00500000 {
compatible = "atmel,at91rm9200-ohci", "usb-ohci";
@ -111,7 +111,7 @@
#address-cells = <1>;
#size-cells = <1>;
ranges;
u-boot,dm-pre-reloc;
bootph-all;
tcb0: timer@fffa0000 {
compatible = "atmel,at91rm9200-tcb";
@ -295,7 +295,7 @@
interrupt-controller;
#interrupt-cells = <2>;
clocks = <&pioA_clk>;
u-boot,dm-pre-reloc;
bootph-all;
};
pioB: gpio@fffff600 {
@ -307,7 +307,7 @@
interrupt-controller;
#interrupt-cells = <2>;
clocks = <&pioB_clk>;
u-boot,dm-pre-reloc;
bootph-all;
};
pioC: gpio@fffff800 {
@ -319,7 +319,7 @@
interrupt-controller;
#interrupt-cells = <2>;
clocks = <&pioC_clk>;
u-boot,dm-pre-reloc;
bootph-all;
};
pinctrl@fffff400 {
@ -336,11 +336,11 @@
<0xffffffff 0xfffffff7>, /* pioA */
<0xffffffff 0xfffffff4>, /* pioB */
<0xffffffff 0xffffff07>; /* pioC */
u-boot,dm-pre-reloc;
bootph-all;
/* shared pinctrl settings */
dbgu {
u-boot,dm-pre-reloc;
bootph-all;
pinctrl_dbgu: dbgu-0 {
atmel,pins =
<AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_NONE>,
@ -583,7 +583,7 @@
#address-cells = <1>;
#size-cells = <0>;
#interrupt-cells = <1>;
u-boot,dm-pre-reloc;
bootph-all;
main_osc: main_osc {
compatible = "atmel,at91rm9200-clk-main-osc";
@ -628,7 +628,7 @@
clocks = <&slow_xtal>, <&main>, <&plla>, <&pllb>;
atmel,clk-output-range = <0 94000000>;
atmel,clk-divisors = <1 2 4 0>;
u-boot,dm-pre-reloc;
bootph-all;
};
usb: usbck {
@ -729,24 +729,24 @@
#address-cells = <1>;
#size-cells = <0>;
clocks = <&mck>;
u-boot,dm-pre-reloc;
bootph-all;
pioA_clk: pioA_clk@2 {
#clock-cells = <0>;
reg = <2>;
u-boot,dm-pre-reloc;
bootph-all;
};
pioB_clk: pioB_clk@3 {
#clock-cells = <0>;
reg = <3>;
u-boot,dm-pre-reloc;
bootph-all;
};
pioC_clk: pioC_clk@4 {
#clock-cells = <0>;
reg = <4>;
u-boot,dm-pre-reloc;
bootph-all;
};
usart0_clk: usart0_clk@6 {

View file

@ -75,14 +75,14 @@
#address-cells = <1>;
#size-cells = <1>;
ranges;
u-boot,dm-pre-reloc;
bootph-all;
apb {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
ranges;
u-boot,dm-pre-reloc;
bootph-all;
aic: interrupt-controller@fffff000 {
#interrupt-cells = <3>;
@ -100,7 +100,7 @@
#address-cells = <1>;
#size-cells = <0>;
#interrupt-cells = <1>;
u-boot,dm-pre-reloc;
bootph-all;
main_osc: main_osc {
compatible = "atmel,at91rm9200-clk-main-osc";
@ -146,7 +146,7 @@
clocks = <&slow_xtal>, <&main>, <&plla>, <&pllb>;
atmel,clk-output-range = <0 120000000>;
atmel,clk-divisors = <1 2 4 0>;
u-boot,dm-pre-reloc;
bootph-all;
};
usb: usbck {
@ -235,24 +235,24 @@
#address-cells = <1>;
#size-cells = <0>;
clocks = <&mck>;
u-boot,dm-pre-reloc;
bootph-all;
pioA_clk: pioA_clk@2 {
#clock-cells = <0>;
reg = <2>;
u-boot,dm-pre-reloc;
bootph-all;
};
pioB_clk: pioB_clk@3 {
#clock-cells = <0>;
reg = <3>;
u-boot,dm-pre-reloc;
bootph-all;
};
pioCDE_clk: pioCDE_clk@4 {
#clock-cells = <0>;
reg = <4>;
u-boot,dm-pre-reloc;
bootph-all;
};
usart0_clk: usart0_clk@7 {
@ -730,7 +730,7 @@
interrupt-controller;
#interrupt-cells = <2>;
clocks = <&pioA_clk>;
u-boot,dm-pre-reloc;
bootph-all;
};
pioB: gpio@fffff400 {
@ -742,7 +742,7 @@
interrupt-controller;
#interrupt-cells = <2>;
clocks = <&pioB_clk>;
u-boot,dm-pre-reloc;
bootph-all;
};
pioC: gpio@fffff600 {
@ -754,7 +754,7 @@
interrupt-controller;
#interrupt-cells = <2>;
clocks = <&pioCDE_clk>;
u-boot,dm-pre-reloc;
bootph-all;
};
pioD: gpio@fffff800 {
@ -766,7 +766,7 @@
interrupt-controller;
#interrupt-cells = <2>;
clocks = <&pioCDE_clk>;
u-boot,dm-pre-reloc;
bootph-all;
};
pioE: gpio@fffffa00 {
@ -778,7 +778,7 @@
interrupt-controller;
#interrupt-cells = <2>;
clocks = <&pioCDE_clk>;
u-boot,dm-pre-reloc;
bootph-all;
};
dbgu: serial@ffffee00 {

View file

@ -15,7 +15,7 @@
chosen {
bootargs = "mem=64M root=/dev/mtdblock5 rw rootfstype=ubifs";
stdout-path = "serial0:115200n8";
u-boot,dm-pre-reloc;
bootph-all;
};
memory {
@ -35,7 +35,7 @@
ahb {
apb {
dbgu: serial@ffffee00 {
u-boot,dm-pre-reloc;
bootph-all;
status = "okay";
};

View file

@ -18,7 +18,7 @@
ahb {
apb {
hlcdc: hlcdc@f8038000 {
u-boot,dm-pre-reloc;
bootph-all;
status = "okay";
};
};

View file

@ -18,7 +18,7 @@
compatible = "atmel,at91sam9g20", "atmel,at91sam9";
chosen {
u-boot,dm-pre-reloc;
bootph-all;
stdout-path = &dbgu;
};
@ -58,7 +58,7 @@
};
&pinctrl {
u-boot,dm-pre-reloc;
bootph-all;
board {
pinctrl_pck0_as_mck: pck0_as_mck {
atmel,pins =
@ -114,7 +114,7 @@
};
&watchdog {
u-boot,dm-pre-reloc;
bootph-all;
timeout-sec = <15>;
status = "okay";
};

View file

@ -9,7 +9,7 @@
/ {
chosen {
u-boot,dm-pre-reloc;
bootph-all;
stdout-path = &dbgu;
};
@ -47,7 +47,7 @@
};
dbgu: serial@fffff200 {
u-boot,dm-pre-reloc;
bootph-all;
status = "okay";
};

View file

@ -1,5 +1,5 @@
// SPDX-License-Identifier: GPL-2.0+
&dbgu {
u-boot,dm-pre-reloc;
bootph-all;
};

View file

@ -23,7 +23,7 @@
};
hlcdc: hlcdc@f8038000 {
u-boot,dm-pre-reloc;
bootph-all;
status = "okay";
};
};

View file

@ -17,7 +17,7 @@
compatible = "atmel,at91sam9m10g45ek", "atmel,at91sam9g45", "atmel,at91sam9";
chosen {
u-boot,dm-pre-reloc;
bootph-all;
stdout-path = &dbgu;
};
@ -38,7 +38,7 @@
ahb {
apb {
dbgu: serial@ffffee00 {
u-boot,dm-pre-reloc;
bootph-all;
status = "okay";
};

View file

@ -32,10 +32,10 @@
};
ahb {
u-boot,dm-pre-reloc;
bootph-all;
fb@0x00500000 {
u-boot,dm-pre-reloc;
bootph-all;
status = "okay";
display-timings {
rev1 {

View file

@ -81,14 +81,14 @@
#address-cells = <1>;
#size-cells = <1>;
ranges;
u-boot,dm-pre-reloc;
bootph-all;
apb {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
ranges;
u-boot,dm-pre-reloc;
bootph-all;
aic: interrupt-controller@fffff000 {
#interrupt-cells = <3>;
@ -120,7 +120,7 @@
#address-cells = <1>;
#size-cells = <0>;
#interrupt-cells = <1>;
u-boot,dm-pre-reloc;
bootph-all;
main_osc: main_osc {
compatible = "atmel,at91rm9200-clk-main-osc";
@ -173,7 +173,7 @@
clocks = <&clk32k>, <&main>, <&plladiv>, <&utmi>;
atmel,clk-output-range = <0 133333333>;
atmel,clk-divisors = <1 2 4 3>;
u-boot,dm-pre-reloc;
bootph-all;
};
usb: usbck {
@ -441,7 +441,7 @@
0xfffff800 0x200
0xfffffa00 0x200
>;
u-boot,dm-pre-reloc;
bootph-all;
atmel,mux-mask = <
/* A B */
@ -484,7 +484,7 @@
};
dbgu {
u-boot,dm-pre-reloc;
bootph-all;
pinctrl_dbgu: dbgu-0 {
atmel,pins =
<AT91_PIOB 12 AT91_PERIPH_A AT91_PINCTRL_PULL_UP

View file

@ -17,7 +17,7 @@
chosen {
bootargs = "mem=64M root=/dev/mtdblock1 rw rootfstype=jffs2";
stdout-path = "serial0:115200n8";
u-boot,dm-pre-reloc;
bootph-all;
};
memory {
@ -38,7 +38,7 @@
apb {
dbgu: serial@ffffee00 {
status = "okay";
u-boot,dm-pre-reloc;
bootph-all;
};
usart1: serial@fff90000 {

View file

@ -72,14 +72,14 @@
#address-cells = <1>;
#size-cells = <1>;
ranges;
u-boot,dm-pre-reloc;
bootph-all;
apb {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
ranges;
u-boot,dm-pre-reloc;
bootph-all;
aic: interrupt-controller@fffff000 {
#interrupt-cells = <3>;
@ -104,7 +104,7 @@
#address-cells = <1>;
#size-cells = <0>;
#interrupt-cells = <1>;
u-boot,dm-pre-reloc;
bootph-all;
main_rc_osc: main_rc_osc {
compatible = "atmel,at91sam9x5-clk-main-rc-osc";
@ -171,7 +171,7 @@
atmel,clk-output-range = <0 133333333>;
atmel,clk-divisors = <1 2 4 3>;
atmel,master-clk-have-div3-pres;
u-boot,dm-pre-reloc;
bootph-all;
};
usb: usbck {
@ -247,18 +247,18 @@
#address-cells = <1>;
#size-cells = <0>;
clocks = <&mck>;
u-boot,dm-pre-reloc;
bootph-all;
pioAB_clk: pioAB_clk@2 {
#clock-cells = <0>;
reg = <2>;
u-boot,dm-pre-reloc;
bootph-all;
};
pioCD_clk: pioCD_clk@3 {
#clock-cells = <0>;
reg = <3>;
u-boot,dm-pre-reloc;
bootph-all;
};
fuse_clk: fuse_clk@4 {
@ -505,11 +505,11 @@
0xfdffffff 0x07c00000 0xb83fffff /* pioC */
0x003fffff 0x003f8000 0x00000000 /* pioD */
>;
u-boot,dm-pre-reloc;
bootph-all;
/* shared pinctrl settings */
dbgu {
u-boot,dm-pre-reloc;
bootph-all;
pinctrl_dbgu: dbgu-0 {
atmel,pins =
<AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_PULL_UP
@ -806,7 +806,7 @@
interrupt-controller;
#interrupt-cells = <2>;
clocks = <&pioAB_clk>;
u-boot,dm-pre-reloc;
bootph-all;
};
pioB: gpio@fffff600 {
@ -818,7 +818,7 @@
interrupt-controller;
#interrupt-cells = <2>;
clocks = <&pioAB_clk>;
u-boot,dm-pre-reloc;
bootph-all;
};
pioC: gpio@fffff800 {
@ -830,7 +830,7 @@
interrupt-controller;
#interrupt-cells = <2>;
clocks = <&pioCD_clk>;
u-boot,dm-pre-reloc;
bootph-all;
};
pioD: gpio@fffffa00 {
@ -842,7 +842,7 @@
interrupt-controller;
#interrupt-cells = <2>;
clocks = <&pioCD_clk>;
u-boot,dm-pre-reloc;
bootph-all;
};
dbgu: serial@fffff200 {

View file

@ -16,7 +16,7 @@
chosen {
bootargs = "root=/dev/mtdblock1 rw rootfstype=jffs2";
stdout-path = "serial0:115200n8";
u-boot,dm-pre-reloc;
bootph-all;
};
memory {
@ -36,7 +36,7 @@
ahb {
apb {
dbgu: serial@fffff200 {
u-boot,dm-pre-reloc;
bootph-all;
status = "okay";
};

View file

@ -78,7 +78,7 @@
#address-cells = <1>;
#size-cells = <1>;
ranges;
u-boot,dm-pre-reloc;
bootph-all;
fb0: fb@00500000 {
compatible = "atmel,at91sam9rl-lcdc";
@ -113,7 +113,7 @@
#address-cells = <1>;
#size-cells = <1>;
ranges;
u-boot,dm-pre-reloc;
bootph-all;
tcb0: timer@fffa0000 {
compatible = "atmel,at91rm9200-tcb";
@ -398,7 +398,7 @@
<0xffffffff 0x0000c780>, /* pioB */
<0xffffffff 0xe3ffff0e>, /* pioC */
<0x003fffff 0x0001ff3c>; /* pioD */
u-boot,dm-pre-reloc;
bootph-all;
/* shared pinctrl settings */
adc0 {
@ -440,7 +440,7 @@
};
dbgu {
u-boot,dm-pre-reloc;
bootph-all;
pinctrl_dbgu: dbgu-0 {
atmel,pins =
<AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>,
@ -779,7 +779,7 @@
interrupt-controller;
#interrupt-cells = <2>;
clocks = <&pioA_clk>;
u-boot,dm-pre-reloc;
bootph-all;
};
pioB: gpio@fffff600 {
@ -791,7 +791,7 @@
interrupt-controller;
#interrupt-cells = <2>;
clocks = <&pioB_clk>;
u-boot,dm-pre-reloc;
bootph-all;
};
pioC: gpio@fffff800 {
@ -803,7 +803,7 @@
interrupt-controller;
#interrupt-cells = <2>;
clocks = <&pioC_clk>;
u-boot,dm-pre-reloc;
bootph-all;
};
pioD: gpio@fffffa00 {
@ -815,7 +815,7 @@
interrupt-controller;
#interrupt-cells = <2>;
clocks = <&pioD_clk>;
u-boot,dm-pre-reloc;
bootph-all;
};
pmc: pmc@fffffc00 {
@ -826,7 +826,7 @@
#address-cells = <1>;
#size-cells = <0>;
#interrupt-cells = <1>;
u-boot,dm-pre-reloc;
bootph-all;
main: mainck {
compatible = "atmel,at91rm9200-clk-main";
@ -862,7 +862,7 @@
clocks = <&clk32k>, <&main>, <&plla>, <&utmi>;
atmel,clk-output-range = <0 94000000>;
atmel,clk-divisors = <1 2 4 0>;
u-boot,dm-pre-reloc;
bootph-all;
};
prog: progck {
@ -909,30 +909,30 @@
#address-cells = <1>;
#size-cells = <0>;
clocks = <&mck>;
u-boot,dm-pre-reloc;
bootph-all;
pioA_clk: pioA_clk@2 {
#clock-cells = <0>;
reg = <2>;
u-boot,dm-pre-reloc;
bootph-all;
};
pioB_clk: pioB_clk@3 {
#clock-cells = <0>;
reg = <3>;
u-boot,dm-pre-reloc;
bootph-all;
};
pioC_clk: pioC_clk@4 {
#clock-cells = <0>;
reg = <4>;
u-boot,dm-pre-reloc;
bootph-all;
};
pioD_clk: pioD_clk@5 {
#clock-cells = <0>;
reg = <5>;
u-boot,dm-pre-reloc;
bootph-all;
};
usart0_clk: usart0_clk@6 {

View file

@ -15,7 +15,7 @@
chosen {
bootargs = "rootfstype=ubifs root=ubi0:rootfs ubi.mtd=5 rw";
stdout-path = "serial0:115200n8";
u-boot,dm-pre-reloc;
bootph-all;
};
memory {
@ -162,7 +162,7 @@
};
dbgu: serial@fffff200 {
u-boot,dm-pre-reloc;
bootph-all;
status = "okay";
};

View file

@ -22,7 +22,7 @@
status = "okay";
};
hlcdc: hlcdc@f8038000 {
u-boot,dm-pre-reloc;
bootph-all;
status = "okay";
};
};

View file

@ -81,14 +81,14 @@
#address-cells = <1>;
#size-cells = <1>;
ranges;
u-boot,dm-pre-reloc;
bootph-all;
apb {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
ranges;
u-boot,dm-pre-reloc;
bootph-all;
aic: interrupt-controller@fffff000 {
#interrupt-cells = <3>;
@ -113,7 +113,7 @@
#address-cells = <1>;
#size-cells = <0>;
#interrupt-cells = <1>;
u-boot,dm-pre-reloc;
bootph-all;
main_rc_osc: main_rc_osc {
compatible = "atmel,at91sam9x5-clk-main-rc-osc";
@ -176,7 +176,7 @@
atmel,clk-output-range = <0 133333333>;
atmel,clk-divisors = <1 2 4 3>;
atmel,master-clk-have-div3-pres;
u-boot,dm-pre-reloc;
bootph-all;
};
@ -259,7 +259,7 @@
#address-cells = <1>;
#size-cells = <0>;
clocks = <&mck>;
u-boot,dm-pre-reloc;
bootph-all;
pioAB_clk: pioAB_clk@2 {
@ -466,12 +466,12 @@
0xfffff800 0x200 /* pioC */
0xfffffa00 0x200 /* pioD */
>;
u-boot,dm-pre-reloc;
bootph-all;
/* shared pinctrl settings */
dbgu {
u-boot,dm-pre-reloc;
bootph-all;
pinctrl_dbgu: dbgu-0 {
atmel,pins =
<AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_PULL_UP

View file

@ -31,7 +31,7 @@
pinctrl-0 = <&pinctrl_lcd_base &pinctrl_lcd_pwm &pinctrl_lcd_rgb888>;
display-timings {
u-boot,dm-pre-reloc;
bootph-all;
800x480 {
clock-frequency = <24000000>;
hactive = <800>;
@ -42,7 +42,7 @@
vfront-porch = <22>;
vback-porch = <21>;
vsync-len = <2>;
u-boot,dm-pre-reloc;
bootph-all;
};
};
};

View file

@ -15,7 +15,7 @@
chosen {
bootargs = "root=/dev/mtdblock1 rw rootfstype=ubifs ubi.mtd=1 root=ubi0:rootfs";
stdout-path = "serial0:115200n8";
u-boot,dm-pre-reloc;
bootph-all;
};
ahb {
@ -47,7 +47,7 @@
};
dbgu: serial@fffff200 {
u-boot,dm-pre-reloc;
bootph-all;
status = "okay";
};

View file

@ -27,22 +27,22 @@
&uart0 {
skip-init;
u-boot,dm-pre-reloc;
bootph-all;
};
&uart1 {
skip-init;
u-boot,dm-pre-reloc;
bootph-all;
};
&gpio {
u-boot,dm-pre-reloc;
bootph-all;
};
&uart0_gpio14 {
u-boot,dm-pre-reloc;
bootph-all;
};
&uart1_gpio14 {
u-boot,dm-pre-reloc;
bootph-all;
};

View file

@ -74,7 +74,7 @@
};
clocks {
u-boot,dm-pre-reloc;
bootph-all;
periph_clk: periph-clk {
compatible = "fixed-clock";
#clock-cells = <0>;
@ -134,7 +134,7 @@
#address-cells = <1>;
#size-cells = <1>;
ranges = <0x0 0x0 0xff800000 0x800000>;
u-boot,dm-pre-reloc;
bootph-all;
uart0: serial@12000 {
compatible = "arm,pl011", "arm,primecell";

View file

@ -65,7 +65,7 @@
};
clocks: clocks {
u-boot,dm-pre-reloc;
bootph-all;
periph_clk: periph-clk {
compatible = "fixed-clock";
@ -126,7 +126,7 @@
#address-cells = <1>;
#size-cells = <1>;
ranges = <0 0xff800000 0x800000>;
u-boot,dm-pre-reloc;
bootph-all;
uart0: serial@12000 {
compatible = "arm,pl011", "arm,primecell";

View file

@ -55,7 +55,7 @@
};
clocks: clocks {
u-boot,dm-pre-reloc;
bootph-all;
periph_clk:periph-clk {
compatible = "fixed-clock";
@ -109,7 +109,7 @@
#address-cells = <1>;
#size-cells = <1>;
ranges = <0x0 0x0 0xff800000 0x800000>;
u-boot,dm-pre-reloc;
bootph-all;
uart0: serial@640 {
compatible = "brcm,bcm6345-uart";

View file

@ -74,7 +74,7 @@
};
clocks {
u-boot,dm-pre-reloc;
bootph-all;
periph_clk: periph_clk {
compatible = "fixed-clock";
@ -128,7 +128,7 @@
#address-cells = <1>;
#size-cells = <1>;
ranges = <0x0 0x0 0xff800000 0x800000>;
u-boot,dm-pre-reloc;
bootph-all;
uart0: serial@640 {
compatible = "brcm,bcm6345-uart";

View file

@ -28,7 +28,7 @@
};
&uart0 {
u-boot,dm-pre-reloc;
bootph-all;
status = "okay";
};

View file

@ -26,7 +26,7 @@
};
&uart0 {
u-boot,dm-pre-reloc;
bootph-all;
status = "okay";
};

View file

@ -26,7 +26,7 @@
};
&uart0 {
u-boot,dm-pre-reloc;
bootph-all;
status = "okay";
};

View file

@ -70,13 +70,13 @@
};
&sdhci0 {
u-boot,dm-pre-reloc;
bootph-all;
status = "okay";
disable-wp;
};
&uart1 {
u-boot,dm-pre-reloc;
bootph-all;
status = "okay";
};

Some files were not shown because too many files have changed in this diff Show more