This patch fixes MDIO clock setup in case when OPB frequency is 100MHz.
Current code assumes that the value of sysinfo.freqOPB is 100000000
when OPB frequency is 100MHz. In reality it is 100000001. As a result
MDIO clock is set to incorrect value, larger than 2.5MHz, thus violating
the standard. This in not a problem on boards equipped with Marvell PHYs
(e.g. Canyonlands), since those PHYs support MDIO clocks up to 8.3MHz,
but can be a problem for other PHYs (e.g. Realtek ones).
Signed-off-by: Felix Radensky <felix@embedded-sol.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
When PCI device use system memory, some PCI host controller should be
set physical memory address.
Signed-off-by: Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
eth_halt() function in the smc911x drivers used to call the
smc911x_reset() function. eth_halt() used to be called after
tftp transfers. This used to put the ethernet chip in reset
while the linux boots up resulting in the ethernet driver
not coming up. NFS boot used to fail as a result.
This patch calls smc911x_shutdown() instead of smc911x_reset().
Some comments received has also been fixed.
Signed-off-by: Manikandan Pillai <mani.pillai@ti.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Some boards do not have SROM support for the DM9000 network adapter.
Instead of listing these board names in the driver code, make this
option configurable from the board config file.
It also removes a build warning for the at91sam9261ek board:
'dm9000x.c:545: warning: 'read_srom_word' defined but not used'
And it repaires the trizepsiv board build which was broken around the
same routines
Signed-off-by: Remy Bohmer <linux@bohmer.net>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
If the MAX address is given by the environment, write it back to the
hardware.
Signed-off-by: Daniel Mack <daniel@caiaq.de>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Several boards used different ways to specify the size of the
protected area when enabling flash write protection for the sectors
holding the environment variables: some used CONFIG_ENV_SIZE and
CONFIG_ENV_SIZE_REDUND, some used CONFIG_ENV_SECT_SIZE, and some even
a mix of both for the "normal" and the "redundant" areas.
Normally, this makes no difference at all. However, things are
different when you have to deal with boards that can come with
different types of flash chips, which may have different sector
sizes.
Here we may have to chose CONFIG_ENV_SECT_SIZE such that it fits the
biggest sector size, which may include several sectors on boards using
the smaller sector flash types. In such a case, using CONFIG_ENV_SIZE
or CONFIG_ENV_SIZE_REDUND to enable the protection may lead to the
case that only the first of these sectors get protected, while the
following ones aren't.
This is no real problem, but it can be confusing for the user -
especially on boards that use CONFIG_ENV_SECT_SIZE to protect the
"normal" areas, while using CONFIG_ENV_SIZE_REDUND for the
"redundant" area.
To avoid such inconsistencies, I changed all sucn boards that I found
to consistently use CONFIG_ENV_SECT_SIZE for protection. This should
not cause any functional changes to the code.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Paul Ruhland
Cc: Pantelis Antoniou <panto@intracom.gr>
Cc: Stefan Roese <sr@denx.de>
Cc: Gary Jennejohn <garyj@denx.de>
Cc: Dave Ellis <DGE@sixnetio.com>
Acked-by: Stefan Roese <sr@denx.de>
Return value of mmc_send_if_cond() can be safely ignored (as it is
done in Linux). This makes older cards work with MXC MCI controller.
Signed-off-by: Ilya Yanok <yanok@emcraft.com>
This patch now enabled this cfi-mtd wrapper to correctly detect and
erase the last sector in an NOR FLASH device.
Signed-off-by: Stefan Roese <sr@denx.de>
SCR & switch data are read from card as big-endian words and should be
converted to CPU byte order.
Signed-off-by: Yauhen Kharuzhy <jekhor@gmail.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
Cards which are not compatible with SD 2.0 standard, may return response
for CMD8 command, but it will be invalid in terms of SD 2.0. We should
accept this case as admissible, just like Linux does.
Signed-off-by: Yauhen Kharuzhy <jekhor@gmail.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
The mmc code defines the response as an array of chars. However, it
access the response bytes both as (i) an array of four uints (with
casts) and (ii) as individual chars. The former case is used more
often, including by the driver when it assigns the response.
The char-wise accesses are broken on little endian systems because they
assume that the bytes in the uints are in big endian byte order.
This patch fixes this by changing the response to be an array of four
uints and replacing the char-wise accesses with equivalent uint-wise
accesses.
Signed-off-by: Rabin Vincent <rabin@rab.in>
The generic MMC core uses direct long long divisions, which do not build
with ARM EABI toolchains. Use lldiv() instead, which works everywhere.
Signed-off-by: Rabin Vincent <rabin@rab.in>
find_mmc_device returns NULL if an invalid device number is specified.
Check for this to avoid dereferencing NULL pointers.
Signed-off-by: Rabin Vincent <rabin@rab.in>
This patch enables Smart Media (SMC) ECC byte ordering which is used
on the PPC4xx NAND FLASH controller (NDFC). Without this patch we have
incompatible ECC byte ordering to the Linux kernel NDFC driver.
Signed-off-by: Stefan Roese <sr@denx.de>
Acked-by: Scott Wood <scottwood@freescale.com>
With this patch non-uniform NOR FLASH chips (chips with multiple erase
regions) can be exported via the cfi-mtd layer and therefor used by UBI.
We select the largest sector size as erasesize. The cfi driver will make
sure that the smaller sectors are handled correctly.
Signed-off-by: Stefan Roese <sr@denx.de>
Fix bug in drawing long version/info strings:
U-Boot version string like
"U-Boot 2009.03-05647-g7c51e06 (Apr 23 2009 - 12:40:00) MPC83XX"
is long and doesn't wrap around correctly while drawing
beside the logo. Such long strings partially overwrite
the logo. This patch is an attempt to fix it.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
With this patch the NAND and OneNAND devices are registered in the MTD
subsystem and can then be referenced by the mtdcore code (e.g.
get_mtd_device_nm()). This is needed for the new "ubi part" command
syntax without the flash type parameter (nor|nand|onenand).
Signed-off-by: Stefan Roese <sr@denx.de>
This patch removes this compilation warning when CONFIG_MTD_PARTITIONS is
defined:
nand_base.c: In function 'nand_release':
nand_base.c:2922: warning: implicit declaration of function 'del_mtd_partitions'
Signed-off-by: Stefan Roese <sr@denx.de>
As the common code also handles baudrate switching, which the board
specific vct.c driver did not support, this is one of the rare
occassions where deleting code actually adds a feature :)
Signed-off-by: Detlev Zundel <dzu@denx.de>
Acked-by: Stefan Roese <sr@denx.de>
Acked-by: Shinya Kuribayashi <shinya.kuribayashi@necel.com>
__attribute__ follows gcc's documented syntax and is generally more
common than __attribute. This change is only asthetic and should not
affect functionality.
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Make the U-Boot dm9000 driver read addresses from EEPROM just
like Linux does ... read six bytes, instead of reading twelve
bytes and then discarding every other one.
Using the right Ethernet address is a big win.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Ben Warren <biggerbadderben@gmail.com>
Fix the problem that cannot access actual data when CPU data cache enabled.
Signed-off-by: Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
Tested-by: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
Acked-by: Ben Warren <biggerbadderben@gmail.com>
Fix dependency goofage: it should certainly be possible to have the
partition support without bringing in UBI commands.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Acked-by: Stefan Roese <sr@denx.de>
We need to make sure the data written to the nand flash controller makes
it there before we start polling its status register. Otherwise, we may
get stale data and return before the controller is actually ready.
Signed-off-by: Graf Yang <graf.yang@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Acked-by: Scott Wood <scottwood@freescale.com>
This Patch adds Support for PXA27X UDC.
(Rebased to drivers/usb reorganisation)
Signed-off-by: Vivek Kutal <vivek.kutal@azingo.com>
Signed-off-by: Remy Bohmer <linux@bohmer.net>
move to linux usb driver organisation
as following
drivers/usb/gadget
drivers/usb/host
drivers/usb/musb
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Remy Bohmer <linux@bohmer.net>
Blackfin SPI driver was not driving the SPI chip-select high before
putting the chip-select signals into tri-state mode. This is probably
something that slipped by unnoticed in most designs. If the signals are
put directly into a tri-state mode, then the board is relying on the
pull-up resistors to pull up the chip-select before the next transaction.
Most of the time this is fine, except when you have two transactions that
follow each other very closely, such as the flash erase and read status
register commands. In this case I was seeing a 500ns separation between
the transactions. In my setup, with a 10kOhm pull-up, it would meet
timing spec about half the time and resulted in intermittent errors. (A
stronger pull up would fix this, but our design is targeted for low power
consumption and a 3.3kOhm @ 3.3v is 3.3mW of needless power consumption.)
I modified the spi_cs_deactivate() function in bfin_spi.c to drive the
chip-selects high before putting them into tri-state. For me, this
resulted in a rise time of 5ns instead of the previous rise time of about
1us, and fully satisfied the timing spec of the chip.
Signed-off-by: Todor I Mollov <tmollov@ucsd.edu>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
On platforms with multiple NOR chips, currently only the first one
can be selected using the "ubi part" command. This patch fixes this
problem by using different names for the NOR "mtd devices".
It also changes the name of the NOR MTD device from "cfi-mtd" to
"norX" (X indexing the device numer) to better match the mtdparts
defaults.
Signed-off-by: Stefan Roese <sr@denx.de>
Signed-off-by: Andreas Huber <andreas.huber@keymile.com>
introduce serial_exit for this purpose. Use it only when the rm9200
serial driver is active
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
The AT91RM9200-EK Evaluation Board supports the AT91RM9200
ARM9-based 32-bit RISC microcontroller and enables real-time code development
and evaluation.
Here is the chip page on Atmel website:
http://www.atmel.com/dyn/products/tools_card.asp?tool_id=3507
with
- NOR (cfi driver)
- DataFlash
- USB OHCI
- Net
- I2C (hard)
Signed-off-by: Ulf Samuelsson <ulf@atmel.com>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
In set_ddr_laws() when we determined how much of the size requested
to be mapped was covered by the the first LAW we needed to recalculate
the size based on what was actually mapped.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Rename the pci header for FSL HW so we can move some prototypes
in there and stop doing explicit externs
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Mflash is fusion memory device mainly targeted consumer eletronic and
mobile phone.
Internally, it have nand flash and other hardware logics and supports
some different operation (ATA, IO, XIP) modes.
IO mode is custom mode for the host that doesn't have IDE interface.
(Many mobile targeted SoC doesn't have IDE bus)
This driver support mflash IO mode.
Followings are brief descriptions about IO mode.
1. IO mode based on ATA protocol and uses some custom command. (read
confirm, write confirm)
2. IO mode uses SRAM bus interface.
Signed-off-by: unsik Kim <donari75@gmail.com>
Fix problems introduced in commit
7b5611cdd1 [inka4x0: Add hardware
diagnosis functions for inka4x0] which redefined MSR_RI which is
already used on PowerPC systems.
Also eliminate redundant definitions in ps2mult.h. More cleanup will
be needed for other redundant occurrences though.
Signed-off-by: Detlev Zundel <dzu@denx.de>
Legacy NAND is marked for feature removal after April 2009 (i.e. this
upcoming release). There are still several boards that reference it
(though many do so only for disk-on-chip support which has been silently
disabled for a while now). These boards will now fail to build
with #error, though the code is still there if the user removes #error.
The plan is to remove the code outright in the next release, along with
any board code that refers to it (such as board/esd/common/auto_update.c).
Also, remove the legacy NAND API description from README.nand.
Signed-off-by: Scott Wood <scottwood@freescale.com>
I can't find anywhere in the datasheet that says the status register needs
3 dummy bytes sent to it before being able to read back the first real
result. Tests on a Blackfin board show that after writing the opcode, the
status register starts coming back immediately. So only write out the
read status register opcode before polling the result.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
CC: Jason McMullan <mcmullan@netapp.com>
CC: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
Since timeouts are only hit when there is a problem in the system, we
don't want to prematurely timeout on a functioning setup. Thus having
low timeouts (in milliseconds) doesn't gain us anything in the production
case, but rather increases likely hood of causing problems where none
otherwise exist.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
CC: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
Some SPI flash drivers like to have extended id information available
(like the spansion flash), so rather than making it re-issue the ID cmd
to get at the last 2 bytes, have the common code read 5 bytes rather than
just 3. This also matches the Linux behavior where it always reads 5 id
bytes from all flashes.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Acked-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
CC: Mingkai Hu <Mingkai.hu@freescale.com>
The common SPI flash code reads the idcode and passes it down to the SPI
flash driver, so there is no need to read it again ourselves.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Acked-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
CC: Jason McMullan <mcmullan@netapp.com>
CC: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
Add MTD SPI Flash support for S25FL008A, S25FL016A,
S25FL032A, S25FL064A, S25FL128P.
Signed-off-by: Mingkai Hu <Mingkai.hu@freescale.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
The Blackfin SDH controller is still using the legacy framework, so update
the driver to use the renamed functions.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
This patch fix the compiler/linker errors
common/cmd_i2c.c:1252: undefined reference to `i2c_get_bus_speed'
common/cmd_i2c.c:1256: undefined reference to `i2c_set_bus_speed'
if board use CONFIG_I2C_CMD_TREE and CONFIG_I2C_MULTI_BUS is not
uesd/undef (wrong define order)
and
removes additional empty lines
Signed-off-by: Jens Scharsig <esw@bus-elektronik.de>
There is a workaround for MPC8569 CPU Errata, which needs to set Bit 13 of
LBCR in 4K bootpage. We setup a temp TLB for eLBC controller in bootpage,
then invalidate it after LBCR bit 13 is set.
Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
For the silicon which doesn't have ROM support in QE, it always needs to load
a pre-built ucode binary to IRAM so that QE can work.
Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
Signed-off-by: Hillel Avni <Hillel.Avni@freescale.com>
cs8900.c: In function 'eth_init':
cs8900.c:164: warning: passing argument 2 of 'eth_getenv_enetaddr' from incompatible pointer type
cs8900.c:165: error: invalid operands to binary <<
cs8900.c:166: error: invalid operands to binary <<
cs8900.c:167: error: invalid operands to binary <<
Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
The NAND flash on the TQM8548_BE modules requires a short delay after
running the UPM pattern like the MPC8360ERDK board does. The TQM8548_BE
requires a further short delay after writing out a buffer. Normally the
R/B pin should be checked, but it's not connected on the TQM8548_BE.
The corresponding Linux FSL UPM driver uses similar delay points at the
same locations. To manage these extra delays in a more general way, I
introduced the "wait_flags" field allowing the board-specific driver to
specify various types of extra delay.
Signed-off-by: Wolfgang Grandegger <wg@grandegger.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
For the NAND chips on the TQM8548 modules, a special chip-select logic is
used. It uses dedicated address lines to be set via UPM machine address
register (mar). This patch adds such support to the FSL-UPM driver.
Signed-off-by: Wolfgang Grandegger <wg@grandegger.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
This patch adds support for multi-chip NAND devices to the FSL-UPM
driver. The "dev_ready" callback of the "struct fsl_upm_nand" is now
called with the argument "chip_nr" to allow testing the proper chip
select line. The NAND support of the MPC8360ERDK is updated as well.
No other boards are currently using the FSL UPM driver.
Signed-off-by: Wolfgang Grandegger <wg@grandegger.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
This patch adds support for NAND_MAX_CHIPS to the MTD NAND layer.
Multi-chips devices are displayed as shown:
Device 0: 2x NAND 512MiB 3,3V 8-bit, sector size 128 KiB
Signed-off-by: Wolfgang Grandegger <wg@grandegger.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
Since the PORTJ on the BF537 is peripheral-only (no GPIO functionality),
then there is no PORTJ_FER register for us to worry about.
Signed-off-by: Sonic Zhang <Sonic.Zhang@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
On the pcm030 the environment is located in the onboard EEPROM. But we want
to handle flash sector protection in a safe manner. So we must read the
unlock environment variable from EEPROM instead from flash.
This patch is required as long the evironment is saved into the EEPROM.
Stefan: Additional change as suggested by Wolfgang, use bigger char array
(instead of 4).
Signed-off-by: Eric Schumann <E.Schumann@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Acked-by: Wolfgang Denk <wd@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
AT91sam9g20 is an evolution of the at91sam9260 with a faster clock speed.
The AT91SAM9G20-EK board is an updated revision of the AT91SAM9260-EK board.
It is essentially the same, with a few minor differences.
Here is the chip page on Atmel website:
http://www.atmel.com/dyn/products/product_card.asp?part_id=4337
Signed-off-by: Justin Waters <justin.waters@timesys.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
The environment is the canonical storage location of the mac address, so
we're killing off the global data location and moving everything to
querying the env directly.
Also, do not bother checking the EEPROM if the env is setup. This
simplifies the code greatly.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Wolfgang Dnek <wd@denx.de>
CC: Ben Warren <biggerbadderben@gmail.com>
CC: Rolf Offermanns <rof@sysgo.de>
CC: Erik Stahlman <erik@vt.edu>
CC: Daris A Nevil <dnevil@snmc.com>
CC: Sascha Hauer <s.hauer@pengutronix.de>
The environment is the canonical storage location of the mac address, so
we're killing off the global data location and moving everything to
querying the env directly.
The sh_eth driver can also be simplified a bit by using enetaddr member of
the eth_device structure.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
CC: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
CC: Carlos Munoz <carlos@kenati.com>
CC: Ben Warren <biggerbadderben@gmail.com>
The environment is the canonical storage location of the mac address, so
we're killing off the global data location and moving everything to
querying the env directly.
The cs8900 driver also changes slightly in that the hardware is not
consulted if the mac address in the env is sane.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
CC: Marius Groeger <mgroeger@sysgo.de>
CC: Ben Warren <biggerbadderben@gmail.com>
The environment is the canonical storage location of the mac address, so
we're killing off the global data location and moving everything to
querying the env directly.
Since the address is in the PLM_DEVICE_BLOCK structure already, there is
no need to pass the NodeAddress as a second parameter. So drop the second
argument to the LM_SetMacAddress() function (and update the tigon3 driver
accordingly).
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
CC: Ben Warren <biggerbadderben@gmail.com>
The environment is the canonical storage location of the mac address, so
we're killing off the global data location and moving everything to
querying the env directly.
The drivers that get converted here:
3c589
4xx_enet
dc2114x
dm9000x
enc28j60
fsl_mcdmafec
ks8695eth
mcffec
rtl8019
rtl8169
s3c4510b_eth
xilinx_emac
xilinx_emaclite
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
CC: Ben Warren <biggerbadderben@gmail.com>
CC: Rolf Offermanns <rof@sysgo.de>
CC: Stefan Roese <sr@denx.de>
CC: Sascha Hauer <saschahauer@web.de>
CC: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
CC: Greg Ungerer <greg.ungerer@opengear.com>
CC: Xue Ligong <lgxue@hotmail.com>
CC: Masami Komiya <mkomiya@sonare.it>
CC: Curt Brune <curt@cucy.com>
CC: Michal SIMEK <monstr@monstr.eu>
Since the on-chip MAC does not have an eeprom or similar interface, force
all Blackfin boards that use this driver to setup the board data with a
proper MAC.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
CC: Ben Warren <biggerbadderben@gmail.com>
sh_eth_reset is function to reset Ether IP.
The MAC address is stored in IP, but it is initialized by this function.
OS (e.g. Linux Kernel) can not use this device when initialized.
This revises this problem.
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
Follow up to the flash_fixup_stm to fix geometry reversal
on STMicro M29W320ET flash chip. The M29W320DT has 4 erase region.
Signed-off-by: Richard Retanubun <RichardRetanubun@RuggedCom.com>
Signed-off-by: Stefan Roese <sr@denx.de>
This patch adds support for the kmsupx4 board from Keymile,
based on a Freescale MPC852T CPU
- serial console on SMC1
- 32 MB SDRAM
- 32 MB NOR Flash
- Ethernet over SCC3
- I2C Bitbang
Signed-off-by: Heiko Schocher <hs@denx.de>
Some register value was hardcoded for System memory size 128MB and
memory offset 0x08000000. This patch fixed the problem.
Signed-off-by: Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
It is necessary for some pci device driver.
Signed-off-by: Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Commit af1c2b84 added a generic phy support, with an ID of zero
and a 32 bit mask; meaning that it will match on any PHY ID.
The problem is that there is a test that checked if a matching
PHY was found, and if not, it printed the non-matching ID.
But since there will always be a match (on the generic PHY,
worst case), this test will never trip.
In the case of a misconfigured PHY address, or of a PHY that
isn't explicitly supported outside of the generic support,
you will never see the ID of 0xffffffff, or the ID of the
real (but unsupported) chip. It will silently fall through
onto the generic support.
This change makes that test useful again, and ensures that
the selection of generic PHY support doesn't happen without
some sort of notice. It also makes it explicitly clear that
the generic PHY must be last in the PHY table.
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Acked-by: Andy Fleming <afleming@freescale.com>
This patch adds I2C mux support for the fsl_i2c driver. This
allows you to add "new" i2c busses, which are reached over
i2c muxes. For more infos, please look in the README and
search for CONFIG_I2C_MUX.
Signed-off-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
The smc911x driver has a lot of useful defines/functions which can be used
by pieces of code (such as example eeprom programmers). Rather than
forcing each place to duplicate these defines/functions, split them out
of the smdc911x driver into a local header.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Acked-by: Ben Warren <biggerbadderben@gmail.com>
CC: Sascha Hauer <s.hauer@pengutronix.de>
CC: Guennadi Liakhovetski <lg@denx.de>
CC: Magnus Lilja <lilja.magnus@gmail.com>
CC: Ben Warren <biggerbadderben@gmail.com>
Add a driver for the Synchronous Display Controller and the Display
Interface on i.MX31, using IPU for DMA channel setup. So far only
displaying of bitmaps is supported, no text output.
Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
Acked-by: Anatolij Gustschin <agust@denx.de>
This is a driver for the S6E63D6 SPI OLED display controller from Samsung.
It only provides access to controller's registers so the client can freely
configure it.
Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
Acked-by: Anatolij Gustschin <agust@denx.de>
Some SPI devices have special requirements on chip-select handling.
With this patch we can use a GPIO as a chip-select and strictly follow
the SPI_XFER_BEGIN and SPI_XFER_END flags.
Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
This is a minimal driver, so far only managing output. It will
be used by the mxc_spi.c driver.
Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Fix setting the SPI Control register, 8 and 16-bit transfers
and a wrong pointer in the free routine in the mxc_spi driver.
Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
This is just a handy routine that reports last PCI busno: we walk
down all the hoses and return last hose's last_busno.
Will be used by PCI/PCIe initialization code.
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Added the struct containing PHY settings for the Vitesse VSC8211 phy to
the phy_info list in tsec.c
Signed-off-by: Pieter Henning <phenning@vastech.co.za>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Serial driver via the EmbeddedICE macrocell's DCC channel using
co-processor 14.
It does include a timeout to ensure that the system does not
totally freeze when there is nothing connected to read.
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
This driver implements the ECC algorithm described in
the CPU data sheet and uses the OOB layout chosen in
already-released development systems (shipped with a custom-made
u-boot 1.3.1).
Signed-off-by: Alessandro Rubini <rubini@unipv.it>
Acked-by: Andrea Gallo <andrea.gallo@stnwireless.com>
Fix the problem that cannot use external hub, because this driver
did not control correctly a DEVADDx register.
Signed-off-by: Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
Signed-off-by: Remy Bohmer <linux@bohmer.net>
This patch does some minor fixing of the Xilinx Spartan III
FPGA boot code:
- Fixed call order of post configuration callback and
success message printing (result of copy-paste?)
- remove obsolete comment
- minor coding style cleanup
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
This patch does some minor fixing of the Xilinx Spartan II
FPGA boot code:
- Fixed call order of post configuration callback and
success message printing (result of copy-paste?)
- relocate post configuration callback only when it
is implemented
- remove obsolete comment
- minor coding style cleanup
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
These names are being taken over by the new MMC framework. Hopefuly
the PXA can be easily ported, and these functions will go away entirely.
Signed-off-by: Andy Fleming <afleming@freescale.com>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
omap3_mmc.c was changed to define mmc_legacy_init.
Remove unused functions.
Compile tested on all arm
Runtime tested on Zoom1.
Signed-off-by: Tom Rix <Tom.Rix@windriver.com>
judging from other printfs in the same file, it seems ata should be
postpended with the interface number, not the address of the global
port variable. Fixes this for current u-boot-mpc83xx tree:
Configuring for MPC8349ITX board...
sata_sil3114.c: In function 'sata_bus_softreset':
sata_sil3114.c:99: warning: format '%u' expects type 'unsigned int', but argument 2 has type 'struct sata_port *'
sata_sil3114.c:108: warning: format '%u' expects type 'unsigned int', but argument 2 has type 'struct sata_port *'
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
This patch will create a configuration option for a minimum configuration for
the ns16550 serial driver at drivers/serial/ns16550.c and will apply this new
configuration option to the SIMPC8313.h config file in order to fix the NAND
bootstrap build error. This option will exclude all functions with exception of
NS16550_putc and NS16550_init. This will be used primarily to save space and
remove unused code from builds in which space is limited.
Signed-off-by: Ron Madrid <ron_madrid@sbcglobal.net>
Move the CONFIG_8xx mpc8xx_pcmcia.c protection out of the C file and
into the Makefile so we avoid pointless compiling of the file.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Here's a new framework (based roughly off the linux one) for managing
MMC controllers. It handles all of the standard SD/MMC transactions,
leaving the host drivers to implement only what is necessary to
deal with their specific hardware.
This also hooks the infrastructure into the PowerPC board code
(similar to how the ethernet infrastructure now hooks in)
Some of this code was contributed by Dave Liu <daveliu@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
Added various p2020 processor specific details:
* SVR for p2020, p2020E
* immap updates for LAWs and DDR on p2020
* LAW defines related to p2020
Signed-off-by: Srikanth Srinivasan <srikanth.srinivasan@freescale.com>
Signed-off-by: Travis Wheatley <Travis.Wheatley@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
V3: Fixed line-wrap problem due to user error in mail!
Added usb_configured() checks in usbtty_puts() and usbtty_putc() to get around a hang
when usb is not connected and the user has set up multi-io (setenv stdout serial,usbtty etc).
Got rid of redundant __attribute__((packed)) directives that were causing warnings from gcc.
Signed-off-by: Atin Malaviya <atin.malaviya@gmail.com>
Signed-off-by: Remy Bohmer <linux@bohmer.net>
i.MX31 powers on with most clocks running, so, after a power on this explicit
clock start up is not required. However, as Linux boots it disables most clocks
to save power. This includes the I2C clock. If we then soft reboot from Linux
the I2C clock stays off. This breaks the phycore, which has its environment in
I2C EEPROM. Fix the problem by explicitly starting the clock in I2C driver
initialisation routine.
Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
Ack-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
At some point an intentional double space at the end of the sentence
got changed into a tab in the GPL header line:
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
This patch fixes the damage.
Signed-off-by: Gerald Van Baren <vanbaren@cideas.com>
If on your board is more than one flash, you must know
the size of every single flash, for example, for updating
the DTS before booting Linux. So make this function
flash_get_info() extern, and you can have all info
about your flashes.
Signed-off-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
Added new CONFIG options for the three type of MAC-PHY interconnect and
applied them all relevant board config files
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
SOFT_RESET must be asserted for at least 3 TX clocks. Usually, that's about 30
clock cycles, so it's been mostly working. But we had no guarantee, and at
slower bitrates, it's just over a microsecond (over 1000 clock cycles). This
enforces a 2 microsecond gap between assertion and deassertion.
Signed-off-by: Andy Fleming <afleming@freescale.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
100Mbs ethernet does not work on sh7763 chips due to the wrong value being
used in the GECMR register. Following diff fixes the problem
Signed-off-by: Simon Munton <simon@nidoran.m5data.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
The code assumes that the pci bus address and the virtual
address used to access a region are the same, but they might
not be. Fix this assumption.
Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org>
It is no longer always true that the pci bus address can be
used as the virtual address for pci accesses. pci_map_bar()
is created to return the virtual address for a pci region.
Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org>
Driver for Dave DNET ethernet controller (used on Dave/DENX
QongEVB-LITE board).
Signed-off-by: Ilya Yanok <yanok@emcraft.com>
Acked-by: Ben Warren <biggerbadderben@gmail.com>
When we search for an address match in pci_hose_{phys_to_bus,bus_to_phys}
we should give preference to memory regions that aren't system memory.
Its possible that we have over mapped system memory in the regions and
we want to avoid depending on the order of the regions.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
The PCI_REGION_MEMORY and PCI_REGION_MEM are a bit to similar and
can be confusing when reading the code.
Rename PCI_REGION_MEMORY to PCI_REGION_SYS_MEMORY to clarify its used
for system memory mapping purposes.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Without the timeout present an infinite loop can occur if the
NAND device is broken or not present.
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
Commit cfa460adfd removed support
for disabling the "No NAND device found!!!" warning when
CONFIG_SYS_NAND_QUIET_TEST was defined. This re-adds support
for silencing the warning.
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
Dear Wolfgang,
You are right, the patch was ugly.
The new one seems to be better.
Signed-off-by: Valeriy Glushkov <gvv@lstec.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
Modified mii_init to support boards with PHYs that are not set to
autonegotiate, but still want to use u-boot's mii commands to probe
the smi bus. Such PHYs will not set the Autonegotiate-done bit.
Signed-off-by: Richard Retanubun <RichardRetanubun@RuggedCom.com>
Applied the patch for baudrate divider value truncation for
serial_init to serial_setbrg as well.
Signed-off-by: Richard Retanubun <RichardRetanubun@RuggedCom.com>
Patch "flash/cfi_flash: Use virtual sector start address, not phys"
introduced a small typo and compilation warning for systems with CFI
legacy support (e.g. hcu4). This patch fixes it.
Signed-off-by: Stefan Roese <sr@denx.de>
This patch removes the double defined manufacturer defines from
jedec_flash.c. Since the common defines in flash.h are 32bit
we now need the (16) cast. This patch also removes the compilation
warning (e.g. seen on hcu5):
./MAKEALL hcu5
Configuring for hcu5 board...
jedec_flash.c:219: warning: large integer implicitly truncated to unsigned type
Signed-off-by: Stefan Roese <sr@denx.de>
Patch "flash/cfi_flash: Use virtual sector start address, not phys"
introduced a small compilation warning. This patch fixes it.
Signed-off-by: Stefan Roese <sr@denx.de>
include/flash.h was commented to say that the address in
flash_info->start was a physical address. However, from u-boot's
point of view, and looking at most flash code, it makes more
sense for this to be a virtual address. So I corrected the
comment to indicate that this was a virtual address.
The only flash driver that was actually treating the address
as physical was the mtd/cfi_flash driver. However, this code
was using it inconsistently as it actually directly dereferenced
the "start" element, while it used map_physmem to get a
virtual address in other places. I changed this driver so
that the code which initializes the info->start field calls
map_physmem to get a virtual address, eliminating the need for
further map_physmem calls. The code is now consistent.
The *only* place a physical address should be used is when defining the
flash banks list that is used to initialize the flash_info struct,
usually found in the board config file.
Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org>
Signed-off-by: Stefan Roese <sr@denx.de>
Somehow I missed the real driver part in my last patch version. This patch
now adds the driver.
Signed-off-by: Stefan Roese <sr@denx.de>
Signed-off-by: Remy Bohmer <linux@bohmer.net>
This is a port of the Linux Blackfin on-chip SDH driver to U-Boot.
Signed-off-by: Cliff Cai <cliff.cai@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
This is a port of the Linux Blackfin on-chip ATAPI driver to U-Boot.
Signed-off-by: Sonic Zhang <Sonic.Zhang@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Redo how pointers are managed to get rid of ugly casts and strict pointer
aliasing issues that are highlighted by gcc 4.3.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Acked-by: Ben Warren <biggerbadderben@gmail.com>
No point in having a Blackfin-specific define "CONFIG_BFIN_MAC_RMII" that
does exactly the same thing as common "CONFIG_RMII".
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Acked-by: Ben Warren <biggerbadderben@gmail.com>
Rather then defining our own DEBUGF(), just use the common debug().
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Acked-by: Ben Warren <biggerbadderben@gmail.com>
Rather than having the on-chip MAC hardcoded to phy address 1 and a speed
of 2.5mhz, use these as defaults if the board doesn't specify otherwise.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Acked-by: Ben Warren <biggerbadderben@gmail.com>
Cleanup and rewrite the MII/PHY related functions so that we can reuse the
existing common linux/miiphy.h code and hook into the `mii` command.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Acked-by: Ben Warren <biggerbadderben@gmail.com>
Rather than hardcoding MDCDIV to 24 (which is correct for ~125mhz SCLK),
use the real algorithm so it gets set correctly regardless of SCLK.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Acked-by: Ben Warren <biggerbadderben@gmail.com>
This patch adds support for searching through available PHY-addresses in
the macb-driver. This is needed for the ATEVK1100 evaluation board,
where the PHY-address will be initialized to either 1 or 7.
This patch adds a config option, CONFIG_MACB_SEARCH_PHY, which when
enabled tells the driver to search for the PHY address.
Signed-off-by: Gunnar Rangoy <gunnar@rangoy.com>
Signed-off-by: Paul Driveklepp <pauldriveklepp@gmail.com>
Signed-off-by: Olav Morken <olavmrk@gmail.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
This patch adjusts the LED control so that interrupt lines are not reading LEDs
and effectively causing indefinite interrupts to the controller.
Signed-off-by: Ron Madrid <ron_madrid@sbcglobal.net>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
This patch adds routines to handle (flush/invalidate) the dcache for the
QH and qTD structures and data buffers. This is needed on platforms using
this EHCI support with dcache enabled (like the MIPS VCT board port).
Signed-off-by: Stefan Roese <sr@denx.de>
Signed-off-by: Remy Bohmer <linux@bohmer.net>
