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sh: Add some register value configurable to PCI of SH7780
Some register value was hardcoded for System memory size 128MB and memory offset 0x08000000. This patch fixed the problem. Signed-off-by: Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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parent
06e2735eb8
commit
06b18163b5
3 changed files with 9 additions and 3 deletions
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@ -85,11 +85,11 @@ int pci_sh7780_init(struct pci_controller *hose)
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p4_out(SH7780_PCICR_PREFIX, SH7780_PCICR);
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p4_outw(0x0047, SH7780_PCICMD);
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p4_out(0x07F00001, SH7780_PCILSR0);
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p4_out(0x08000000, SH7780_PCILAR0);
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p4_out(CONFIG_SH7780_PCI_LSR, SH7780_PCILSR0);
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p4_out(CONFIG_SH7780_PCI_LAR, SH7780_PCILAR0);
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p4_out(0x00000000, SH7780_PCILSR1);
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p4_out(0, SH7780_PCILAR1);
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p4_out(0x08000000, SH7780_PCIMBAR0);
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p4_out(CONFIG_SH7780_PCI_BAR, SH7780_PCIMBAR0);
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p4_out(0x00000000, SH7780_PCIMBAR1);
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p4_out(0xFD000000, SH7780_PCIMBR0);
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@ -129,6 +129,9 @@
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#define CONFIG_PCI
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#define CONFIG_SH4_PCI
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#define CONFIG_SH7780_PCI
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#define CONFIG_SH7780_PCI_LSR 0x07f00001
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#define CONFIG_SH7780_PCI_LAR CONFIG_SYS_SDRAM_SIZE
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#define CONFIG_SH7780_PCI_BAR CONFIG_SYS_SDRAM_SIZE
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#define CONFIG_PCI_PNP
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#define CONFIG_PCI_SCAN_SHOW 1
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#define __io
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@ -133,6 +133,9 @@
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#define CONFIG_PCI
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#define CONFIG_SH4_PCI
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#define CONFIG_SH7780_PCI
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#define CONFIG_SH7780_PCI_LSR 0x07f00001
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#define CONFIG_SH7780_PCI_LAR CONFIG_SYS_SDRAM_SIZE
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#define CONFIG_SH7780_PCI_BAR CONFIG_SYS_SDRAM_SIZE
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#define CONFIG_PCI_PNP
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#define CONFIG_PCI_SCAN_SHOW 1
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