sh: Add some register value configurable to PCI of SH7780

Some register value was hardcoded for System memory size 128MB and
memory offset 0x08000000. This patch fixed the problem.

Signed-off-by: Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
This commit is contained in:
Yoshihiro Shimoda 2009-02-25 14:26:42 +09:00 committed by Nobuhiro Iwamatsu
parent 06e2735eb8
commit 06b18163b5
3 changed files with 9 additions and 3 deletions

View file

@ -85,11 +85,11 @@ int pci_sh7780_init(struct pci_controller *hose)
p4_out(SH7780_PCICR_PREFIX, SH7780_PCICR);
p4_outw(0x0047, SH7780_PCICMD);
p4_out(0x07F00001, SH7780_PCILSR0);
p4_out(0x08000000, SH7780_PCILAR0);
p4_out(CONFIG_SH7780_PCI_LSR, SH7780_PCILSR0);
p4_out(CONFIG_SH7780_PCI_LAR, SH7780_PCILAR0);
p4_out(0x00000000, SH7780_PCILSR1);
p4_out(0, SH7780_PCILAR1);
p4_out(0x08000000, SH7780_PCIMBAR0);
p4_out(CONFIG_SH7780_PCI_BAR, SH7780_PCIMBAR0);
p4_out(0x00000000, SH7780_PCIMBAR1);
p4_out(0xFD000000, SH7780_PCIMBR0);

View file

@ -129,6 +129,9 @@
#define CONFIG_PCI
#define CONFIG_SH4_PCI
#define CONFIG_SH7780_PCI
#define CONFIG_SH7780_PCI_LSR 0x07f00001
#define CONFIG_SH7780_PCI_LAR CONFIG_SYS_SDRAM_SIZE
#define CONFIG_SH7780_PCI_BAR CONFIG_SYS_SDRAM_SIZE
#define CONFIG_PCI_PNP
#define CONFIG_PCI_SCAN_SHOW 1
#define __io

View file

@ -133,6 +133,9 @@
#define CONFIG_PCI
#define CONFIG_SH4_PCI
#define CONFIG_SH7780_PCI
#define CONFIG_SH7780_PCI_LSR 0x07f00001
#define CONFIG_SH7780_PCI_LAR CONFIG_SYS_SDRAM_SIZE
#define CONFIG_SH7780_PCI_BAR CONFIG_SYS_SDRAM_SIZE
#define CONFIG_PCI_PNP
#define CONFIG_PCI_SCAN_SHOW 1