2017-02-07 03:17:34 +00:00
|
|
|
source "drivers/net/phy/Kconfig"
|
2018-03-08 10:00:35 +00:00
|
|
|
source "drivers/net/pfe_eth/Kconfig"
|
2019-05-15 09:09:21 +00:00
|
|
|
source "drivers/net/fsl-mc/Kconfig"
|
2017-02-07 03:17:34 +00:00
|
|
|
|
2021-08-08 18:20:31 +00:00
|
|
|
config ETH
|
|
|
|
|
def_bool y
|
|
|
|
|
|
2015-03-22 22:09:10 +00:00
|
|
|
config DM_ETH
|
2022-08-02 11:33:47 +00:00
|
|
|
bool
|
2015-03-22 22:09:10 +00:00
|
|
|
depends on DM
|
|
|
|
|
help
|
|
|
|
|
Enable driver model for Ethernet.
|
|
|
|
|
|
2018-07-02 19:47:48 +00:00
|
|
|
The eth_*() interface will be implemented by the UCLASS_ETH class
|
|
|
|
|
This is currently implemented in net/eth-uclass.c
|
2015-03-22 22:09:10 +00:00
|
|
|
Look in include/net.h for details.
|
2015-03-22 22:09:13 +00:00
|
|
|
|
2022-11-27 15:25:36 +00:00
|
|
|
config SPL_DM_ETH
|
|
|
|
|
depends on SPL_NET
|
|
|
|
|
def_bool y
|
|
|
|
|
|
2019-06-03 16:10:30 +00:00
|
|
|
config DM_MDIO
|
|
|
|
|
bool "Enable Driver Model for MDIO devices"
|
2022-08-02 11:33:47 +00:00
|
|
|
depends on PHYLIB
|
2019-06-03 16:10:30 +00:00
|
|
|
help
|
|
|
|
|
Enable driver model for MDIO devices
|
|
|
|
|
|
|
|
|
|
Adds UCLASS_MDIO DM class supporting MDIO buses that are probed as
|
|
|
|
|
stand-alone devices. Useful in particular for systems that support
|
|
|
|
|
DM_ETH and have a stand-alone MDIO hardware block shared by multiple
|
|
|
|
|
Ethernet interfaces.
|
|
|
|
|
This is currently implemented in net/mdio-uclass.c
|
|
|
|
|
Look in include/miiphy.h for details.
|
|
|
|
|
|
2019-07-12 07:13:50 +00:00
|
|
|
config DM_MDIO_MUX
|
|
|
|
|
bool "Enable Driver Model for MDIO MUX devices"
|
|
|
|
|
depends on DM_MDIO
|
|
|
|
|
help
|
|
|
|
|
Enable driver model for MDIO MUX devices
|
|
|
|
|
|
|
|
|
|
Adds UCLASS_MDIO_MUX DM class supporting MDIO MUXes. Useful for
|
|
|
|
|
systems that support DM_MDIO and integrate one or multiple muxes on
|
|
|
|
|
the MDIO bus.
|
|
|
|
|
This is currently implemented in net/mdio-mux-uclass.c
|
|
|
|
|
Look in include/miiphy.h for details.
|
|
|
|
|
|
2021-01-25 12:23:53 +00:00
|
|
|
config DM_DSA
|
|
|
|
|
bool "Enable Driver Model for DSA switches"
|
2022-08-02 11:33:47 +00:00
|
|
|
depends on DM_MDIO
|
2021-01-25 12:23:53 +00:00
|
|
|
depends on PHY_FIXED
|
|
|
|
|
help
|
|
|
|
|
Enable driver model for DSA switches
|
|
|
|
|
|
|
|
|
|
Adds UCLASS_DSA class supporting switches that follow the Distributed
|
|
|
|
|
Switch Architecture (DSA). These switches rely on the presence of a
|
|
|
|
|
management switch port connected to an Ethernet controller capable of
|
|
|
|
|
receiving frames from the switch. This host Ethernet controller is
|
|
|
|
|
called the "master" Ethernet interface in DSA terminology.
|
|
|
|
|
This is currently implemented in net/dsa-uclass.c, refer to
|
|
|
|
|
include/net/dsa.h for API details.
|
|
|
|
|
|
2019-06-03 16:12:28 +00:00
|
|
|
config MDIO_SANDBOX
|
|
|
|
|
depends on DM_MDIO && SANDBOX
|
|
|
|
|
default y
|
|
|
|
|
bool "Sandbox: Mocked MDIO driver"
|
|
|
|
|
help
|
|
|
|
|
This driver implements dummy read/write/reset MDIO functions mimicking
|
|
|
|
|
a bus with a single PHY.
|
|
|
|
|
|
|
|
|
|
This driver is used in for testing in test/dm/mdio.c
|
|
|
|
|
|
2019-07-12 07:13:53 +00:00
|
|
|
config MDIO_MUX_SANDBOX
|
|
|
|
|
depends on DM_MDIO_MUX && MDIO_SANDBOX
|
|
|
|
|
default y
|
|
|
|
|
bool "Sandbox: Mocked MDIO-MUX driver"
|
|
|
|
|
help
|
|
|
|
|
This driver implements dummy select/deselect ops mimicking a MUX on
|
|
|
|
|
the MDIO bux. It uses mdio_sandbox driver as parent MDIO.
|
|
|
|
|
|
|
|
|
|
This driver is used for testing in test/dm/mdio.c
|
|
|
|
|
|
2020-05-03 14:41:14 +00:00
|
|
|
config DM_ETH_PHY
|
|
|
|
|
bool "Enable Driver Model for Ethernet Generic PHY drivers"
|
|
|
|
|
depends on DM
|
|
|
|
|
help
|
|
|
|
|
Enable driver model for Ethernet Generic PHY .
|
|
|
|
|
|
sandbox: Add a DSA sandbox driver and unit test
The DSA sandbox driver is used for unit testing the DSA class code.
It implements a simple 2 port switch plus 1 CPU port, and uses a
very simple tag to identify the ports.
The DSA sandbox device is connected via CPU port to a regular Ethernet
sandbox device, called 'dsa-test-eth, managed by the existing eth
sandbox driver. The 'dsa-test-eth' is not intended for testing the
eth class code however, but it is used to emulate traffic through the
'lan0' and 'lan1' front pannel switch ports. To achieve this the dsa
sandbox driver registers a tx handler for the 'dsa-test-eth' device.
The switch ports, labeled as 'lan0' and 'lan1', are also registered
as eth devices by the dsa class code this time. So pinging through
these switch ports is as easy as:
=> setenv ethact lan0
=> ping 1.2.3.5
Unit tests for the dsa class code were also added. The 'dsa_probe'
test exercises most API functions from dsa.h. The 'dsa' unit test
simply exercises ARP/ICMP traffic through the two switch ports,
including tag injection and extraction, with the help of the dsa
sandbox driver.
I took care to minimize the impact on the existing eth unit tests,
though some adjustments needed to be made with the addition of
extra eth interfaces used by the dsa unit tests. The additional eth
interfaces also require MAC addresses, these have been added to the
sandbox default environment.
Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com>
Signed-off-by: Claudiu Manoil <claudiu.manoil@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Message-Id: <20210216224804.3355044-5-olteanv@gmail.com>
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-03-14 12:14:57 +00:00
|
|
|
config DSA_SANDBOX
|
|
|
|
|
depends on DM_DSA && SANDBOX
|
|
|
|
|
default y
|
|
|
|
|
bool "Sandbox: Mocked DSA driver"
|
|
|
|
|
help
|
|
|
|
|
This driver implements a dummy DSA switch connected to a dummy sandbox
|
|
|
|
|
Ethernet device used as DSA master, to test DSA class code, including
|
|
|
|
|
exported DSA API and datapath processing of Ethernet traffic.
|
|
|
|
|
|
2015-03-22 22:09:13 +00:00
|
|
|
menuconfig NETDEVICES
|
|
|
|
|
bool "Network device support"
|
|
|
|
|
depends on NET
|
2022-08-02 11:33:47 +00:00
|
|
|
select DM_ETH
|
2015-03-22 22:09:13 +00:00
|
|
|
help
|
|
|
|
|
You must select Y to enable any network device support
|
|
|
|
|
Generally if you have any networking support this is a given
|
|
|
|
|
|
|
|
|
|
If unsure, say Y
|
|
|
|
|
|
|
|
|
|
if NETDEVICES
|
|
|
|
|
|
2017-03-26 16:50:23 +00:00
|
|
|
config PHY_GIGE
|
|
|
|
|
bool "Enable GbE PHY status parsing and configuration"
|
|
|
|
|
help
|
|
|
|
|
Enables support for parsing the status output and for
|
|
|
|
|
configuring GbE PHYs (affects the inner workings of some
|
|
|
|
|
commands and miiphyutil.c).
|
|
|
|
|
|
2016-05-24 21:29:09 +00:00
|
|
|
config AG7XXX
|
|
|
|
|
bool "Atheros AG7xxx Ethernet MAC support"
|
2022-08-02 11:33:47 +00:00
|
|
|
depends on ARCH_ATH79
|
2016-05-24 21:29:09 +00:00
|
|
|
select PHYLIB
|
|
|
|
|
help
|
|
|
|
|
This driver supports the Atheros AG7xxx Ethernet MAC. This MAC is
|
|
|
|
|
present in the Atheros AR7xxx, AR9xxx and QCA9xxx MIPS chips.
|
|
|
|
|
|
|
|
|
|
|
2015-10-22 07:29:11 +00:00
|
|
|
config ALTERA_TSE
|
|
|
|
|
bool "Altera Triple-Speed Ethernet MAC support"
|
|
|
|
|
select PHYLIB
|
|
|
|
|
help
|
|
|
|
|
This driver supports the Altera Triple-Speed (TSE) Ethernet MAC.
|
|
|
|
|
Please find details on the "Triple-Speed Ethernet MegaCore Function
|
|
|
|
|
Resource Center" of Altera.
|
|
|
|
|
|
2017-07-10 21:05:41 +00:00
|
|
|
config BCM_SF2_ETH
|
|
|
|
|
bool "Broadcom SF2 (Starfighter2) Ethernet support"
|
|
|
|
|
select PHYLIB
|
|
|
|
|
help
|
|
|
|
|
This is an abstract framework which provides a generic interface
|
|
|
|
|
to MAC and DMA management for multiple Broadcom SoCs such as
|
|
|
|
|
Cygnus, NSP and bcm28155_ap platforms.
|
|
|
|
|
|
|
|
|
|
config BCM_SF2_ETH_DEFAULT_PORT
|
|
|
|
|
int "Broadcom SF2 (Starfighter2) Ethernet default port number"
|
|
|
|
|
depends on BCM_SF2_ETH
|
|
|
|
|
default 0
|
|
|
|
|
help
|
|
|
|
|
Default port number for the Starfighter2 ethernet driver.
|
|
|
|
|
|
|
|
|
|
config BCM_SF2_ETH_GMAC
|
|
|
|
|
bool "Broadcom SF2 (Starfighter2) GMAC Ethernet support"
|
|
|
|
|
depends on BCM_SF2_ETH
|
|
|
|
|
help
|
|
|
|
|
This flag enables the ethernet support for Broadcom platforms with
|
|
|
|
|
GMAC such as Cygnus. This driver is based on the framework provided
|
|
|
|
|
by the BCM_SF2_ETH driver.
|
|
|
|
|
Say Y to any bcmcygnus based platforms.
|
|
|
|
|
|
2018-12-01 18:00:24 +00:00
|
|
|
config BCM6348_ETH
|
|
|
|
|
bool "BCM6348 EMAC support"
|
2022-08-02 11:33:47 +00:00
|
|
|
depends on ARCH_BMIPS
|
2018-12-01 18:00:24 +00:00
|
|
|
select DMA
|
|
|
|
|
select DMA_CHANNELS
|
|
|
|
|
select MII
|
|
|
|
|
select PHYLIB
|
|
|
|
|
help
|
|
|
|
|
This driver supports the BCM6348 Ethernet MAC.
|
|
|
|
|
|
2018-12-01 18:00:32 +00:00
|
|
|
config BCM6368_ETH
|
|
|
|
|
bool "BCM6368 EMAC support"
|
2022-08-02 11:33:47 +00:00
|
|
|
depends on ARCH_BMIPS
|
2018-12-01 18:00:32 +00:00
|
|
|
select DMA
|
|
|
|
|
select MII
|
|
|
|
|
help
|
|
|
|
|
This driver supports the BCM6368 Ethernet MAC.
|
|
|
|
|
|
2020-01-27 01:14:42 +00:00
|
|
|
config BCMGENET
|
|
|
|
|
bool "BCMGENET V5 support"
|
|
|
|
|
select PHYLIB
|
|
|
|
|
help
|
|
|
|
|
This driver supports the BCMGENET Ethernet MAC.
|
|
|
|
|
|
2022-11-27 15:25:02 +00:00
|
|
|
source "drivers/net/bnxt/Kconfig"
|
|
|
|
|
|
2021-01-14 21:34:11 +00:00
|
|
|
config CORTINA_NI_ENET
|
|
|
|
|
bool "Cortina-Access Ethernet driver"
|
2022-08-02 11:33:47 +00:00
|
|
|
depends on CORTINA_PLATFORM
|
2021-01-14 21:34:11 +00:00
|
|
|
help
|
|
|
|
|
This driver supports the Cortina-Access Ethernet MAC for
|
|
|
|
|
all supported CAxxxx SoCs.
|
|
|
|
|
|
2021-04-12 00:04:52 +00:00
|
|
|
config CALXEDA_XGMAC
|
|
|
|
|
bool "Calxeda XGMAC support"
|
|
|
|
|
help
|
|
|
|
|
This driver supports the XGMAC in Calxeda Highbank and Midway
|
|
|
|
|
machines.
|
|
|
|
|
|
2022-04-13 02:15:38 +00:00
|
|
|
config DRIVER_DM9000
|
|
|
|
|
bool "Davicom DM9000 controller driver"
|
|
|
|
|
help
|
|
|
|
|
The Davicom DM9000 parallel bus external ethernet interface chip.
|
|
|
|
|
|
2022-12-02 21:42:18 +00:00
|
|
|
config DM9000_BYTE_SWAPPED
|
|
|
|
|
bool "Byte swapped access for DM9000"
|
|
|
|
|
depends on DRIVER_DM9000
|
|
|
|
|
|
|
|
|
|
config DM9000_NO_SROM
|
|
|
|
|
bool "No SROM on DM9000"
|
|
|
|
|
depends on DRIVER_DM9000
|
|
|
|
|
|
|
|
|
|
config DM9000_USE_16BIT
|
|
|
|
|
bool "Use 16bit access in DM9000"
|
|
|
|
|
depends on DRIVER_DM9000
|
|
|
|
|
|
2016-10-21 20:46:47 +00:00
|
|
|
config DWC_ETH_QOS
|
|
|
|
|
bool "Synopsys DWC Ethernet QOS device support"
|
|
|
|
|
select PHYLIB
|
|
|
|
|
help
|
|
|
|
|
This driver supports the Synopsys Designware Ethernet QOS (Quality
|
|
|
|
|
Of Service) IP block. The IP supports many options for bus type,
|
2020-06-08 09:27:19 +00:00
|
|
|
clocking/reset structure, and feature list.
|
|
|
|
|
|
|
|
|
|
config DWC_ETH_QOS_IMX
|
|
|
|
|
bool "Synopsys DWC Ethernet QOS device support for IMX"
|
|
|
|
|
depends on DWC_ETH_QOS
|
|
|
|
|
help
|
|
|
|
|
The Synopsys Designware Ethernet QOS IP block with the specific
|
|
|
|
|
configuration used in IMX soc.
|
|
|
|
|
|
|
|
|
|
config DWC_ETH_QOS_STM32
|
|
|
|
|
bool "Synopsys DWC Ethernet QOS device support for STM32"
|
|
|
|
|
depends on DWC_ETH_QOS
|
2021-07-20 18:09:55 +00:00
|
|
|
select DM_ETH_PHY
|
2020-06-08 09:27:19 +00:00
|
|
|
default y if ARCH_STM32MP
|
|
|
|
|
help
|
|
|
|
|
The Synopsys Designware Ethernet QOS IP block with the specific
|
|
|
|
|
configuration used in STM32MP soc.
|
|
|
|
|
|
|
|
|
|
config DWC_ETH_QOS_TEGRA186
|
|
|
|
|
bool "Synopsys DWC Ethernet QOS device support for TEGRA186"
|
|
|
|
|
depends on DWC_ETH_QOS
|
|
|
|
|
default y if TEGRA186
|
|
|
|
|
help
|
|
|
|
|
The Synopsys Designware Ethernet QOS IP block with specific
|
|
|
|
|
configuration used in NVIDIA's Tegra186 chip.
|
2016-10-21 20:46:47 +00:00
|
|
|
|
2023-02-01 13:58:55 +00:00
|
|
|
config DWC_ETH_QOS_QCOM
|
|
|
|
|
bool "Synopsys DWC Ethernet QOS device support for Qcom SoCs"
|
|
|
|
|
depends on DWC_ETH_QOS
|
|
|
|
|
help
|
|
|
|
|
The Synopsys Designware Ethernet QOS IP block with specific
|
|
|
|
|
configuration used in Qcom QCS404 SoC.
|
|
|
|
|
|
2015-08-19 15:33:41 +00:00
|
|
|
config E1000
|
|
|
|
|
bool "Intel PRO/1000 Gigabit Ethernet support"
|
2022-04-26 18:35:33 +00:00
|
|
|
depends on PCI
|
2015-08-19 15:33:41 +00:00
|
|
|
help
|
|
|
|
|
This driver supports Intel(R) PRO/1000 gigabit ethernet family of
|
|
|
|
|
adapters. For more information on how to identify your adapter, go
|
|
|
|
|
to the Adapter & Driver ID Guide at:
|
|
|
|
|
|
|
|
|
|
<http://support.intel.com/support/network/adapter/pro100/21397.htm>
|
|
|
|
|
|
2022-06-08 12:24:23 +00:00
|
|
|
config E1000_NO_NVM
|
|
|
|
|
bool "Intel PRO/1000 has no NVMEM / EEPROM"
|
|
|
|
|
depends on E1000
|
|
|
|
|
|
2015-08-19 15:33:41 +00:00
|
|
|
config E1000_SPI_GENERIC
|
|
|
|
|
bool "Allow access to the Intel 8257x SPI bus"
|
|
|
|
|
depends on E1000
|
|
|
|
|
help
|
|
|
|
|
Allow generic access to the SPI bus on the Intel 8257x, for
|
|
|
|
|
example with the "sspi" command.
|
|
|
|
|
|
|
|
|
|
config E1000_SPI
|
|
|
|
|
bool "Enable SPI bus utility code"
|
|
|
|
|
depends on E1000
|
|
|
|
|
help
|
|
|
|
|
Utility code for direct access to the SPI bus on Intel 8257x.
|
|
|
|
|
This does not do anything useful unless you set at least one
|
|
|
|
|
of CONFIG_CMD_E1000 or CONFIG_E1000_SPI_GENERIC.
|
|
|
|
|
|
|
|
|
|
config CMD_E1000
|
|
|
|
|
bool "Enable the e1000 command"
|
|
|
|
|
depends on E1000
|
|
|
|
|
help
|
|
|
|
|
This enables the 'e1000' management command for E1000 devices. When
|
|
|
|
|
used on devices with SPI support you can reprogram the EEPROM from
|
|
|
|
|
U-Boot.
|
|
|
|
|
|
2020-05-23 16:07:53 +00:00
|
|
|
config EEPRO100
|
|
|
|
|
bool "Intel PRO/100 82557/82559/82559ER Fast Ethernet support"
|
|
|
|
|
help
|
|
|
|
|
This driver supports Intel(R) PRO/100 82557/82559/82559ER fast
|
|
|
|
|
ethernet family of adapters.
|
|
|
|
|
|
2015-03-22 22:09:13 +00:00
|
|
|
config ETH_SANDBOX
|
2022-08-02 11:33:47 +00:00
|
|
|
depends on SANDBOX
|
2015-03-22 22:09:13 +00:00
|
|
|
default y
|
|
|
|
|
bool "Sandbox: Mocked Ethernet driver"
|
|
|
|
|
help
|
|
|
|
|
This driver simply responds with fake ARP replies and ping
|
|
|
|
|
replies that are used to verify network stack functionality
|
|
|
|
|
|
|
|
|
|
This driver is particularly useful in the test/dm/eth.c tests
|
|
|
|
|
|
2015-03-22 22:09:21 +00:00
|
|
|
config ETH_SANDBOX_RAW
|
2022-08-02 11:33:47 +00:00
|
|
|
depends on SANDBOX
|
2015-03-22 22:09:21 +00:00
|
|
|
default y
|
|
|
|
|
bool "Sandbox: Bridge to Linux Raw Sockets"
|
|
|
|
|
help
|
|
|
|
|
This driver is a bridge from the bottom of the network stack
|
|
|
|
|
in U-Boot to the RAW AF_PACKET API in Linux. This allows real
|
|
|
|
|
network traffic to be tested from within sandbox. See
|
2019-07-29 08:22:04 +00:00
|
|
|
doc/arch/index.rst for more details.
|
2015-03-22 22:09:21 +00:00
|
|
|
|
2015-04-05 22:07:34 +00:00
|
|
|
config ETH_DESIGNWARE
|
|
|
|
|
bool "Synopsys Designware Ethernet MAC"
|
2015-12-07 12:53:29 +00:00
|
|
|
select PHYLIB
|
2019-01-13 18:58:41 +00:00
|
|
|
imply ETH_DESIGNWARE_SOCFPGA if ARCH_SOCFPGA
|
2015-04-05 22:07:34 +00:00
|
|
|
help
|
|
|
|
|
This MAC is present in SoCs from various vendors. It supports
|
|
|
|
|
100Mbit and 1 Gbit operation. You must enable CONFIG_PHYLIB to
|
|
|
|
|
provide the PHY (physical media interface).
|
|
|
|
|
|
2021-02-24 19:33:56 +00:00
|
|
|
config ETH_DESIGNWARE_MESON8B
|
|
|
|
|
bool "Amlogic Meson8b and later glue driver for Synopsys Designware Ethernet MAC"
|
|
|
|
|
select ETH_DESIGNWARE
|
|
|
|
|
help
|
|
|
|
|
This provides glue layer to use Synopsys Designware Ethernet MAC
|
|
|
|
|
present on the Amlogic Meson8b, GX, AXG & G12A SoCs.
|
|
|
|
|
|
2018-08-13 17:32:14 +00:00
|
|
|
config ETH_DESIGNWARE_SOCFPGA
|
net: designware: socfpga: adapt to Gen5
This driver was written for Arria10, but it applies to Gen5, too.
The main difference is that Gen5 has 2 MACs (Arria10 has 3) and the
syscon bits are encoded in the same register, thus an offset is needed.
This offset is already read from the devicetree, but for Arria10 it is
always 0, which is probably why it has been ignored. By using this
offset when writing the phy mode into the syscon regiter, we can use
this driver to set the phy mode for both of the MACs on Gen5.
Since the PHY mode bits in sysmgr are the same even for Stratix10,
let's drop the detection of the sub-mach by checking compatible
version and just use the same code for all FPGAs.
To work correctly, this driver depends on SYSCON and REGMAP, so select
those via Kconfig when it is enabeld.
Tested on socfpga_socrates (where the 2nd MAC is connected, so a shift
offset is required).
Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2019-01-13 18:58:40 +00:00
|
|
|
select REGMAP
|
|
|
|
|
select SYSCON
|
2022-06-15 16:03:43 +00:00
|
|
|
select DW_ALTDESCRIPTOR
|
2018-08-13 17:32:14 +00:00
|
|
|
bool "Altera SoCFPGA extras for Synopsys Designware Ethernet MAC"
|
2022-08-02 11:33:47 +00:00
|
|
|
depends on ETH_DESIGNWARE
|
2018-08-13 17:32:14 +00:00
|
|
|
help
|
|
|
|
|
The Altera SoCFPGA requires additional configuration of the
|
|
|
|
|
Altera system manager to correctly interface with the PHY.
|
|
|
|
|
This code handles those SoC specifics.
|
|
|
|
|
|
2020-05-09 14:25:12 +00:00
|
|
|
config ETH_DESIGNWARE_S700
|
|
|
|
|
bool "Actins S700 glue driver for Synopsys Designware Ethernet MAC"
|
2022-08-02 11:33:47 +00:00
|
|
|
depends on ETH_DESIGNWARE
|
2020-05-09 14:25:12 +00:00
|
|
|
help
|
|
|
|
|
This provides glue layer to use Synopsys Designware Ethernet MAC
|
|
|
|
|
present on Actions S700 SoC.
|
|
|
|
|
|
2022-06-15 16:03:43 +00:00
|
|
|
config DW_ALTDESCRIPTOR
|
|
|
|
|
bool "Designware Ethernet MAC uses alternate (enhanced) descriptors"
|
|
|
|
|
depends on ETH_DESIGNWARE
|
|
|
|
|
|
2016-08-05 15:26:15 +00:00
|
|
|
config ETHOC
|
|
|
|
|
bool "OpenCores 10/100 Mbps Ethernet MAC"
|
|
|
|
|
help
|
|
|
|
|
This MAC is present in OpenRISC and Xtensa XTFPGA boards.
|
|
|
|
|
|
2018-03-28 12:54:14 +00:00
|
|
|
config FEC_MXC_SHARE_MDIO
|
|
|
|
|
bool "Share the MDIO bus for FEC controller"
|
|
|
|
|
depends on FEC_MXC
|
|
|
|
|
|
|
|
|
|
config FEC_MXC_MDIO_BASE
|
|
|
|
|
hex "MDIO base address for the FEC controller"
|
|
|
|
|
depends on FEC_MXC_SHARE_MDIO
|
|
|
|
|
help
|
|
|
|
|
This specifies the MDIO registers base address. It is used when
|
|
|
|
|
two FEC controllers share MDIO bus.
|
|
|
|
|
|
2016-10-08 12:30:12 +00:00
|
|
|
config FEC_MXC
|
|
|
|
|
bool "FEC Ethernet controller"
|
2022-07-26 08:41:12 +00:00
|
|
|
depends on MX28 || MX5 || MX6 || MX7 || IMX8 || IMX8M || IMX8ULP || IMX93 || VF610
|
2016-10-08 12:30:12 +00:00
|
|
|
help
|
|
|
|
|
This driver supports the 10/100 Fast Ethernet controller for
|
|
|
|
|
NXP i.MX processors.
|
|
|
|
|
|
2019-05-12 11:59:12 +00:00
|
|
|
config FMAN_ENET
|
|
|
|
|
bool "Freescale FMan ethernet support"
|
|
|
|
|
depends on ARM || PPC
|
2022-07-23 17:05:06 +00:00
|
|
|
select SYS_FMAN_V3 if ARCH_B4420 || ARCH_B4860 || ARCH_LS1043A || \
|
|
|
|
|
ARCH_LS1046A || ARCH_T1024 || ARCH_T1040 || ARCH_T1042 || \
|
|
|
|
|
ARCH_T2080 || ARCH_T4240
|
2022-12-02 21:42:21 +00:00
|
|
|
select FSL_FM_10GEC_REGULAR_NOTATION if ARCH_T1024
|
2019-05-12 11:59:12 +00:00
|
|
|
help
|
|
|
|
|
This driver support the Freescale FMan Ethernet controller
|
|
|
|
|
|
2021-11-09 11:00:38 +00:00
|
|
|
config SYS_FMAN_FW_ADDR
|
|
|
|
|
hex "FMAN Firmware Address"
|
|
|
|
|
depends on FMAN_ENET
|
|
|
|
|
default 0x0
|
|
|
|
|
|
|
|
|
|
config SYS_QE_FMAN_FW_LENGTH
|
|
|
|
|
hex "FMAN QE Firmware length"
|
|
|
|
|
depends on FMAN_ENET || QE || U_QE
|
|
|
|
|
default 0x10000
|
|
|
|
|
|
2022-07-23 17:05:06 +00:00
|
|
|
config SYS_FMAN_V3
|
|
|
|
|
bool
|
2022-07-23 17:05:10 +00:00
|
|
|
select FSL_MEMAC
|
2022-07-23 17:05:06 +00:00
|
|
|
help
|
|
|
|
|
SoC has FMan v3 with mEMAC
|
|
|
|
|
|
2022-12-02 21:42:21 +00:00
|
|
|
config FSL_FM_10GEC_REGULAR_NOTATION
|
|
|
|
|
bool
|
|
|
|
|
help
|
|
|
|
|
On SoCs T4240, T2080, LS1043A, etc, the notation between 10GEC and
|
|
|
|
|
MAC as below:
|
|
|
|
|
10GEC1->MAC9, 10GEC2->MAC10, 10GEC3->MAC1, 10GEC4->MAC2
|
|
|
|
|
While on SoCs T1024, etc, the notation between 10GEC and MAC as below:
|
|
|
|
|
10GEC1->MAC1, 10GEC2->MAC2
|
|
|
|
|
so we introduce CONFIG_FSL_FM_10GEC_REGULAR_NOTATION to identify the
|
|
|
|
|
new SoCs on which 10GEC enumeration is consistent with MAC
|
|
|
|
|
enumeration.
|
|
|
|
|
|
2017-05-26 15:18:53 +00:00
|
|
|
config FTMAC100
|
|
|
|
|
bool "Ftmac100 Ethernet Support"
|
2023-02-03 19:09:04 +00:00
|
|
|
select MII
|
2017-05-26 15:18:53 +00:00
|
|
|
help
|
|
|
|
|
This MAC is present in Andestech SoCs.
|
|
|
|
|
|
2018-10-29 06:06:31 +00:00
|
|
|
config FTGMAC100
|
|
|
|
|
bool "Ftgmac100 Ethernet Support"
|
|
|
|
|
select PHYLIB
|
|
|
|
|
help
|
|
|
|
|
This driver supports the Faraday's FTGMAC100 Gigabit SoC
|
|
|
|
|
Ethernet controller that can be found on Aspeed SoCs (which
|
|
|
|
|
include NCSI).
|
|
|
|
|
|
|
|
|
|
It is fully compliant with IEEE 802.3 specification for
|
|
|
|
|
10/100 Mbps Ethernet and IEEE 802.3z specification for 1000
|
|
|
|
|
Mbps Ethernet and includes Reduced Media Independent
|
|
|
|
|
Interface (RMII) and Reduced Gigabit Media Independent
|
|
|
|
|
Interface (RGMII) interfaces. It adopts an AHB bus interface
|
|
|
|
|
and integrates a link list DMA engine with direct M-Bus
|
|
|
|
|
accesses for transmitting and receiving packets. It has
|
|
|
|
|
independent TX/RX fifos, supports half and full duplex (1000
|
|
|
|
|
Mbps mode only supports full duplex), flow control for full
|
|
|
|
|
duplex and backpressure for half duplex.
|
|
|
|
|
|
|
|
|
|
The FTGMAC100 also implements IP, TCP, UDP checksum offloads
|
|
|
|
|
and supports IEEE 802.1Q VLAN tag insertion and removal. It
|
|
|
|
|
offers high-priority transmit queue for QoS and CoS
|
|
|
|
|
applications.
|
|
|
|
|
|
2022-06-25 15:02:36 +00:00
|
|
|
config SYS_DISCOVER_PHY
|
|
|
|
|
bool
|
2018-10-29 06:06:31 +00:00
|
|
|
|
2019-11-15 22:54:17 +00:00
|
|
|
config MCFFEC
|
|
|
|
|
bool "ColdFire Ethernet Support"
|
|
|
|
|
select PHYLIB
|
2022-06-25 15:02:36 +00:00
|
|
|
select SYS_DISCOVER_PHY
|
2019-11-15 22:54:17 +00:00
|
|
|
help
|
|
|
|
|
This driver supports the network interface units in the
|
|
|
|
|
ColdFire family.
|
|
|
|
|
|
2022-06-25 15:02:35 +00:00
|
|
|
config SYS_UNIFY_CACHE
|
|
|
|
|
depends on MCFFEC
|
|
|
|
|
bool "Invalidate icache during ethernet operations"
|
|
|
|
|
|
2019-11-15 22:54:17 +00:00
|
|
|
config FSLDMAFEC
|
|
|
|
|
bool "ColdFire DMA Ethernet Support"
|
|
|
|
|
select PHYLIB
|
2022-06-25 15:02:36 +00:00
|
|
|
select SYS_DISCOVER_PHY
|
2019-11-15 22:54:17 +00:00
|
|
|
help
|
|
|
|
|
This driver supports the network interface units in the
|
|
|
|
|
ColdFire family.
|
|
|
|
|
|
2020-03-25 18:08:59 +00:00
|
|
|
config KS8851_MLL
|
|
|
|
|
bool "Microchip KS8851-MLL controller driver"
|
|
|
|
|
help
|
|
|
|
|
The Microchip KS8851 parallel bus external ethernet interface chip.
|
|
|
|
|
|
2021-06-30 23:50:08 +00:00
|
|
|
config KSZ9477
|
|
|
|
|
bool "Microchip KSZ9477 I2C controller driver"
|
|
|
|
|
depends on DM_DSA && DM_I2C
|
|
|
|
|
help
|
|
|
|
|
This driver implements a DSA switch driver for the KSZ9477 family
|
|
|
|
|
of GbE switches using the I2C interface.
|
|
|
|
|
|
2022-09-26 06:05:58 +00:00
|
|
|
config LITEETH
|
|
|
|
|
bool "LiteX LiteEth Ethernet MAC"
|
|
|
|
|
help
|
|
|
|
|
Driver for the LiteEth Ethernet MAC from LiteX.
|
|
|
|
|
|
2022-11-30 17:42:50 +00:00
|
|
|
config MV88E6XXX
|
|
|
|
|
bool "Marvell MV88E6xxx Ethernet switch DSA driver"
|
|
|
|
|
depends on DM_DSA && DM_MDIO
|
|
|
|
|
help
|
|
|
|
|
This driver implements a DSA switch driver for the MV88E6xxx family
|
|
|
|
|
of Ethernet switches using the MDIO interface
|
|
|
|
|
|
2018-05-03 11:00:35 +00:00
|
|
|
config MVGBE
|
|
|
|
|
bool "Marvell Orion5x/Kirkwood network interface support"
|
2020-05-06 12:02:40 +00:00
|
|
|
depends on ARCH_KIRKWOOD || ARCH_ORION5X
|
2022-08-02 11:33:47 +00:00
|
|
|
select PHYLIB
|
2018-05-03 11:00:35 +00:00
|
|
|
help
|
|
|
|
|
This driver supports the network interface units in the
|
|
|
|
|
Marvell Orion5x and Kirkwood SoCs
|
|
|
|
|
|
2017-08-21 08:17:03 +00:00
|
|
|
config MVNETA
|
2017-12-28 14:43:09 +00:00
|
|
|
bool "Marvell Armada XP/385/3700 network interface support"
|
2022-11-05 04:23:56 +00:00
|
|
|
depends on ARMADA_XP || ARMADA_38X || ARMADA_3700 || ALLEYCAT_5
|
2017-08-21 08:17:03 +00:00
|
|
|
select PHYLIB
|
2022-04-27 10:41:46 +00:00
|
|
|
select DM_MDIO
|
2017-08-21 08:17:03 +00:00
|
|
|
help
|
|
|
|
|
This driver supports the network interface units in the
|
2017-12-28 14:43:09 +00:00
|
|
|
Marvell ARMADA XP, ARMADA 38X and ARMADA 3700 SoCs
|
2017-08-21 08:17:03 +00:00
|
|
|
|
2016-02-10 06:22:10 +00:00
|
|
|
config MVPP2
|
2017-02-15 10:42:59 +00:00
|
|
|
bool "Marvell Armada 375/7K/8K network interface support"
|
|
|
|
|
depends on ARMADA_375 || ARMADA_8K
|
2016-02-10 06:22:10 +00:00
|
|
|
select PHYLIB
|
2019-08-15 22:08:45 +00:00
|
|
|
select MVMDIO
|
|
|
|
|
select DM_MDIO
|
2016-02-10 06:22:10 +00:00
|
|
|
help
|
|
|
|
|
This driver supports the network interface units in the
|
2017-02-15 10:42:59 +00:00
|
|
|
Marvell ARMADA 375, 7K and 8K SoCs.
|
2016-02-10 06:22:10 +00:00
|
|
|
|
2016-11-02 02:06:55 +00:00
|
|
|
config MACB
|
|
|
|
|
bool "Cadence MACB/GEM Ethernet Interface"
|
|
|
|
|
select PHYLIB
|
|
|
|
|
help
|
|
|
|
|
The Cadence MACB ethernet interface is found on many Atmel
|
|
|
|
|
AT91 and SAMA5 parts. This driver also supports the Cadence
|
|
|
|
|
GEM (Gigabit Ethernet MAC) found in some ARM SoC devices.
|
|
|
|
|
Say Y to include support for the MACB/GEM chip.
|
|
|
|
|
|
2017-08-23 03:25:07 +00:00
|
|
|
config MACB_ZYNQ
|
|
|
|
|
bool "Cadence MACB/GEM Ethernet Interface for Xilinx Zynq"
|
|
|
|
|
depends on MACB
|
|
|
|
|
help
|
|
|
|
|
The Cadence MACB ethernet interface was used on Zynq platform.
|
|
|
|
|
Say Y to enable support for the MACB/GEM in Zynq chip.
|
|
|
|
|
|
2020-11-12 08:36:53 +00:00
|
|
|
config MT7620_ETH
|
|
|
|
|
bool "MediaTek MT7620 Ethernet Interface"
|
|
|
|
|
depends on SOC_MT7620
|
|
|
|
|
select PHYLIB
|
|
|
|
|
select DM_RESET
|
|
|
|
|
select DM_GPIO
|
|
|
|
|
select CLK
|
|
|
|
|
help
|
|
|
|
|
The MediaTek MT7620 ethernet interface is used on MT7620 based
|
|
|
|
|
boards. It has a built-in switch with two configurable ports which
|
|
|
|
|
can connect to external PHY/MACs.
|
|
|
|
|
|
2018-10-26 12:53:27 +00:00
|
|
|
config MT7628_ETH
|
|
|
|
|
bool "MediaTek MT7628 Ethernet Interface"
|
2019-04-30 03:13:58 +00:00
|
|
|
depends on SOC_MT7628
|
2019-09-25 09:45:33 +00:00
|
|
|
select PHYLIB
|
2018-10-26 12:53:27 +00:00
|
|
|
help
|
|
|
|
|
The MediaTek MT7628 ethernet interface is used on MT7628 and
|
|
|
|
|
MT7688 based boards.
|
|
|
|
|
|
2022-05-17 08:28:11 +00:00
|
|
|
config NET_NPCM750
|
|
|
|
|
bool "Nuvoton NPCM750 Ethernet MAC"
|
|
|
|
|
help
|
|
|
|
|
support NPCM750 EMAC
|
|
|
|
|
|
2022-04-07 07:11:52 +00:00
|
|
|
config NET_OCTEON
|
|
|
|
|
bool "MIPS Octeon ethernet support"
|
|
|
|
|
depends on ARCH_OCTEON
|
|
|
|
|
help
|
|
|
|
|
You must select Y to enable network device support for
|
|
|
|
|
MIPS Octeon SoCs. If unsure, say n
|
|
|
|
|
|
2020-08-26 12:37:33 +00:00
|
|
|
config NET_OCTEONTX
|
|
|
|
|
bool "OcteonTX Ethernet support"
|
|
|
|
|
depends on ARCH_OCTEONTX
|
|
|
|
|
depends on PCI_SRIOV
|
|
|
|
|
help
|
|
|
|
|
You must select Y to enable network device support for
|
|
|
|
|
OcteonTX SoCs. If unsure, say n
|
2020-08-26 12:37:42 +00:00
|
|
|
|
|
|
|
|
config NET_OCTEONTX2
|
|
|
|
|
bool "OcteonTX2 Ethernet support"
|
|
|
|
|
depends on ARCH_OCTEONTX2
|
|
|
|
|
select OCTEONTX2_CGX_INTF
|
|
|
|
|
help
|
|
|
|
|
You must select Y to enable network device support for
|
|
|
|
|
OcteonTX2 SoCs. If unsure, say n
|
|
|
|
|
|
2020-08-26 12:37:33 +00:00
|
|
|
config OCTEONTX_SMI
|
|
|
|
|
bool "OcteonTX SMI Device support"
|
|
|
|
|
depends on ARCH_OCTEONTX || ARCH_OCTEONTX2
|
|
|
|
|
help
|
|
|
|
|
You must select Y to enable SMI controller support for
|
|
|
|
|
OcteonTX or OcteonTX2 SoCs. If unsure, say n
|
|
|
|
|
|
2020-08-26 12:37:42 +00:00
|
|
|
config OCTEONTX2_CGX_INTF
|
|
|
|
|
bool "OcteonTX2 CGX ATF interface support"
|
|
|
|
|
depends on ARCH_OCTEONTX2
|
|
|
|
|
default y if ARCH_OCTEONTX2
|
|
|
|
|
help
|
|
|
|
|
You must select Y to enable CGX ATF interface support for
|
|
|
|
|
OcteonTX2 SoCs. If unsure, say n
|
|
|
|
|
|
2015-08-28 05:25:58 +00:00
|
|
|
config PCH_GBE
|
|
|
|
|
bool "Intel Platform Controller Hub EG20T GMAC driver"
|
|
|
|
|
select PHYLIB
|
|
|
|
|
help
|
|
|
|
|
This MAC is present in Intel Platform Controller Hub EG20T. It
|
|
|
|
|
supports 10/100/1000 Mbps operation.
|
|
|
|
|
|
2017-04-02 10:59:08 +00:00
|
|
|
config RGMII
|
|
|
|
|
bool "Enable RGMII"
|
|
|
|
|
help
|
|
|
|
|
Enable the support of the Reduced Gigabit Media-Independent
|
|
|
|
|
Interface (RGMII).
|
|
|
|
|
|
2018-07-21 04:03:57 +00:00
|
|
|
config MII
|
|
|
|
|
bool "Enable MII"
|
|
|
|
|
help
|
|
|
|
|
Enable support of the Media-Independent Interface (MII)
|
|
|
|
|
|
2022-03-18 12:38:22 +00:00
|
|
|
config RMII
|
|
|
|
|
bool "Enable RMII"
|
|
|
|
|
help
|
|
|
|
|
Enable support of the Reduced Media-Independent Interface (MII)
|
|
|
|
|
|
2020-05-17 16:14:17 +00:00
|
|
|
config PCNET
|
|
|
|
|
bool "AMD PCnet series Ethernet controller driver"
|
|
|
|
|
help
|
|
|
|
|
This driver supports AMD PCnet series fast ethernet family of
|
|
|
|
|
PCI chipsets/adapters.
|
|
|
|
|
|
2020-02-06 08:48:16 +00:00
|
|
|
source "drivers/net/qe/Kconfig"
|
|
|
|
|
|
2016-03-21 13:47:41 +00:00
|
|
|
config RTL8139
|
|
|
|
|
bool "Realtek 8139 series Ethernet controller driver"
|
|
|
|
|
help
|
|
|
|
|
This driver supports Realtek 8139 series fast ethernet family of
|
|
|
|
|
PCI chipsets/adapters.
|
|
|
|
|
|
2016-03-21 13:47:42 +00:00
|
|
|
config RTL8169
|
|
|
|
|
bool "Realtek 8169 series Ethernet controller driver"
|
|
|
|
|
help
|
|
|
|
|
This driver supports Realtek 8169 series gigabit ethernet family of
|
|
|
|
|
PCI/PCIe chipsets/adapters.
|
|
|
|
|
|
net: dsa: add driver for NXP SJA1105 L2 switch
The SJA1105 driver is largely reused from Linux. Its programming model
is that it is blank out of reset, and it waits for a static
configuration stream over SPI, which contains all runtime parameters (it
has no notion of "default values").
Keeping a binary array for the configuration stream would have meant
that aspects such as the CPU port and the MAC speeds could have not been
configured easily, and would have been static and board-dependent.
Live-patching the binary array means recalculating the static config
table CRCs, which is not a fun process.
So we create an abstraction over the static config tables, using the
packing API, same as in Linux. The tables are kept as C structures, and
the binary configuration stream is constructed on-the-go, with CRC and
all.
All static config tables instantiated in this driver are mandatory.
The hardware reference manual can be found at:
https://www.nxp.com/docs/en/user-guide/UM10944.pdf
For tagging, a simplified version of tag_8021q from Linux is used. The
VLAN EtherType is the same (0xdadb) but since we don't want switching in
U-Boot, there is no reason to have a TX VLAN and an RX VLAN for each
port. We just need the RX VLANs to act as the unique pvid of each
front-panel port, to decode the switch port number. The RX VLAN is used
for both RX and TX.
The device tree bindings are the same as in Linux.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2021-09-29 15:04:41 +00:00
|
|
|
config SJA1105
|
|
|
|
|
bool "NXP SJA1105 Ethernet switch family driver"
|
|
|
|
|
depends on DM_DSA && DM_SPI
|
|
|
|
|
select BITREVERSE
|
|
|
|
|
help
|
|
|
|
|
This is the driver for the NXP SJA1105 automotive Ethernet switch
|
|
|
|
|
family. These are 5-port devices and are managed over an SPI
|
|
|
|
|
interface. Probing is handled based on OF bindings. The driver
|
|
|
|
|
supports the following revisions:
|
|
|
|
|
- SJA1105E (Gen. 1, No TT-Ethernet)
|
|
|
|
|
- SJA1105T (Gen. 1, TT-Ethernet)
|
|
|
|
|
- SJA1105P (Gen. 2, No SGMII, No TT-Ethernet)
|
|
|
|
|
- SJA1105Q (Gen. 2, No SGMII, TT-Ethernet)
|
|
|
|
|
- SJA1105R (Gen. 2, SGMII, No TT-Ethernet)
|
|
|
|
|
- SJA1105S (Gen. 2, SGMII, TT-Ethernet)
|
|
|
|
|
|
2017-09-05 20:20:44 +00:00
|
|
|
config SMC911X
|
|
|
|
|
bool "SMSC LAN911x and LAN921x controller driver"
|
|
|
|
|
|
|
|
|
|
config SMC911X_32_BIT
|
2021-06-28 13:30:30 +00:00
|
|
|
bool "Enable SMC911X 32-bit interface"
|
2022-08-02 11:33:47 +00:00
|
|
|
depends on SMC911X
|
2017-09-05 20:20:44 +00:00
|
|
|
help
|
2021-06-28 13:30:30 +00:00
|
|
|
Define this if data bus is 32 bits. If your processor use a
|
|
|
|
|
narrower 16 bit bus or cannot convert one 32 bit word to two 16 bit
|
|
|
|
|
words, leave this to "n".
|
2017-09-05 20:20:44 +00:00
|
|
|
|
2017-04-02 10:59:03 +00:00
|
|
|
config SUN7I_GMAC
|
|
|
|
|
bool "Enable Allwinner GMAC Ethernet support"
|
|
|
|
|
help
|
|
|
|
|
Enable the support for Sun7i GMAC Ethernet controller
|
|
|
|
|
|
2017-11-03 06:56:51 +00:00
|
|
|
config SUN7I_GMAC_FORCE_TXERR
|
|
|
|
|
bool "Force PA17 as gmac function"
|
|
|
|
|
depends on SUN7I_GMAC
|
|
|
|
|
help
|
|
|
|
|
Some ethernet phys needs TXERR control. Since the GMAC
|
|
|
|
|
doesn't have such signal, setting PA17 as GMAC function
|
|
|
|
|
makes the pin output low, which enables data transmission.
|
|
|
|
|
|
2017-04-02 10:59:07 +00:00
|
|
|
config SUN4I_EMAC
|
|
|
|
|
bool "Allwinner Sun4i Ethernet MAC support"
|
2017-11-08 03:08:58 +00:00
|
|
|
select PHYLIB
|
2017-04-02 10:59:07 +00:00
|
|
|
help
|
|
|
|
|
This driver supports the Allwinner based SUN4I Ethernet MAC.
|
|
|
|
|
|
2016-07-06 12:29:44 +00:00
|
|
|
config SUN8I_EMAC
|
|
|
|
|
bool "Allwinner Sun8i Ethernet MAC support"
|
|
|
|
|
select PHYLIB
|
2017-03-26 16:50:23 +00:00
|
|
|
select PHY_GIGE
|
2016-07-06 12:29:44 +00:00
|
|
|
help
|
|
|
|
|
This driver supports the Allwinner based SUN8I/SUN50I Ethernet MAC.
|
|
|
|
|
It can be found in H3/A64/A83T based SoCs and compatible with both
|
2017-02-20 14:38:03 +00:00
|
|
|
External and Internal PHYs.
|
2016-07-06 12:29:44 +00:00
|
|
|
|
2017-12-01 07:08:03 +00:00
|
|
|
config SH_ETHER
|
|
|
|
|
bool "Renesas SH Ethernet MAC"
|
|
|
|
|
select PHYLIB
|
|
|
|
|
help
|
|
|
|
|
This driver supports the Ethernet for Renesas SH and ARM SoCs.
|
|
|
|
|
|
2018-10-31 21:21:39 +00:00
|
|
|
source "drivers/net/ti/Kconfig"
|
2018-07-21 04:03:57 +00:00
|
|
|
|
2020-06-20 15:43:29 +00:00
|
|
|
config TULIP
|
|
|
|
|
bool "DEC Tulip DC2114x Ethernet support"
|
|
|
|
|
help
|
|
|
|
|
This driver supports DEC DC2114x Fast ethernet chips.
|
|
|
|
|
|
2015-12-09 15:54:42 +00:00
|
|
|
config XILINX_AXIEMAC
|
|
|
|
|
select PHYLIB
|
|
|
|
|
select MII
|
|
|
|
|
bool "Xilinx AXI Ethernet"
|
|
|
|
|
help
|
|
|
|
|
This MAC is present in Xilinx Microblaze, Zynq and ZynqMP SoCs.
|
|
|
|
|
|
2021-07-02 10:40:34 +00:00
|
|
|
config XILINX_AXIMRMAC
|
2022-08-02 11:33:47 +00:00
|
|
|
depends on ARCH_VERSAL
|
2021-07-02 10:40:34 +00:00
|
|
|
bool "Xilinx AXI MRMAC"
|
|
|
|
|
help
|
|
|
|
|
MRMAC is a high performance, low latency, adaptable Ethernet
|
|
|
|
|
integrated hard IP. This can be configured up to four ports with MAC
|
|
|
|
|
rates from 10GE to 100GE. This could be present in some of the Xilinx
|
|
|
|
|
Versal designs.
|
|
|
|
|
|
2022-11-19 23:45:39 +00:00
|
|
|
config VSC7385_ENET
|
|
|
|
|
bool "Vitesse 7385 Switch Firmware Upload driver"
|
|
|
|
|
|
2015-12-11 08:41:49 +00:00
|
|
|
config XILINX_EMACLITE
|
|
|
|
|
select PHYLIB
|
|
|
|
|
select MII
|
|
|
|
|
bool "Xilinx Ethernetlite"
|
|
|
|
|
help
|
|
|
|
|
This MAC is present in Xilinx Microblaze, Zynq and ZynqMP SoCs.
|
|
|
|
|
|
2015-11-30 13:34:52 +00:00
|
|
|
config ZYNQ_GEM
|
2015-12-11 08:14:31 +00:00
|
|
|
select PHYLIB
|
2015-11-30 13:34:52 +00:00
|
|
|
bool "Xilinx Ethernet GEM"
|
|
|
|
|
help
|
2015-12-09 15:53:52 +00:00
|
|
|
This MAC is present in Xilinx Zynq and ZynqMP SoCs.
|
2015-11-30 13:34:52 +00:00
|
|
|
|
2016-01-28 10:00:21 +00:00
|
|
|
config PIC32_ETH
|
|
|
|
|
bool "Microchip PIC32 Ethernet Support"
|
2022-08-02 11:33:47 +00:00
|
|
|
depends on MACH_PIC32
|
2016-01-28 10:00:21 +00:00
|
|
|
select PHYLIB
|
|
|
|
|
help
|
|
|
|
|
This driver implements 10/100 Mbps Ethernet and MAC layer for
|
|
|
|
|
Microchip PIC32 microcontrollers.
|
|
|
|
|
|
2017-01-11 10:46:11 +00:00
|
|
|
config GMAC_ROCKCHIP
|
|
|
|
|
bool "Rockchip Synopsys Designware Ethernet MAC"
|
2022-08-02 11:33:47 +00:00
|
|
|
depends on ETH_DESIGNWARE
|
2017-01-11 10:46:11 +00:00
|
|
|
help
|
|
|
|
|
This driver provides Rockchip SoCs network support based on the
|
|
|
|
|
Synopsys Designware driver.
|
|
|
|
|
|
2023-03-20 20:05:04 +00:00
|
|
|
config RENESAS_ETHER_SWITCH
|
|
|
|
|
bool "Renesas Ethernet Switch support"
|
|
|
|
|
depends on DM_ETH && R8A779F0
|
|
|
|
|
select PHYLIB
|
|
|
|
|
help
|
|
|
|
|
This driver implements support for the Renesas Ethernet Switch
|
|
|
|
|
which is available on R-Car S4 SoC (r8a779f0).
|
|
|
|
|
|
2017-05-13 13:54:28 +00:00
|
|
|
config RENESAS_RAVB
|
|
|
|
|
bool "Renesas Ethernet AVB MAC"
|
2023-04-07 15:12:17 +00:00
|
|
|
depends on RCAR_64
|
2017-05-13 13:54:28 +00:00
|
|
|
select PHYLIB
|
|
|
|
|
help
|
|
|
|
|
This driver implements support for the Ethernet AVB block in
|
|
|
|
|
Renesas M3 and H3 SoCs.
|
|
|
|
|
|
2017-07-06 08:33:23 +00:00
|
|
|
config MPC8XX_FEC
|
|
|
|
|
bool "Fast Ethernet Controller on MPC8XX"
|
2018-03-16 16:20:41 +00:00
|
|
|
depends on MPC8xx
|
2017-07-06 08:33:23 +00:00
|
|
|
select MII
|
2022-06-25 15:02:36 +00:00
|
|
|
select SYS_DISCOVER_PHY
|
2017-07-06 08:33:23 +00:00
|
|
|
help
|
|
|
|
|
This driver implements support for the Fast Ethernet Controller
|
|
|
|
|
on MPC8XX
|
|
|
|
|
|
2018-05-24 10:24:37 +00:00
|
|
|
config SNI_AVE
|
|
|
|
|
bool "Socionext AVE Ethernet support"
|
2022-08-02 11:33:47 +00:00
|
|
|
depends on ARCH_UNIPHIER
|
2018-05-24 10:24:37 +00:00
|
|
|
select PHYLIB
|
|
|
|
|
select SYSCON
|
|
|
|
|
select REGMAP
|
|
|
|
|
help
|
|
|
|
|
This driver implements support for the Socionext AVE Ethernet
|
|
|
|
|
controller, as found on the Socionext UniPhier family.
|
|
|
|
|
|
2021-06-04 09:44:38 +00:00
|
|
|
config SNI_NETSEC
|
|
|
|
|
bool "Socionext NETSEC Ethernet support"
|
2022-08-02 11:33:47 +00:00
|
|
|
depends on SYNQUACER_SPI
|
2021-06-04 09:44:38 +00:00
|
|
|
select PHYLIB
|
|
|
|
|
help
|
|
|
|
|
This driver implements support for the Socionext SynQuacer NETSEC
|
|
|
|
|
ethernet controller, as found on the Socionext SynQuacer family.
|
|
|
|
|
|
2019-01-31 14:30:33 +00:00
|
|
|
source "drivers/net/mscc_eswitch/Kconfig"
|
2019-01-17 16:07:13 +00:00
|
|
|
|
2017-07-06 08:33:23 +00:00
|
|
|
config ETHER_ON_FEC1
|
|
|
|
|
bool "FEC1"
|
|
|
|
|
depends on MPC8XX_FEC
|
|
|
|
|
default y
|
|
|
|
|
|
|
|
|
|
config FEC1_PHY
|
|
|
|
|
int "FEC1 PHY"
|
|
|
|
|
depends on ETHER_ON_FEC1
|
|
|
|
|
default -1
|
|
|
|
|
help
|
|
|
|
|
Define to the hardcoded PHY address which corresponds
|
|
|
|
|
to the given FEC; i. e.
|
|
|
|
|
#define CONFIG_FEC1_PHY 4
|
|
|
|
|
means that the PHY with address 4 is connected to FEC1
|
|
|
|
|
|
|
|
|
|
When set to -1, means to probe for first available.
|
|
|
|
|
|
|
|
|
|
config PHY_NORXERR
|
|
|
|
|
bool "PHY_NORXERR"
|
|
|
|
|
depends on ETHER_ON_FEC1
|
|
|
|
|
help
|
|
|
|
|
The PHY does not have a RXERR line (RMII only).
|
|
|
|
|
(so program the FEC to ignore it).
|
|
|
|
|
|
|
|
|
|
config ETHER_ON_FEC2
|
|
|
|
|
bool "FEC2"
|
|
|
|
|
depends on MPC8XX_FEC && MPC885
|
|
|
|
|
default y
|
|
|
|
|
|
|
|
|
|
config FEC2_PHY
|
|
|
|
|
int "FEC2 PHY"
|
|
|
|
|
depends on ETHER_ON_FEC2
|
|
|
|
|
default -1
|
|
|
|
|
help
|
|
|
|
|
Define to the hardcoded PHY address which corresponds
|
|
|
|
|
to the given FEC; i. e.
|
|
|
|
|
#define CONFIG_FEC1_PHY 4
|
|
|
|
|
means that the PHY with address 4 is connected to FEC1
|
|
|
|
|
|
|
|
|
|
When set to -1, means to probe for first available.
|
|
|
|
|
|
|
|
|
|
config FEC2_PHY_NORXERR
|
|
|
|
|
bool "PHY_NORXERR"
|
|
|
|
|
depends on ETHER_ON_FEC2
|
|
|
|
|
help
|
|
|
|
|
The PHY does not have a RXERR line (RMII only).
|
|
|
|
|
(so program the FEC to ignore it).
|
|
|
|
|
|
2017-12-15 21:01:01 +00:00
|
|
|
config SYS_DPAA_QBMAN
|
|
|
|
|
bool "Device tree fixup for QBMan on freescale SOCs"
|
|
|
|
|
depends on (ARM || PPC) && !SPL_BUILD
|
|
|
|
|
default y if ARCH_B4860 || \
|
|
|
|
|
ARCH_B4420 || \
|
|
|
|
|
ARCH_P1023 || \
|
|
|
|
|
ARCH_P2041 || \
|
|
|
|
|
ARCH_T1024 || \
|
|
|
|
|
ARCH_T1040 || \
|
|
|
|
|
ARCH_T1042 || \
|
|
|
|
|
ARCH_T2080 || \
|
|
|
|
|
ARCH_T4240 || \
|
|
|
|
|
ARCH_P4080 || \
|
|
|
|
|
ARCH_P3041 || \
|
|
|
|
|
ARCH_P5040 || \
|
|
|
|
|
ARCH_LS1043A || \
|
|
|
|
|
ARCH_LS1046A
|
|
|
|
|
help
|
|
|
|
|
QBman fixups to allow deep sleep in DPAA 1 SOCs
|
|
|
|
|
|
2022-08-01 01:08:29 +00:00
|
|
|
config SYS_FSL_QMAN_V3
|
|
|
|
|
bool # QMAN version 3
|
|
|
|
|
depends on SYS_DPAA_QBMAN
|
|
|
|
|
|
2018-03-28 12:38:18 +00:00
|
|
|
config TSEC_ENET
|
|
|
|
|
select PHYLIB
|
|
|
|
|
bool "Enable Three-Speed Ethernet Controller"
|
|
|
|
|
help
|
|
|
|
|
This driver implements support for the (Enhanced) Three-Speed
|
|
|
|
|
Ethernet Controller found on Freescale SoCs.
|
|
|
|
|
|
2018-12-20 08:12:53 +00:00
|
|
|
config MEDIATEK_ETH
|
|
|
|
|
bool "MediaTek Ethernet GMAC Driver"
|
|
|
|
|
select PHYLIB
|
|
|
|
|
select DM_GPIO
|
|
|
|
|
select DM_RESET
|
|
|
|
|
help
|
|
|
|
|
This Driver support MediaTek Ethernet GMAC
|
|
|
|
|
Say Y to enable support for the MediaTek Ethernet GMAC.
|
|
|
|
|
|
2019-03-20 07:32:40 +00:00
|
|
|
config HIGMACV300_ETH
|
|
|
|
|
bool "HiSilicon Gigabit Ethernet Controller"
|
|
|
|
|
select DM_RESET
|
|
|
|
|
select PHYLIB
|
|
|
|
|
help
|
|
|
|
|
This driver supports HIGMACV300 Ethernet controller found on
|
|
|
|
|
HiSilicon SoCs.
|
|
|
|
|
|
2019-07-03 09:11:40 +00:00
|
|
|
config FSL_ENETC
|
|
|
|
|
bool "NXP ENETC Ethernet controller"
|
2022-08-02 11:33:47 +00:00
|
|
|
depends on DM_MDIO
|
2019-07-03 09:11:40 +00:00
|
|
|
help
|
|
|
|
|
This driver supports the NXP ENETC Ethernet controller found on some
|
|
|
|
|
of the NXP SoCs.
|
|
|
|
|
|
2019-07-16 08:21:17 +00:00
|
|
|
config MDIO_MUX_I2CREG
|
|
|
|
|
bool "MDIO MUX accessed as a register over I2C"
|
|
|
|
|
depends on DM_MDIO_MUX && DM_I2C
|
|
|
|
|
help
|
|
|
|
|
This driver is used for MDIO muxes driven by writing to a register of
|
|
|
|
|
an I2C chip. The board it was developed for uses a mux controlled by
|
|
|
|
|
on-board FPGA which in turn is accessed as a chip over I2C.
|
|
|
|
|
|
2020-10-08 20:05:11 +00:00
|
|
|
config MDIO_IPQ4019
|
|
|
|
|
bool "Qualcomm IPQ4019 MDIO interface support"
|
|
|
|
|
depends on DM_MDIO
|
|
|
|
|
help
|
|
|
|
|
This driver supports the MDIO interface found in Qualcomm
|
|
|
|
|
IPQ40xx series Soc-s.
|
|
|
|
|
|
2019-07-25 09:33:19 +00:00
|
|
|
config MVMDIO
|
|
|
|
|
bool "Marvell MDIO interface support"
|
|
|
|
|
depends on DM_MDIO
|
|
|
|
|
help
|
|
|
|
|
This driver supports the MDIO interface found in the network
|
|
|
|
|
interface units of the Marvell EBU SoCs (Kirkwood, Orion5x,
|
|
|
|
|
Dove, Armada 370, Armada XP, Armada 37xx and Armada7K/8K/8KP).
|
|
|
|
|
|
|
|
|
|
This driver is used by the MVPP2 and MVNETA drivers.
|
|
|
|
|
|
2020-03-18 14:47:36 +00:00
|
|
|
config FSL_LS_MDIO
|
|
|
|
|
bool "NXP Layerscape MDIO interface support"
|
|
|
|
|
depends on DM_MDIO
|
|
|
|
|
help
|
|
|
|
|
This driver supports the MDIO bus found on the Fman 10G Ethernet MACs and
|
|
|
|
|
on the mEMAC (which supports both Clauses 22 and 45).
|
|
|
|
|
|
2021-11-02 05:41:54 +00:00
|
|
|
config ASPEED_MDIO
|
|
|
|
|
bool "Aspeed MDIO interface support"
|
|
|
|
|
depends on DM_MDIO
|
|
|
|
|
help
|
|
|
|
|
This driver supports the MDIO bus of Aspeed AST2600 SOC. The driver
|
|
|
|
|
currently supports Clause 22.
|
|
|
|
|
|
2021-02-24 14:02:23 +00:00
|
|
|
config MDIO_MUX_MMIOREG
|
|
|
|
|
bool "MDIO MUX accessed as a MMIO register access"
|
|
|
|
|
depends on DM_MDIO_MUX
|
|
|
|
|
help
|
|
|
|
|
This driver is used for MDIO muxes driven by writing to a register in
|
|
|
|
|
the MMIO physical memory.
|
|
|
|
|
|
2021-02-24 16:31:53 +00:00
|
|
|
config MDIO_MUX_MESON_G12A
|
|
|
|
|
bool "MDIO MUX for Amlogic Meson G12A SoCs"
|
|
|
|
|
depends on DM_MDIO_MUX
|
|
|
|
|
help
|
|
|
|
|
This driver is used for the MDIO mux found on the Amlogic G12A & compatible
|
|
|
|
|
SoCs.
|
|
|
|
|
|
2015-03-22 22:09:13 +00:00
|
|
|
endif # NETDEVICES
|
