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powerpc, 8xx: move FEC Ethernet driver in drivers/net
Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
This commit is contained in:
parent
b1e41d1cee
commit
fad51ac3af
7 changed files with 60 additions and 39 deletions
15
README
15
README
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@ -4079,21 +4079,6 @@ Low Level (hardware related) configuration options:
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Only for 83xx systems. If specified, then DDR should
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be configured using CS0 and CS1 instead of CS2 and CS3.
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- CONFIG_ETHER_ON_FEC[12]
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Define to enable FEC[12] on a 8xx series processor.
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- CONFIG_FEC[12]_PHY
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Define to the hardcoded PHY address which corresponds
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to the given FEC; i. e.
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#define CONFIG_FEC1_PHY 4
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means that the PHY with address 4 is connected to FEC1
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When set to -1, means to probe for first available.
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- CONFIG_FEC[12]_PHY_NORXERR
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The PHY does not have a RXERR line (RMII only).
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(so program the FEC to ignore it).
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- CONFIG_RMII
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Enable RMII mode for all FECs.
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Note that this is a global option, we can't
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@ -9,7 +9,6 @@ extra-y += start.o
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extra-y += traps.o
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obj-y += cpu.o
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obj-y += cpu_init.o
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obj-y += fec.o
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obj-$(CONFIG_OF_LIBFDT) += fdt.o
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obj-$(CONFIG_CMD_IMMAP) += immap.o
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obj-y += interrupts.o
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@ -327,7 +327,7 @@ void reset_8xx_watchdog(immap_t __iomem *immr)
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*/
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int cpu_eth_init(bd_t *bis)
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{
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#if defined(FEC_ENET)
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#if defined(CONFIG_MPC8XX_FEC)
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fec_initialize(bis);
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#endif
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return 0;
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@ -246,4 +246,62 @@ config RENESAS_RAVB
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This driver implements support for the Ethernet AVB block in
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Renesas M3 and H3 SoCs.
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config MPC8XX_FEC
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bool "Fast Ethernet Controller on MPC8XX"
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depends on 8xx
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select MII
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help
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This driver implements support for the Fast Ethernet Controller
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on MPC8XX
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config ETHER_ON_FEC1
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bool "FEC1"
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depends on MPC8XX_FEC
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default y
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config FEC1_PHY
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int "FEC1 PHY"
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depends on ETHER_ON_FEC1
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default -1
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help
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Define to the hardcoded PHY address which corresponds
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to the given FEC; i. e.
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#define CONFIG_FEC1_PHY 4
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means that the PHY with address 4 is connected to FEC1
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When set to -1, means to probe for first available.
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config PHY_NORXERR
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bool "PHY_NORXERR"
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depends on ETHER_ON_FEC1
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default n
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help
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The PHY does not have a RXERR line (RMII only).
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(so program the FEC to ignore it).
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config ETHER_ON_FEC2
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bool "FEC2"
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depends on MPC8XX_FEC && MPC885
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default y
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config FEC2_PHY
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int "FEC2 PHY"
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depends on ETHER_ON_FEC2
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default -1
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help
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Define to the hardcoded PHY address which corresponds
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to the given FEC; i. e.
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#define CONFIG_FEC1_PHY 4
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means that the PHY with address 4 is connected to FEC1
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When set to -1, means to probe for first available.
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config FEC2_PHY_NORXERR
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bool "PHY_NORXERR"
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depends on ETHER_ON_FEC2
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default n
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help
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The PHY does not have a RXERR line (RMII only).
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(so program the FEC to ignore it).
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endif # NETDEVICES
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@ -38,6 +38,7 @@ obj-$(CONFIG_LAN91C96) += lan91c96.o
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obj-$(CONFIG_LPC32XX_ETH) += lpc32xx_eth.o
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obj-$(CONFIG_MACB) += macb.o
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obj-$(CONFIG_MCFFEC) += mcffec.o mcfmii.o
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obj-$(CONFIG_MPC8XX_FEC) += mpc8xx_fec.o
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obj-$(CONFIG_MVGBE) += mvgbe.o
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obj-$(CONFIG_MVNETA) += mvneta.o
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obj-$(CONFIG_MVPP2) += mvpp2.o
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@ -16,14 +16,6 @@
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DECLARE_GLOBAL_DATA_PTR;
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#if defined(CONFIG_CMD_NET) && \
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(defined(FEC_ENET) || defined(CONFIG_ETHER_ON_FEC1) || defined(CONFIG_ETHER_ON_FEC2))
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/* compatibility test, if only FEC_ENET defined assume ETHER on FEC1 */
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#if defined(FEC_ENET) && !defined(CONFIG_ETHER_ON_FEC1) && !defined(CONFIG_ETHER_ON_FEC2)
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#define CONFIG_ETHER_ON_FEC1 1
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#endif
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/* define WANT_MII when MII support is required */
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#if defined(CONFIG_SYS_DISCOVER_PHY) || defined(CONFIG_FEC1_PHY) || defined(CONFIG_FEC2_PHY)
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#define WANT_MII
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@ -65,11 +57,7 @@ static struct ether_fcc_info_s
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{
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0,
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offsetof(immap_t, im_cpm.cp_fec1),
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#if defined(CONFIG_FEC1_PHY)
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CONFIG_FEC1_PHY,
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#else
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-1, /* discover */
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#endif
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-1,
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0,
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@ -79,11 +67,7 @@ static struct ether_fcc_info_s
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{
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1,
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offsetof(immap_t, im_cpm.cp_fec2),
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#if defined(CONFIG_FEC2_PHY)
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CONFIG_FEC2_PHY,
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#else
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-1,
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#endif
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-1,
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0,
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},
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@ -846,5 +830,3 @@ int fec8xx_miiphy_write(struct mii_dev *bus, int addr, int devad, int reg,
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return 0;
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}
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#endif
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#endif
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@ -704,8 +704,6 @@ CONFIG_ETHER_ON_FCC
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CONFIG_ETHER_ON_FCC1
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CONFIG_ETHER_ON_FCC2
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CONFIG_ETHER_ON_FCC3
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CONFIG_ETHER_ON_FEC1
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CONFIG_ETHER_ON_FEC2
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CONFIG_ETHPRIME
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CONFIG_ETH_BUFSIZE
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CONFIG_ETH_RXSIZE
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@ -761,8 +759,6 @@ CONFIG_FEATURE_SH_APPLETS_ALWAYS_WIN
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CONFIG_FEATURE_SH_EXTRA_QUIET
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CONFIG_FEATURE_SH_FANCY_PROMPT
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CONFIG_FEATURE_SH_STANDALONE_SHELL
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CONFIG_FEC1_PHY
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CONFIG_FEC2_PHY
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CONFIG_FEC_ENET_DEV
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CONFIG_FEC_FIXED_SPEED
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CONFIG_FEC_MXC_25M_REF_CLK
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