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Many System on Chip(SoC) solutions are complex with multiple processors on the same die dedicated to either general purpose of specialized functions. Many examples do exist in today's SoCs from various vendors. Typical examples are micro controllers such as an ARM M3/M0 doing a offload of specific function such as event integration or power management or controlling camera etc. Traditionally, the responsibility of loading up such a processor with a firmware and communication has been with a High Level Operating System(HLOS) such as Linux. However, there exists classes of products where Linux would need to expect services from such a processor or the delay of Linux and operating system being able to load up such a firmware is unacceptable. To address these needs, we need some minimal capability to load such a system and ensure it is started prior to an Operating System(Linux or any other) is started up. NOTE: This is NOT meant to be a solve-all solution, instead, it tries to address certain class of SoCs and products that need such a solution. A very simple model is introduced here as part of the initial support that supports microcontrollers with internal memory (no MMU, no execution from external memory, or specific image format needs). This basic framework can then (hopefully) be extensible to other complex SoC processor support as need be. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Nishanth Menon <nm@ti.com> Acked-by: Simon Glass <sjg@chromium.org> |
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driver-model | ||
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uImage.FIT | ||
feature-removal-schedule.txt | ||
git-mailrc | ||
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kwboot.1 | ||
mkimage.1 | ||
README.440-DDR-performance | ||
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README.zynq |
# # Xilinx ZYNQ U-Boot # # (C) Copyright 2013 Xilinx, Inc. # # SPDX-License-Identifier: GPL-2.0+ # 1. About this This document describes the information about Xilinx Zynq U-Boot - like supported boards, ML status and TODO list. 2. Zynq boards Xilinx Zynq-7000 All Programmable SoCs enable extensive system level differentiation, integration, and flexibility through hardware, software, and I/O programmability. * zc702 (single qspi, gem0, mmc) [1] * zc706 (dual parallel qspi, gem0, mmc) [2] * zed (single qspi, gem0, mmc) [3] * microzed (single qspi, gem0, mmc) [4] * zc770 - zc770-xm010 (single qspi, gem0, mmc) - zc770-xm011 (8 or 16 bit nand) - zc770-xm012 (nor) - zc770-xm013 (dual parallel qspi, gem1) 3. Building ex. configure and build for zc702 board $ make zynq_zc702_config $ make 4. Bootmode Zynq has a facility to read the bootmode from the slcr bootmode register once user is setting through jumpers on the board - see page no:1546 on [5] All possible bootmode values are defined in Table 6-2:Boot_Mode MIO Pins on [5]. board_late_init() will read the bootmode values using slcr bootmode register at runtime and assign the modeboot variable to specific bootmode string which is intern used in autoboot. SLCR bootmode register Bit[3:0] values #define ZYNQ_BM_NOR 0x02 #define ZYNQ_BM_SD 0x05 #define ZYNQ_BM_JTAG 0x0 "modeboot" variable can assign any of "norboot", "sdboot" or "jtagboot" bootmode strings at runtime. 5. Mainline status - Added basic board configurations support. - Added zynq u-boot bsp code - arch/arm/cpu/armv7/zynq - Added zynq boards named - zc70x, zed, microzed, zc770_xm010, zc770_xm012, zc770_xm013 - Added zynq drivers: serial - drivers/serial/serial_zynq.c net - drivers/net/zynq_gem.c mmc - drivers/mmc/zynq_sdhci.c mmc - drivers/mmc/zynq_sdhci.c spi- drivers/spi/zynq_spi.c i2c - drivers/i2c/zynq_i2c.c - Done proper cleanups on board configurations - Added basic FDT support for zynq boards - d-cache support for zynq_gem.c 6. TODO - Add zynq boards support - zc770_xm011 - Add zynq qspi controller driver - Add zynq nand controller driver - Add FDT support on individual drivers [1] http://www.xilinx.com/products/boards-and-kits/EK-Z7-ZC702-G.htm [2] http://www.xilinx.com/products/boards-and-kits/EK-Z7-ZC706-G.htm [3] http://zedboard.org/product/zedboard [4] http://zedboard.org/product/microzed [5] http://www.xilinx.com/support/documentation/user_guides/ug585-Zynq-7000-TRM.pdf -- Jagannadha Sutradharudu Teki <jaganna@xilinx.com> Sun Dec 15 14:52:41 IST 2013