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u-boot/arch/arm/mach-socfpga
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Tien Fong Chee 1085bb3cba spl: socfpga: Implement fpga bitstream loading with socfpga loadfs 
Add support for loading FPGA bitstream to get DDR up running before
U-Boot is loaded into DDR. Boot device initialization, generic firmware
loader and SPL FAT support are required for this whole mechanism to work.

Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
2019-05-10 22:48:11 +02:00
..
include/mach spl: socfpga: Implement fpga bitstream loading with socfpga loadfs 2019-05-10 22:48:11 +02:00
board.c ARM: socfpga: Reorder Arria10 SPL 2018-08-24 12:05:20 +02:00
clock_manager.c ARM: socfpga: clk: Make L4SP and MMC clock calculation Gen5 only 2018-08-13 22:35:42 +02:00
clock_manager_arria10.c ARM: socfpga: Reorder Arria10 SPL 2018-08-24 12:05:20 +02:00
clock_manager_gen5.c SPDX: Convert all of our single license tags to Linux Kernel style 2018-05-07 09:34:12 -04:00
clock_manager_s10.c arm: socfpga: stratix10: Add clock manager driver for Stratix10 SoC 2018-05-18 10:30:47 +02:00
fpga_manager.c SPDX: Convert all of our single license tags to Linux Kernel style 2018-05-07 09:34:12 -04:00
freeze_controller.c SPDX: Convert all of our single license tags to Linux Kernel style 2018-05-07 09:34:12 -04:00
Kconfig ddr: altera: Compile ALTERA SDRAM in SPL only 2019-05-06 12:44:17 +02:00
mailbox_s10.c arm: socfpga: mailbox: Fix off-by-one error on command length checking 2019-04-25 00:00:49 +02:00
Makefile ARM: socfpga: Convert Arria10 to timer framework 2018-08-24 12:05:20 +02:00
misc.c ARM: socfpga: use the pl310 driver to configure the cache 2019-05-05 08:48:50 -04:00
misc_arria10.c ARM: socfpga: Add support for selecting bridges in bridge command 2019-04-29 10:08:56 +02:00
misc_gen5.c ARM: socfpga: Remove socfpga_sdram_apply_static_cfg() 2019-04-29 10:33:45 +02:00
misc_s10.c ARM: socfpga: stratix10: Probe FPGA status before bridge enable 2019-05-06 12:44:45 +02:00
mmu-arm64_s10.c arm: socfpga: stratix10: Add MMU support for Stratix10 SoC 2018-07-12 09:22:11 +02:00
pinmux_arria10.c SPDX: Convert all of our single license tags to Linux Kernel style 2018-05-07 09:34:12 -04:00
qts-filter.sh SPDX: Convert a few files that were missed before 2018-05-10 20:38:35 -04:00
reset_manager.c arm: socfpga: stratix10: Add reset manager driver for Stratix10 SoC 2018-05-18 10:30:47 +02:00
reset_manager_arria10.c ARM: socfpga: Zap unused reset code 2018-08-13 22:35:42 +02:00
reset_manager_gen5.c ARM: socfpga: Fully unmap the FPGA bridges from L3 space 2019-04-29 10:08:55 +02:00
reset_manager_s10.c ARM: socfpga: stratix10: Disable FPGA2SOC reset 2019-05-06 12:44:45 +02:00
scan_manager.c SPDX: Convert all of our single license tags to Linux Kernel style 2018-05-07 09:34:12 -04:00
spl_a10.c spl: socfpga: Implement fpga bitstream loading with socfpga loadfs 2019-05-10 22:48:11 +02:00
spl_gen5.c ARM: socfpga: Disable bridges in SPL unless booting from FPGA 2019-04-29 10:08:55 +02:00
spl_s10.c arm: socfpga: Move Stratix 10 SDRAM driver to DM 2019-05-06 12:44:17 +02:00
system_manager_gen5.c SPDX: Convert all of our single license tags to Linux Kernel style 2018-05-07 09:34:12 -04:00
system_manager_s10.c arm: socfpga: stratix10: Add pinmux support for Stratix10 SoC 2018-05-18 10:30:48 +02:00
timer.c SPDX: Convert all of our single license tags to Linux Kernel style 2018-05-07 09:34:12 -04:00
timer_s10.c arm: socfpga: stratix10: Add timer support for Stratix10 SoC 2018-07-12 09:22:12 +02:00
wrap_iocsr_config.c SPDX: Convert all of our single license tags to Linux Kernel style 2018-05-07 09:34:12 -04:00
wrap_pinmux_config.c SPDX: Convert all of our single license tags to Linux Kernel style 2018-05-07 09:34:12 -04:00
wrap_pinmux_config_s10.c arm: socfpga: stratix10: Add pinmux support for Stratix10 SoC 2018-05-18 10:30:48 +02:00
wrap_pll_config.c SPDX: Convert all of our single license tags to Linux Kernel style 2018-05-07 09:34:12 -04:00
wrap_pll_config_s10.c arm: socfpga: stratix10: Add clock manager driver for Stratix10 SoC 2018-05-18 10:30:47 +02:00
wrap_sdram_config.c arm: socfpga: make config structs const 2018-11-29 12:45:15 +01:00