Commit graph

744 commits

Author SHA1 Message Date
Stefan Roese
29caf9305b cyclic: Use schedule() instead of WATCHDOG_RESET()
Globally replace all occurances of WATCHDOG_RESET() with schedule(),
which handles the HW_WATCHDOG functionality and the cyclic
infrastructure.

Signed-off-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Tom Rini <trini@konsulko.com> [am335x_evm, mx6cuboxi, rpi_3,dra7xx_evm, pine64_plus, am65x_evm, j721e_evm]
2022-09-18 10:26:33 +02:00
Chin-Ting Kuo
463cdf6663 mtd: spi-nor: Use spi-mem dirmap API
This adds support for the dirmap API to the spi-nor subsystem, as
introduced in Linux commit df5c21002cf4  ("mtd: spi-nor: use
spi-mem dirmap API").

This patch is synchronize from the following patch
https://patchwork.ozlabs.org/project/uboot/patch/20210205043924.149504-4-seanga2@gmail.com/
The corresponding Linux kernel SHA1 is df5c21002cf4.

Signed-off-by: Chin-Ting Kuo <chin-ting_kuo@aspeedtech.com>
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Acked-by: Pratyush Yadav <p.yadav@ti.com>
2022-09-13 12:08:41 -04:00
Tom Rini
a2aa7d6550 Merge commit 'ac30d240dbb520d0980f0687630feb702a14f51a' of https://source.denx.de/u-boot/custodians/u-boot-nand-flash into next
Re-sync again on some linux part, add some fixes for fsl_elbc from
Pali and switch
imx8mn bsh to use nand base ident

For nand subsystem tested on:
 - imx8mn  Macronix MX30LF4G18AC
 - P2020 based board Turris 1.1 for fsl_elbc
2022-08-24 17:30:29 -04:00
Pali Rohár
5692e5b244 arm: mvebu: mbus: Fix mbus driver to work also after U-Boot relocation
mbus driver is initialized from arch_cpu_init() callback which is called
before relocation. This driver stores lot of functions and structure
pointers into global variables, so it is data position dependent.

Therefore after relocations all pointers are invalid and driver does not
work anymore as all pointers referes to the old memory, which overlaps with
CONFIG_SYS_LOAD_ADDR and ${loadaddr}.

For example U-Boot fuse command crashes if loadaddr memory is cleared or
rewritten by some image loaded by U-Boot load command.

  mw.w ${loadaddr} 0x0 10000
  fuse read 0 1 2

Fix this issue by removing of all mbus global variables in which are stored
pointers to structures or functions which changes during relocation. And
replace it by direct function calls (not via pointers). With this change
fuse command finally works.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-08-23 12:35:37 +02:00
Michael Trimarchi
6cda1dc210 mtd: nand: Rename nand_get_flash_type() into nand_detect()
Upstream linux commit 7bb427990ee364.

Rename the function to match this new behavior.

NOTE: fix nand_detect/nand_get_flash_type parameters in
mxs_nand_spl. This code seems never executed by any board
as alternative for nand detect

Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Reviewed-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
2022-08-22 11:15:15 +02:00
Michael Trimarchi
c76f9ddf91 mtd: nand: change return type of nand_get_flash_type() to int
Upstream linux commit 4722c0e958e636.

The returned "type" is never used in nand_scan_ident() and spl code

Make nand_get_flash_type() simply return an integer value in order
to avoid unnecessary ERR_PTR/PTR_ERR dance.

Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Reviewed-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
2022-08-22 11:15:04 +02:00
Michael Trimarchi
8a67acfce2 mtd: nand: Rename the nand_manufacturers struct
Upstream linux commit 8cfb9ab68f9070.

Drop the 's' at the end of nand_manufacturers since the struct is actually
describing a single manufacturer, not a manufacturer table.

Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Reviewed-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
2022-08-22 11:14:37 +02:00
Holger Brunck
845102cbe9 powerpc: remove support for kmtergr1 and MPC8309
The kmtegr1 board is out of maintenance and can be removed. As it is the
only board in the tree using MPC8309 the support for this CPU is dropped
completely.

Signed-off-by: Holger Brunck <holger.brunck@hitachienergy.com>
2022-08-20 22:45:00 -04:00
Michael Trimarchi
c7f7cce5c7 mtd: nand: Move Macronix specific initialization in nand_macronix.c
Upstream linux commit 3b5206f4be9b65.

Move Macronix specific initialization logic into nand_macronix.c. This
is part of the "separate vendor specific code from core" cleanup
process.

Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
2022-07-22 13:29:06 +02:00
Michael Trimarchi
bd6adff22f mtd: nand: Move AMD/Spansion specific init/detection logic in nand_amd.c
Upstream linux commit 229204da53b31d.

Move AMD/Spansion specific initialization/detection logic into
nand_amd.c. This is part of the "separate vendor specific code from
core" cleanup process.

Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
2022-07-22 13:29:06 +02:00
Michael Trimarchi
c596e01f18 mtd: nand: Move Micron specific init logic in nand_micron.c
Upstream linux commit 10d4e75c36f6c1.

Move Micron specific initialization logic into nand_micron.c. This is
part of the "separate vendor specific code from core" cleanup process.

Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
2022-07-22 13:29:06 +02:00
Michael Trimarchi
3de2cdb71e mtd: nand: Move Toshiba specific init/detection logic in nand_toshiba.c
Upstream linux commit 9b2d61f80b060c.

Move Toshiba specific initialization and detection logic into
nand_toshiba.c. This is part of the "separate vendor specific code from
core" cleanup process.

Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
2022-07-22 13:29:06 +02:00
Michael Trimarchi
2811ed2fb0 mtd: nand: Move Hynix specific init/detection logic in nand_hynix.c
Upstream linux commit 01389b6bd2f4f7.

Move Hynix specific initialization and detection logic into
nand_hynix.c. This is part of the "separate vendor specific code from
core" cleanup process.

Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
2022-07-22 13:29:06 +02:00
Michael Trimarchi
a1286a1fc4 mtd: nand: Move Samsung specific init/detection logic in nand_samsung.c
Upstream linux commit c51d0ac59f2420.

Move Samsung specific initialization and detection logic into
nand_samsung.c. This is part of the "separate vendor specific code from
core" cleanup process.

Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
2022-07-22 13:29:06 +02:00
Michael Trimarchi
bded7d819f mtd: nand: Export symbol nand_decode_ext_id
In preparation of moving specific nand support that are not jedec
or onfi

Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
2022-07-22 13:29:06 +02:00
Michael Trimarchi
9d1806fadc mtd: nand: Get rid of mtd variable in function calls
chip points to mtd. Passing chip is enough to have a reference
to mtd when is necessary

Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
2022-07-22 10:34:02 +02:00
Michael Trimarchi
b8cd2df519 mtd: nand: Add manufacturer specific initialization/detection steps
Upstream linux commit abbe26d144ec22.

A lot of NANDs are implementing generic features in a non-generic way,
or are providing advanced auto-detection logic where the NAND ID bytes
meaning changes with the NAND generation.

Providing this vendor specific initialization step will allow us to get
rid of full-id entries in the nand_ids table or all the vendor specific
cases added over the time in the generic NAND ID decoding logic.

Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
2022-07-22 10:34:02 +02:00
Michael Trimarchi
bd87603d5a mtd: nand: Store nand ID in struct nand_chip
Upstream linux commit 7f501f0a72036d.

Store the NAND ID in struct nand_chip to avoid passing id_data and id_len
as function parameters.

Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
2022-07-22 10:34:02 +02:00
Jan Kiszka
513c6071ce mtd: spi: Convert is_locked callback to is_unlocked
There was no user of this callback after 5b66fdb29d anymore, and its
semantic as now inconsistent between stm and sst26. What we need for the
upcoming new usecase is a "completely unlocked" semantic. So consolidate
over this.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Acked-by: Jagan Teki <jagan@amarulasolutions.com>
2022-07-18 19:15:19 +05:30
JaimeLiao
bebdc23750 mtd: spi-nor: Parse SFDP SCCR Map
Parse SCCR 22nd dword and check DTR Octal Mode Enable
Volatile bit for Octal DTR enable

Signed-off-by: JaimeLiao <jaimeliao.tw@gmail.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2022-07-18 19:15:19 +05:30
JaimeLiao
df3d5f9e41 mtd: spi-nor: add support for Macronix Octal flash
Follow patch <f6adec1af4b2f5d3012480c6cdce7743b74a6156> (Allow using Micron mt35xu512aba
in Octal DTR mode).
Enable Octal DTR mode with 20 dummy cycles to allow running at the
maximum supported frequency for adding Macronix flash in Octal DTR mode.
 -https://www.mxic.com.tw/Lists/Datasheet/Attachments/7841/MX25LM51245G,%203V,%20512Mb,%20v1.1.pdf

Signed-off-by: JaimeLiao <jaimeliao.tw@gmail.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2022-07-18 19:15:19 +05:30
Rui Miguel Silva
b2d2b78722 usb: common: move urb code to common
Move urb code from musb only use to a more common scope, so other
drivers in the future can use the handling of urb in usb.

Signed-off-by: Rui Miguel Silva <rui.silva@linaro.org>
2022-07-12 21:59:54 +02:00
Tom Rini
cbee8c1ac2 usb: xhci-fsl: Remove non-DM code
The deadline for DM_USB migration has passed and all users have been
migrated.  Remove now unused code.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-06-28 17:03:31 -04:00
Etienne Carriere
2fbe47b7e7 firmware: psci: bind arm smccc features when discovered
Use PSCI device to query Arm SMCCC v1.1 support from secure monitor
and if so, bind drivers for the SMCCC features that monitor supports.

Drivers willing to be bound from Arm SMCCC features discovery can use
macro ARM_SMCCC_FEATURE_DRIVER() to register to smccc feature discovery,
providing target driver name and a callback function that returns
whether or not the SMCCC feature is supported by the system.

Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
2022-06-23 13:12:56 -04:00
Etienne Carriere
f7f1240015 smccc: define generic IDs for feature discovery
Defines function IDs ARM_SMCCC_ARCH_FEATURES used to query SMCCC feature
support, applicable from Arm SMCCC v1.1 specification.

Defines macro ARM_SMCCC_RET_NOT_SUPPORTED as generic return identifier
for when a SMCCC feature is not supported.

Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
2022-06-23 13:12:56 -04:00
Patrick Delaunay
eae488b779 stm32mp1: fix reference for STMicroelectronics
Replace reference to the correct name STMicroelectronics

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2022-06-17 14:12:27 +02:00
Mark Kettenis
6a6468f479 usb: xhci-dwc3: Support role switch default role
When the device tree indicates support for role switching through
the "usb-role-switch" property, take the "role-switch-default-mode"
property into account when deciding which role to put the
controller into.

This makes USB devices work on Apple M1 systems where the device
tree may include a "dr_mode" property that is set to "otg", but
where we need to put the controller into "host" mode to see
devices connected to the type-C ports.

Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
2022-05-20 09:41:33 +02:00
Jan Kiszka
90c52423be lib/date: Make rtc_mktime and mktime64 Y2038-ready
We currently overflow due to wrong types used internally in rtc_mktime,
on all platforms, and we return a too small type on 32-bit.

One consumer that directly benefits from this is mktime64. Many others
may still store the result in a wrong type.

While at it, drop the redundant cast of mon in rtc_mktime (obsoleted by
714209832d).

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
2022-05-05 15:06:02 -04:00
Simon Glass
f86ca5ad8f Introduce Verifying Program Loader (VPL)
Add support for VPL, a new phase of U-Boot. This runs after TPL. It is
responsible for selecting which SPL binary to run, based on a
verified-boot process.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-05-02 09:58:13 -04:00
Pali Rohár
e523f5d181 crc16: Rename fs/ubifs/crc16.h to include/linux/crc16.h
File fs/ubifs/crc16.h is standard linux's crc16.h include file. So move it
from fs/ubifs to include/linux where are also other linux include files.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-04-21 14:32:40 -04:00
Tom Rini
2ddf84679d u-boot-imx-20220413
i.MX patches for 2022.07
 
 CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/11710
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Merge tag 'u-boot-imx-20220413' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx

u-boot-imx-20220413

i.MX patches for 2022.07

CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/11710
2022-04-13 08:00:11 -04:00
Ariel D'Alessandro
d7db0e6df3 iopoll: Extend read_poll_timeout macro to support variable parameters
This macro currently supports only one parameter. Based on Linux iopoll,
let's extend read_poll_timeout common API to allow multiple variable
parameters.

Signed-off-by: Ariel D'Alessandro <ariel.dalessandro@collabora.com>
2022-04-12 19:10:44 +02:00
Heinrich Schuchardt
c8f9e666ab include/linux/byteorder: fix cpu_to_be32_array()
In cpu_to_be32_array() and be32_to_cpu_array() we should not compare an int
counter to a size_t parameter. Correct the type of the counter.  This
exists in upstream as b4c80629c5c9 ("include/linux/byteorder/generic.h:
fix index variables").

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2022-04-12 08:02:54 -04:00
Tom Rini
a7fb97b6e6 linux/mtd/mtd.h: Add <dm/ofnode.h>
We need to know where the typedef of 'ofnode' comes from.

Fixes: c86a4de8df ("mtd: Add flash_node in struct mtd_info")
Signed-off-by: Tom Rini <trini@konsulko.com>
2022-04-11 17:11:21 -04:00
Patrice Chotard
c86a4de8df mtd: Add flash_node in struct mtd_info
Currently, add_mtd_partitions_of() can be used only if dev field of
mtd_info struct is populated. It's the case, for example, for a spi nor
flash, which has a DT compatible "jedec,spi-nor" and an associated
device. mtd->dev is populated in spi_nor_scan().

But in case of a raw nand node, mtd_info's dev field can't be populated
as flash node has no compatible, so no associated device.
add_mtd_partitions_of() can't be used to parse "partitions" subnode.

To remove this constraint, add an ofnode field in mtd_info struct
which reference the DT flash node. This new field is populated by
nand_scan_tail(). This new field will be used by add_mtd_partitions_of()
to parse the flash node for "partitions" defined in DT.

Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Farhan Ali <farhan.ali@broadcom.com>
Cc: Heinrich Schuchardt <xypron.glpk@gmx.de>
Cc: Jagan Teki <jagan@amarulasolutions.com>
Cc: Marek Behun <marek.behun@nic.cz>
Cc: Miquel Raynal <miquel.raynal@bootlin.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Wolfgang Denk <wd@denx.de>
2022-04-11 11:39:19 -04:00
Sean Anderson
3a11b5ae65 clk: ccf: Add some helper functions for clock ops
Most CCF drivers follow a common pattern where their clock ops defer the
actual operation to the backing CCF clock. Add some generic implementations
of these functions to reduce duplication of code.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Link: https://lore.kernel.org/r/20220320203446.740178-1-seanga2@gmail.com
2022-03-30 13:03:29 -04:00
Ashok Reddy Soma
3adc17f60b lib: div64: Add support for round up of div64_u64
Most of the frequencies are not rounded up to a proper number.
When we need to devide these frequencies to get a number for example
frequency in Mhz, we see it as one less than the actual intended value.
Ex: If we want to get Mhz from frequency 199999994hz, we will calculate
it using div64_u64(199999994, 1000000) and we will get 199Mhz in place
of 200Mhz.

Add a macro DIV64_U64_ROUND_UP for rounding up div64_u64. This is taken
from linux 'commit 68600f623d69("mm: don't miss the last page because of
round-off error")'.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/f9fdcba76cd692ae436b1d7883b490e3dc207231.1645626962.git.michal.simek@xilinx.com
2022-03-09 12:34:47 +01:00
Mark Kettenis
456305ec59 mailbox: apple: Add driver for Apple IOP mailbox
This mailbox driver provides a communication channel with the
Apple IOP controllers found on Apple SoCs.  These IOP controllers
are used to implement various functions such as the System
Manegement Controller (SMC) and NVMe storage.  It allows sending
and receiving a 96-bit message over a single channel.

The header file with the struct used for mailbox messages is taken
straight from Linux.

Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
Signed-off-by: Sven Peter <sven@svenpeter.dev>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested on: Macbook Air M1
Tested-by: Simon Glass <sjg@chromium.org>
2022-02-10 16:44:23 -05:00
Simon Glass
097ff01fb9 kconfig: Add support for conditional values
At present if an optional Kconfig value needs to be used it must be
bracketed by #ifdef. For example, with this Kconfig setup:

config WIBBLE
	bool "Support wibbles, the world needs more wibbles"

config WIBBLE_ADDR
	hex "Address of the wibble"
	depends on WIBBLE

then the following code must be used:

 #ifdef CONFIG_WIBBLE
 static void handle_wibble(void)
 {
 	int val = CONFIG_WIBBLE_ADDR;

	...
 }
 #endif

 static void init_machine()
 {
 ...
 #ifdef CONFIG_WIBBLE
	handle_wibble();
 #endif
 }

Add a new IF_ENABLED_INT() to help with this. So now it is possible to
write, without #ifdefs:

 static void handle_wibble(void)
 {
        int val = IF_ENABLED_INT(CONFIG_WIBBLE, CONFIG_WIBBLE_ADDR);

	...
 }

 static void init_machine()
 {
 ...
 if (IS_ENABLED(CONFIG_WIBBLE))
	handle_wibble();
 }

The value will be CONFIG_WIBBLE_ADDR if CONFIG_WIBBLE is defined and will
produce a build error if not.. This allows us to reduce the use of #ifdef
in the code, ensuring that the compiler still checks the code even if it
is not ultimately used for a particular build.

Add a CONFIG_IF_ENABLED_INT() version as well.

If an attempt is made to use a value that does not exist (i.e. when the
conditional is not enabled), an error about a non-existing function is
generated, e.g.:

common/bloblist.c:447: undefined reference to `invalid_use_of_IF_ENABLED_INT'

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-02-08 23:07:59 -05:00
Simon Glass
310bfa737f kconfig: Update IS_ENABLED() internals
The config_enabled() macro currently uses 0 as the default value. Update
it to allow any value, so we can pass it something else, such as a
non-existent function, to produce a build error if it is not defined.

Also tidy up the code style for IS_ENABLED() and drop the unnecessary
brackets (the value is a simple 0 or 1).

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-02-08 23:07:59 -05:00
Keerthy
8a92603a34 linux: bitmap.h: Add find_next_zero_area function
Add find_next_zero_area to fetch the next zero area in the map.

Signed-off-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Amjad Ouled-Ameur <aouledameur@baylibre.com>
2022-02-08 11:00:03 -05:00
Heinrich Schuchardt
185f812c41 doc: replace @return by Return:
Sphinx expects Return: and not @return to indicate a return value.

find . -name '*.c' -exec \
sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \;

find . -name '*.h' -exec \
sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \;

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2022-01-19 18:11:34 +01:00
Simon Glass
78aac05eb1 stddef: Avoid warning with clang with offsetof()
Some bright sparks have decided that a cast on a constant cannot be a
constant, so offsetof() produces this warning on clang-10:

include/intel_gnvs.h:113:1: error: static_assert expression is not an
	integral constant expression
check_member(acpi_global_nvs, unused2, GNVS_CHROMEOS_ACPI_OFFSET);
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
include/linux/kernel.h:284:2: note: expanded from macro 'check_member'
        offsetof(struct structure, member) == (offset), \
        ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
include/linux/stddef.h:20:32: note: expanded from macro 'offsetof'
                                ^
include/intel_gnvs.h:113:1: note: cast that performs the conversions of
	a reinterpret_cast is ot allowed in a constant expression
include/linux/stddef.h:20:33: note: expanded from macro 'offsetof'

Fix it by using the compiler built-in version, if available. This syncs
the function to the same implementation as Linux v5.16 in this header
file.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-01-13 09:13:41 -07:00
Pali Rohár
52a26d392a include/linux/byteorder: Fix compilation of __constant_cpu_to_be32()
The macro __constant_cpu_to_be32() uses ___constant_swab32(), which for
some reason is not defined and causes the following error during
compilation:

  include/linux/byteorder/little_endian.h:28:52: warning:
    implicit declaration of function ‘___constant_swab32’;
    did you mean ‘__builtin_bswap32’? [-Wimplicit-function-declaration]
   #define __constant_cpu_to_be32(x) ((__force __be32)___constant_swab32((x)))

Declare all ___constant_swabXX() macros.

Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-12-19 09:50:47 +01:00
Vladimir Oltean
8a5c057033 include: import if_vlan.h from Linux
This is needed for the VLAN header structure.

Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2021-11-23 09:57:55 +02:00
Tom Rini
355d1e24f6 Merge https://source.denx.de/u-boot/custodians/u-boot-spi
- Fix mtd erase with mtdpart (Marek Behún)
- NXP fspi driver fixes (Kuldeep Singh)
2021-10-23 10:49:28 -04:00
Marek Behún
0d1ecc99cb mtd: Remove mtd_erase_callback() entirely
The original purpose of mtd_erase_callback() in Linux at the time it was
imported to U-Boot, was to inform the caller that erasing is done (since
it was an asynchronous operation).

All supplied callback methods in U-Boot do nothing, but the
mtd_erase_callback() function was (until previous patch) grossly abused
in U-Boot's mtdpart implementation for completely different purpose.

Since we got rid of the abusement, remove the mtd_erase_callback()
function and the .callback member from struct erase_info entirely, in
order to avoid such problems in the future.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
2021-10-23 15:47:33 +05:30
Simon Glass
5500a408dd kconfig: Add tools support to CONFIG_IS_ENABLED()
At present we must separately test for the host build for many options,
since we force them to be enabled. For example, CONFIG_FIT is always
enabled in the host tools, even if CONFIG_FIT is not enabled by the
board itself.

It would be more convenient if we could use, for example,
CONFIG_IS_ENABLED(FIT) and get CONFIG_HOST_FIT, when building for the
host. Add support for this.

With this and the tools_build() function, we should be able to remove all
the #ifdefs currently needed in code that is build by tools and targets.

This will be even nicer when we move to using CONFIG(xxx) everywhere,
since all the #ifdef and IS_ENABLED/CONFIG_IS_ENABLED stuff will go away.

Signed-off-by: Simon Glass <sjg@chromium.org>
Suggested-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk> # b4f73886
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
2021-10-08 15:53:26 -04:00
Simon Glass
94d0a2efc0 zstd: Create a function for use from U-Boot
The existing zstd API requires the same sequence of calls to perform its
task. Create a helper for U-Boot, to avoid code duplication, as is done
with other compression algorithms. Make use of of this from the image
code.

Note that the zstd code lacks a test in test/compression.c and this should
be added by the maintainer.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-10-08 15:53:26 -04:00
Simon Glass
930c887e0f lib: Add memdup()
Add a function to duplicate a memory region, a little like strdup().

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-10-08 15:53:26 -04:00
Tom Rini
b2e25afabd Convert CONFIG_SYS_NAND_MAX_CHIPS to Kconfig
This converts the following to Kconfig:
   CONFIG_SYS_NAND_MAX_CHIPS

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-10-06 09:16:24 -04:00
Tom Rini
8bef036836 Xilinx changes for v2022.01-rc1
zynq:
 - Enable capsule update for qspi and mmc
 - Update zed DT qspi compatible string
 
 zynqmp:
 - Add missing modeboot for EMMC
 - Add missing nand DT properties
 - List all eeproms for SC on vck190
 - Add vck190 SC psu_init
 
 clk:
 - Handle only GATE type clock for Versal
 
 watchdog:
 - Update versal driver to handle system reset
 -----BEGIN PGP SIGNATURE-----
 
 iF0EABECAB0WIQQbPNTMvXmYlBPRwx7KSWXLKUoMIQUCYVWWZgAKCRDKSWXLKUoM
 IY3MAJ43Mlut5tK9gv45bp4HpyVOMuSvJwCfTiVr7ZxrBE8I8QC5+zHzBTmuM6g=
 =aQtT
 -----END PGP SIGNATURE-----

Merge tag 'xilinx-for-v2022.01-rc1' of https://source.denx.de/u-boot/custodians/u-boot-microblaze into next

Xilinx changes for v2022.01-rc1

zynq:
- Enable capsule update for qspi and mmc
- Update zed DT qspi compatible string

zynqmp:
- Add missing modeboot for EMMC
- Add missing nand DT properties
- List all eeproms for SC on vck190
- Add vck190 SC psu_init

clk:
- Handle only GATE type clock for Versal

watchdog:
- Update versal driver to handle system reset
2021-09-30 11:29:41 -04:00
Wolfgang Denk
0cf207ec01 WS cleanup: remove SPACE(s) followed by TAB
Signed-off-by: Wolfgang Denk <wd@denx.de>
2021-09-30 09:08:16 -04:00
Wolfgang Denk
0a50b3c97b WS cleanup: remove trailing white space
Signed-off-by: Wolfgang Denk <wd@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-09-30 08:08:56 -04:00
Wolfgang Denk
c72231d272 WS cleanup: remove excessive empty lines
Signed-off-by: Wolfgang Denk <wd@denx.de>
2021-09-30 08:08:56 -04:00
Wolfgang Denk
66356b4c06 WS cleanup: remove trailing empty lines
Signed-off-by: Wolfgang Denk <wd@denx.de>
2021-09-30 08:08:56 -04:00
Patrice Chotard
b8919eaa68 mtd: nand: raw: convert nand_dt_init() to ofnode_xx() interface
nand_dt_init() is still using fdtdec_xx() interface.
If OF_LIVE flag is enabled, dt property can't be get anymore.
Updating all fdtdec_xx() interface to ofnode_xx() to solve this issue.

For doing this, node parameter type must be ofnode.

First idea was to convert "node" parameter to ofnode type inside
nand_dt_init() using offset_to_ofnode(node). But offset_to_ofnode()
is not bijective, in case OF_LIVE flag is enabled, it performs an assert().

So, this leads to update nand_chip struct flash_node field from int to
ofnode and to update all nand_dt_init() callers.

Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-09-28 12:03:21 -04:00
Patrick Delaunay
a4f2d83414 mtd: spi: nor: force mtd name to "nor%d"
Force the mtd name of spi-nor to "nor" + the driver sequence number:
"nor0", "nor1"... beginning after the existing nor devices.

This patch is coherent with existing "nand" and "spi-nand"
mtd device names.

When CFI MTD NOR device are supported, the spi-nor index is chosen after
the last CFI device defined by CONFIG_SYS_MAX_FLASH_BANKS.

When CONFIG_SYS_MAX_FLASH_BANKS_DETECT is activated, this config
is replaced by to cfi_flash_num_flash_banks in the include file
mtd/cfi_flash.h.

This generic name "nor%d" can be use to identify the mtd spi-nor device
without knowing the real device name or the DT path of the device,
used with API get_mtd_device_nm() and is used in mtdparts command.

This patch also avoids issue when the same NOR device is present 2 times,
for example on STM32MP15F-EV1:

STM32MP> mtd list
SF: Detected mx66l51235l with page size 256 Bytes, erase size 64 KiB, \
total 64 MiB

List of MTD devices:
* nand0
  - type: NAND flash
  - block size: 0x40000 bytes
  - min I/O: 0x1000 bytes
  - OOB size: 224 bytes
  - OOB available: 118 bytes
  - ECC strength: 8 bits
  - ECC step size: 512 bytes
  - bitflip threshold: 6 bits
  - 0x000000000000-0x000040000000 : "nand0"
* mx66l51235l
  - device: mx66l51235l@0
  - parent: spi@58003000
  - driver: jedec_spi_nor
  - path: /soc/spi@58003000/mx66l51235l@0
  - type: NOR flash
  - block size: 0x10000 bytes
  - min I/O: 0x1 bytes
  - 0x000000000000-0x000004000000 : "mx66l51235l"
* mx66l51235l
  - device: mx66l51235l@1
  - parent: spi@58003000
  - driver: jedec_spi_nor
  - path: /soc/spi@58003000/mx66l51235l@1
  - type: NOR flash
  - block size: 0x10000 bytes
  - min I/O: 0x1 bytes
  - 0x000000000000-0x000004000000 : "mx66l51235l"

The same mtd name "mx66l51235l" identify the 2 instances
mx66l51235l@0 and mx66l51235l@1.

This patch fixes a ST32CubeProgrammer / stm32prog command issue
with nor0 target on STM32MP157C-EV1 board introduced by
commit b7f060565e ("mtd: spi-nor: allow registering multiple MTDs when
DM is enabled").

Fixes: b7f060565e ("mtd: spi-nor: allow registering multiple MTDs when DM is enabled")
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
[trini: Add <dm/device.h> to <mtd.h> for DM_MAX_SEQ_STR]
Signed-off-by: Tom Rini <trini@konsulko.com>
2021-09-28 12:03:20 -04:00
Patrice Chotard
a70c3f9fb8 mtd: nand: raw: convert nand_dt_init() to ofnode_xx() interface
nand_dt_init() is still using fdtdec_xx() interface.
If OF_LIVE flag is enabled, dt property can't be get anymore.
Updating all fdtdec_xx() interface to ofnode_xx() to solve this issue.

For doing this, node parameter type must be ofnode.

First idea was to convert "node" parameter to ofnode type inside
nand_dt_init() using offset_to_ofnode(node). But offset_to_ofnode()
is not bijective, in case OF_LIVE flag is enabled, it performs an assert().

So, this leads to update nand_chip struct flash_node field from int to
ofnode and to update all nand_dt_init() callers.

Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-09-28 06:34:45 +02:00
Patrick Delaunay
b071431d52 mtd: remove SPEAr flash driver st_smi
Remove the driver st_smic.c used in SPEAr products and the associated
config CONFIG_ST_SMI; this driver is no more used in U-Boot after the
commit 570c3dcfc1 ("arm: Remove spear600 boards and the rest of SPEAr
support").

Fixes: 570c3dcfc1 ("arm: Remove spear600 boards and the rest of SPEAr support")
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
2021-09-24 12:09:47 -04:00
Matthias Schiffer
950cb1f25f usb: add support for ULPI/SERIAL/HSIC PHY modes
Import usb_phy_interface enum values and DT match strings from the Linux
kernel.

Signed-off-by: Markus Niebel <Markus.Niebel@ew.tq-group.com>
Signed-off-by: Matthias Schiffer <matthias.schiffer@ew.tq-group.com>
2021-09-22 21:29:56 +02:00
Suman Anna
0466275500 firmware: ti_sci: Include linux/err.h in ti_sci_protocol.h
The common TI SCI header file uses some macros from err.h and these
get exercised when CONFIG_TI_SCI_PROTOCOL is not defined. Include
the linux/err.h header file in this header file directly rather
than relying on source files to include it to eliminate any
potential build errors.

While at this, reorder the existing header file include to the
beginning of the file.

Signed-off-by: Suman Anna <s-anna@ti.com>
Reviewed-by: Nishanth Menon <nm@ti.com>
2021-09-17 14:47:03 -04:00
Ashok Reddy Soma
d20cf6b6c3 net: ethtool: Add ethernet speed macros for higher speeds
Add speed macro's for higher ethernet speeds to be used in u-boot
networking drivers. Added Macros for speeds 14G, 20G, 25G, 40G, 50G,
56G, 100G and 200G inline with linux.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Ramon Fried <rfried.dev@gmail.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-07-26 09:18:45 +02:00
Keerthy
7bafe88620 soc: ti: pruss: Add a platform driver for PRUSS in TI SoCs
The Programmable Real-Time Unit - Industrial Communication
Subsystem (PRU-ICSS) is present of various TI SoCs such as
AM335x or AM437x or the AM654x family. Each SoC can have
one or more PRUSS instances that may or may not be identical.

The PRUSS consists of dual 32-bit RISC cores called the
Programmable Real-Time Units (PRUs), some shared, data and
instruction memories, some internal peripheral modules, and
an interrupt controller. The programmable nature of the PRUs
provide flexibility to implement custom peripheral interfaces,
fast real-time responses, or specialized data handling.

Add support for pruss driver. Currently am654x family
is supported.

Signed-off-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Link: https://lore.kernel.org/r/20210622063431.3151-2-lokeshvutla@ti.com
2021-07-15 17:56:04 +05:30
Rasmus Villemoes
ef0f4e834c build_bug.h: add wrapper for _Static_assert
[Linux commit 6bab69c65013bed5fce9f101a64a84d0385b3946]

BUILD_BUG_ON() is a little annoying, since it cannot be used outside
function scope.  So one cannot put assertions about the sizeof() a
struct next to the struct definition, but has to hide that in some more
or less arbitrary function.

Since gcc 4.6 (which is now also the required minimum), there is support
for the C11 _Static_assert in all C modes, including gnu89.  So add a
simple wrapper for that.

_Static_assert() requires a message argument, which is usually quite
redundant (and I believe that bug got fixed at least in newer C++
standards), but we can easily work around that with a little macro
magic, making it optional.

For example, adding

  static_assert(sizeof(struct printf_spec) == 8);

in vsprintf.c and modifying that struct to violate it, one gets

./include/linux/build_bug.h:78:41: error: static assertion failed: "sizeof(struct printf_spec) == 8"
 #define __static_assert(expr, msg, ...) _Static_assert(expr, "" msg "")

godbolt.org suggests that _Static_assert() has been support by clang
since at least 3.0.0.

Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-07-01 16:34:32 -04:00
Takahiro Kuwano
1c3dd193b5 mtd: spi-nor-core: Add fixups for Cypress s25hl-t/s25hs-t
The nor->ready() and spansion_sr_ready() introduced earlier in this
series are used for multi-die package parts.

The nor->quad_enable() sets the volatile QE bit on each die.

The nor->erase() is hooked if the device is not configured to uniform
sectors, assuming it has 32 x 4KB sectors overlaid on bottom address.
Other configurations, top and split, are not supported at this point.
Will submit additional patches to support it as needed.

The post_bfpt/sfdp() fixes the params wrongly advertised in SFDP.

Signed-off-by: Takahiro Kuwano <Takahiro.Kuwano@infineon.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2021-06-29 19:16:54 +05:30
Takahiro Kuwano
72151ad10f mtd: spi-nor-core: Add Cypress manufacturer ID in set_4byte
Cypress chips support SPINOR_OP_EN4B(B7h) to enable 4-byte addressing mode.

Cypress chips support B8h to disable 4-byte addressing mode instead of
SPINOR_OP_EX4B(E9h).

This patch defines new opcode and updates set_4byte() to support
enable/disable 4-byte addressing mode for Cypress chips.

Signed-off-by: Takahiro Kuwano <Takahiro.Kuwano@infineon.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2021-06-29 19:16:54 +05:30
Takahiro Kuwano
d2d79895da mtd: spi-nor-core: Read status by Read Any Register
The spansion_sr_ready() reads status register 1 by Read Any Register
commnad. This function is called from Flash specific hook with die address
and dummy cycles to support multi-die package parts from Spansion/Cypress.

Signed-off-by: Takahiro Kuwano <Takahiro.Kuwano@infineon.com>
Reviewed-by: Pratyush Yadav <p.yadav@ti.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2021-06-29 19:16:54 +05:30
Takahiro Kuwano
24b1e2c690 mtd: spi-nor-core: Add the ->ready() hook
For dual/quad die package devices from Spansion/Cypress, the device's
status needs to be checked by reading status registers in all dies, by
using Read Any Register command. To support this, a Flash specific hook
that can overwrite the legacy status check is needed.

Signed-off-by: Takahiro Kuwano <Takahiro.Kuwano@infineon.com>
Reviewed-by: Pratyush Yadav <p.yadav@ti.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2021-06-29 19:16:54 +05:30
Takahiro Kuwano
a4aa9b7522 mtd: spi-nor-core: Add support for volatile QE bit
Some of Spansion/Cypress chips support volatile version of configuration
registers and it is recommended to update volatile registers in the field
application due to a risk of the non-volatile registers corruption by
power interrupt. This patch adds a function to set Quad Enable bit in CFR1
volatile.

Signed-off-by: Takahiro Kuwano <Takahiro.Kuwano@infineon.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2021-06-29 19:16:54 +05:30
Takahiro Kuwano
2d20f34485 mtd: spi-nor-core: Add support for Read/Write Any Register
Some of Spansion/Cypress chips support Read/Write Any Register commands.
These commands are mainly used to write volatile registers and access to
the registers in second and subsequent die for multi-die package parts.

The Read Any Register instruction (65h) is followed by register address
and dummy cycles, then the selected register byte is returned.

The Write Any Register instruction (71h) is followed by register address
and register byte to write.

Signed-off-by: Takahiro Kuwano <Takahiro.Kuwano@infineon.com>
Reviewed-by: Pratyush Yadav <p.yadav@ti.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2021-06-29 19:16:54 +05:30
Takahiro Kuwano
c32bfe0cd9 mtd: spi-nor: Add Cypress manufacturer ID
This patch adds Cypress manufacturer ID (34h) definition.

Signed-off-by: Takahiro Kuwano <Takahiro.Kuwano@infineon.com>
Reviewed-by: Pratyush Yadav <p.yadav@ti.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2021-06-29 19:16:54 +05:30
Pratyush Yadav
f6adec1af4 mtd: spi-nor-core: Allow using Micron mt35xu512aba in Octal DTR mode
Since this flash doesn't have a Profile 1.0 table, the Octal DTR
capabilities are enabled in the post SFDP fixup, along with the 8D-8D-8D
fast read settings.

Enable Octal DTR mode with 20 dummy cycles to allow running at the
maximum supported frequency of 200Mhz.

Signed-off-by: Pratyush Yadav <p.yadav@ti.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2021-06-28 12:06:57 +05:30
Pratyush Yadav
ea9a22f7e7 mtd: spi-nor-core: Add support for Cypress Semper flash
The Cypress Semper flash is an xSPI compliant octal DTR flash. Add
support for using it in octal DTR mode.

The flash by default boots in a hybrid sector mode. Switch to uniform
sector mode on boot. Use the default 20 dummy cycles for a read fast
command.

The SFDP programming on some older versions of the flash was incorrect.
Fixes for that are included in the fixup hooks.

Signed-off-by: Pratyush Yadav <p.yadav@ti.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2021-06-28 12:06:43 +05:30
Pratyush Yadav
575caf4500 mtd: spi-nor-core: Perform a Soft Reset on shutdown
On probe, the SPI NOR core will put a flash in 8D-8D-8D mode if it
supports it. But Linux as of now expects to get the flash in 1S-1S-1S
mode. Handing the flash to Linux in Octal DTR mode means the kernel will
fail to detect the flash.

So, we need to reset to Power-on-Reset (POR) state before handing off
the flash. A Software Reset command can be used to do this.

One limitation of the soft reset is that it will restore state from
non-volatile registers in some flashes. This means that if the flash was
set to 8D mode in a non-volatile configuration, a soft reset won't help.
This commit assumes that we don't set any non-volatile bits anywhere,
and the flash doesn't have any non-volatile Octal DTR mode
configuration.

Since spi-nor-tiny doesn't (and likely shouldn't) have
spi_nor_soft_reset(), add a dummy spi_nor_remove() for it that does
nothing.

Signed-off-by: Pratyush Yadav <p.yadav@ti.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2021-06-28 12:04:53 +05:30
Pratyush Yadav
a1122a3d98 mtd: spi-nor-core: Detect Soft Reset sequence support from BFPT
A Soft Reset sequence will return the flash to Power-on-Reset (POR)
state. It consists of two commands: Soft Reset Enable and Soft Reset.
Find out if the sequence is supported from BFPT DWORD 16.

Signed-off-by: Pratyush Yadav <p.yadav@ti.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2021-06-28 12:04:30 +05:30
Pratyush Yadav
6b808e0864 mtd: spi-nor-core: Enable octal DTR mode when possible
Allow flashes to specify a hook to enable octal DTR mode. Use this hook
whenever possible to get optimal transfer speeds.

Signed-off-by: Pratyush Yadav <p.yadav@ti.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2021-06-28 12:03:57 +05:30
Pratyush Yadav
4d40e82663 mtd: spi-nor-core: Parse xSPI Profile 1.0 table
This table is indication that the flash is xSPI compliant and hence
supports octal DTR mode. Extract information like the fast read opcode,
the number of dummy cycles needed for a Read Status Register command,
and the number of address bytes needed for a Read Status Register
command.

The default dummy cycles for a fast octal DTR read are set to 20. Since
there is no simple way of determining the dummy cycles needed for the
fast read command, flashes that use a different value should update it
in their flash-specific hooks.

Signed-off-by: Pratyush Yadav <p.yadav@ti.com>
Acked-by: Jagan Teki <jagan@amarulasolutions.com>
2021-06-28 12:02:01 +05:30
Pratyush Yadav
95954f55e9 mtd: spi-nor-core: Add support for DTR protocol
Double Transfer Rate (DTR) is SPI protocol in which data is transferred
on each clock edge as opposed to on each clock cycle. Make
framework-level changes to allow supporting flashes in DTR mode.

Right now, mixed DTR modes are not supported. So, for example a mode
like 4S-4D-4D will not work. All phases need to be either DTR or STR.

Signed-off-by: Pratyush Yadav <p.yadav@ti.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2021-06-28 12:00:32 +05:30
Pratyush Yadav
71025f013c mtd: spi-nor-core: Rework hwcaps selection
The spi-mem layer provides a spi_mem_supports_op() function to check
whether a specific operation is supported by the controller or not.
This is much more accurate than the hwcaps selection logic based on
SPI_{RX,TX}_ flags.

Rework the hwcaps selection logic to use spi_mem_supports_op().

To make sure the build doesn't break for boards not using CONFIG_DM_SPI,
add a simple SPI_{RX,TX}_ based hwcaps selection logic in spi-mem-nodm
similar to spi_mem_default_supports_op(). This change is only
compile-tested.

To avoid SPL size problems on the x530 board, the old hwcaps selection
is still kept around. Leaving the code in-place was getting difficult to
read and understand, so the code is restructured to have it all in one
isolated function. As a result of this, the parameter hwcaps to
spi_nor_setup() is no longer needed. Remove it.

Based on the Linux commit c76f5089796a (mtd: spi-nor: Rework hwcaps
selection for the spi-mem case, 2019-08-06)

Signed-off-by: Pratyush Yadav <p.yadav@ti.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2021-06-28 11:59:35 +05:30
Pratyush Yadav
8702188ce5 mtd: spi-nor-core: Introduce flash-specific fixup hooks
Sometimes the information in a flash's SFDP tables is wrong. Sometimes
some information just can't be expressed in the SFDP table. So,
introduce the fixup hooks to allow tailoring settings for a specific
flash.

Three hooks are added: default_init, post_sfdp, and post_bfpt. These
allow tweaking the flash settings at different point in the probe
sequence. Since the hooks reside in nor->info, set that value just
before the call to spi_nor_init_params().

The hooks and at what points they are executed mimics Linux's spi-nor
framework. One major difference is that Linux puts the struct
spi_nor_fixups in nor->info. This is not possible in U-Boot because the
spi-nor-ids list is shared between spi-nor-core.c and spi-nor-tiny.c.
Since spi-nor-tiny shouldn't have those fixup hooks populated, add a
separate function that lets flashes populate their fixup hooks.

Signed-off-by: Pratyush Yadav <p.yadav@ti.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2021-06-28 11:59:10 +05:30
Pratyush Yadav
18b0de0f3b mtd: spi-nor-core: Add a ->setup() hook
nor->setup() can be used by flashes to configure settings in case they
have any peculiarities that can't be easily expressed by the generic
spi-nor framework. This includes things like different opcodes, dummy
cycles, page size, uniform/non-uniform sector sizes, etc.

Move related declarations to avoid forward declarations.

Inspired by the Linux kernel's setup() hook.

Signed-off-by: Pratyush Yadav <p.yadav@ti.com>
Acked-by: Jagan Teki <jagan@amarulasolutions.com>
2021-06-28 11:58:10 +05:30
Marek Behún
dc339bf784 mtd: add support for parsing partitions defined in OF
Add support for parsing partitions defined in device-trees via the
`partitions` node with `fixed-partitions` compatible.

The `mtdparts`/`mtdids` mechanism takes precedence. If some partitions
are defined for a MTD device via this mechanism, the code won't register
partitions for that MTD device from OF, even if they are defined.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com>
Tested-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Heiko Schocher <hs@denx.de>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
2021-06-24 11:53:15 +05:30
Tero Kristo
fc960cb6fb clk: fixed_rate: add API for directly registering fixed rate clocks
Current driver only supports registering fixed rate clocks from DT. Add
new API which makes it possible to register fixed rate clocks directly
from e.g. platform specific clock drivers.

Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tero Kristo <kristo@kernel.org>
2021-06-11 16:34:52 +05:30
Tero Kristo
7d0f3fbb93 lib: rational: copy the rational fraction lib routines from Linux
Copy the best rational approximation calculation routines from Linux.
Typical usecase for these routines is to calculate the M/N divider
values for PLLs to reach a specific clock rate.

This is based on linux kernel commit:
"lib/math/rational.c: fix possible incorrect result from rational
fractions helper"
(sha1: 323dd2c3ed0641f49e89b4e420f9eef5d3d5a881)

Signed-off-by: Tero Kristo <t-kristo@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Tero Kristo <kristo@kernel.org>
2021-06-11 16:34:52 +05:30
Marek Behún
998929b535 compiler.h: align the __ADDRESSABLE macro with Linux' version
Use UNIQUE_ID in the __ADDRESSABLE macro.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2021-05-24 14:21:30 -04:00
Marek Behún
236f2ec432 treewide: Convert macro and uses of __section(foo) to __section("foo")
This commit does the same thing as Linux commit 33def8498fdd.

Use a more generic form for __section that requires quotes to avoid
complications with clang and gcc differences.

Remove the quote operator # from compiler_attributes.h __section macro.

Convert all unquoted __section(foo) uses to quoted __section("foo").
Also convert __attribute__((section("foo"))) uses to __section("foo")
even if the __attribute__ has multiple list entry forms.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-05-24 14:21:30 -04:00
Vignesh Raghavendra
f1e97c7058 soc: ti: k3-navss-ringacc: Remove unused ring modes
With AM64x supporting only K3_NAV_RINGACC_RING_MODE_RING or the exposed
ring mode, all other K3 SoCs have also been moved to this common
baseline. Therefore drop other modes such as
K3_NAV_RINGACC_RING_MODE_MESSAGE (and proxy) to save on SPL footprint.

There is a saving of ~800 bytes with this change for am65x_evm_r5_defconfig.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com>
2021-05-12 16:36:38 +05:30
Vignesh Raghavendra
c409b4932d soc: ti: k3-navss-ringacc: Add AM64 ringacc support
AM64 dual mode rings are modeled as pair of Rings objects which has common
configuration and memory buffer, but separate real-time control register
sets for each direction mem2dev (forward) and dev2mem (reverse).

AM64 rings must be requested only using k3_ringacc_request_rings_pair(),
and forward ring must always be initialized/configured. After this any
other Ringacc APIs can be used without any callers changes.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2021-05-12 16:36:38 +05:30
Vignesh Raghavendra
91f1e792fe firmware: ti_sci: Update ti_sci_cmd_rm_udmap_tx_ch_cfg() API to the latest
Update struct ti_sci_msg_rm_udmap_tx_ch_cfg_req to latest ABI to support
AM64x BCDMA Block copy channels.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2021-05-12 16:36:38 +05:30
Igor Opaniuk
b7135b034f psci: add features/reset2 support
Adds support for:
* PSCI_FEATURES, which was introduced in PSCI 1.0. This provides API
that allows discovering whether a specific PSCI function is implemented
and its features.
* SYSTEM_RESET2, which was introduced in PSCI 1.1, which extends existing
SYSTEM_RESET. It provides support for vendor-specific resets, providing
reset_type as an additional param.

For additional details visit [1].

Implementations of some functions were borrowed from Linux PSCI driver
code [2].

[1] https://developer.arm.com/documentation/den0022/latest/
[2] drivers/firmware/psci/psci.c

Signed-off-by: Igor Opaniuk <igor.opaniuk@foundries.io>
2021-04-20 07:31:12 -04:00
Igor Opaniuk
2963d606bc psci: add v1.0/v1.1 definitions from Linux
Sync and add PSCI API versions 1.0/1.1 definitions from Linux.

Signed-off-by: Igor Opaniuk <igor.opaniuk@foundries.io>
2021-04-20 07:31:12 -04:00
Sean Anderson
9af869c414 lib: string: Implement strlcat
This introduces strlcat, which provides a safer interface than strncat. It
never copies more than its size bytes, including the terminating nul. In
addition, it never reads past dest[size - 1], even if dest is not
nul-terminated.

This also removes the stub for dwc3 now that we have a proper
implementation.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-04-12 17:44:55 -04:00
Siew Chin Lim
96fe4f6485 arm: socfpga: smc: Add function to get usercode
Add function to send mailbox command via SMC to get usercode from SDM.

Signed-off-by: Siew Chin Lim <elly.siew.chin.lim@intel.com>
Reviewed-by: Ley Foon Tan <ley.foon.tan@intel.com>
2021-04-08 17:29:13 +08:00
Siew Chin Lim
4e521e1430 arm: socfpga: smc: Remove unused SMC function ID
Remove unused SMC function ID 61 and 62.

Signed-off-by: Siew Chin Lim <elly.siew.chin.lim@intel.com>
Reviewed-by: Ley Foon Tan <ley.foon.tan@intel.com>
2021-04-08 17:29:11 +08:00
Simon Glass
4ddc91b32f clk: fixed-rate: Export driver parts for OF_PLATDATA_INST
We need to allow SoCs to create their own drivers for this so that they
can use their own of-platdata structs. To minimise code duplication,
export the driver operations and the ofdata_to_plat() setup function.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
2021-03-26 17:03:08 +13:00
Heinrich Schuchardt
e86ad666d0 log: convert pr_*() to logging
In drivers we use a family of printing functions including pr_err() and
pr_cont(). CONFIG_LOGLEVEL is used to control which of these lead to output
via printf().

Our logging functions allow finer grained control of output. So replace
printf() by the matching logging functions. The usage of CONFIG_LOGLEVEL
remains unchanged.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-03-01 09:54:11 -05:00
Sean Anderson
a95d878ade mtd: spi-nor-core: Fix typo in documentation
This line should come before the docs for the next function.

Fixes: 7aeedac015 ("mtd: spi: Port SPI NOR framework from Linux")

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Pratyush Yadav <p.yadav@ti.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2021-02-26 15:48:42 +05:30
Bin Meng
6770c96fe5 mtd: spi-nor.h: Change spaces to tabs
U-Boot coding convention prefers tabs over spaces.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2021-02-26 13:30:11 +05:30
Dario Binacchi
ecec33faa1 clk: remove a redundant header
The linux/err.h header file was included twice.

Signed-off-by: Dario Binacchi <dariobin@libero.it>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-02-22 11:39:49 +05:30