Commit graph

46 commits

Author SHA1 Message Date
Kumar Gala
a832ac4107 powerpc/85xx: Bump up the CONFIG_SYS_BOOTM_LEN to 64M on FSL 85xx boards
CONFIG_SYS_BOOTMAPSZ has been 64M on these boards for some time so we
should also allow the kernel image to be up to 64M decompressed.  This
also matches what we pass to the OS based on the ePAPR specification.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-04-29 07:36:18 -05:00
Priyanka Jain
c62a6cfb94 powerpc/85xx: Enable eSPI support for p1_p2_rdb
Also added support to save env to spi flash in case of SPIBOOT.

Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-04-29 07:36:17 -05:00
Ramneek Mehresh
2bad42a0c8 powerpc/85xx: Add support for 2nd USB controller on p1_p2_rdb
Second USB controller only works for SPI and SD boot because of pin muxing

Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com>
2011-04-27 22:29:03 -05:00
Priyanka Jain
e59a93e7e8 powerpc/85xx: Add support to save environment in SD card on p1_p2_rdb
If we boot from a SD card use it for the environment as well.

Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com>
Signed-off-by: Poonam Aggrwal <Poonam.Aggrwal@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-04-27 22:29:03 -05:00
Matthew McClintock
a3055c587d powerpc/85xx: rename NAND prefixes to CONFIG_SYS
renaming 85xx define CONFIG_NAND_OR_PRELIM to CONFIG_SYS_NAND_OR_PRELIM
and CONFIG_NAND_BR_PRELIM to CONFIG_SYS_NAND_BR_PRELIM to use the more
appropriate CONFIG_SYS prefix as well as be consistent with 83xx.

Signed-off-by: Matthew McClintock <msm@freescale.com>
cc: Scott Wood <scottwood@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-04-08 02:50:57 -05:00
Poonam Aggrwal
e0082f7cb4 powerpc/85xx: Add 36-bit physical addressing support for P1_P2_RDB
Add support for 36-bit address map for NOR, SD, and SPI boot cfgs.

Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Priyanka Jain <priyanka.jain@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-04-04 09:24:42 -05:00
Priyanka Jain
cac29f25fd powerpc/85xx: Read board switch settings on p1_p2_rdb
PCA9557 is parallel I/O expansion device on I2C bus which stores various
board switch settings like NOR Flash-Bank selection, SD Data width.

On board:
switch SW5[6] is to select width for eSDHC
        ON  - 4-bit [Enable eSPI]
        OFF - 8-bit [Disable eSPI]

switch SW4[8] is to select NOR Flash Bank for Booting
        OFF - Primary Bank
        ON  - Secondary Bank

Read board switch settings on p1_p2_rdb and configure corresponding
eSDHC width.

Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com>
Signed-off-by: Dipen Dudhat <dipen.dudhat@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-04-04 09:24:42 -05:00
Priyanka Jain
0c871e952e powerpc/85xx: Use DDR for RAMBOOT instead of L2 SRAM on p1_p2_rdb
Using DDR as RAMBOOT base instead of L2SRAM for SDCard and SPI Flash
boot loaders because:
- P1_P2_RDB boards have soldered DDR so no need for SPD
- Also P102x has 256K L2 cache size so becomes a limiting factor for
  size of image that could be loaded in SRAM mode and would require three
  stage boot loader (TPL).

Changes done:
 1. CONFIG_SYS_TEXT_BASE to 0x11000000
 2. CONFIG_RESET_VECTOR_ADDRESS to 0x1107fffc

Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com>
Signed-off-by: Poonam Aggrwal <Poonam.Aggrwal@freescale.com>
Signed-off-by: Dipen Dudhat <Dipen.Dudhat@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-04-04 09:24:42 -05:00
Poonam Aggrwal
09f9ee1695 powerpc/85xx: Use BR_PHYS_ADDR macro to setup BRs on P1_P2_RDB
Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-04-04 09:24:41 -05:00
Kumar Gala
00203c6464 powerpc/85xx: Remove config.mk for nand linker script
Move the include of mpc85xx/u-boot-nand.lds to utilize
CONFIG_SYS_LDSCRIPT rather than having an explicit config.mk

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-04-04 09:24:40 -05:00
Prabhakar Kushwaha
b0c5ceb305 powerpc/85xx: Fix PCI memory map setup on P1_P2_RDB
Update the PCIe address map to match standard FSL memory map.
Additionally, fix the TLBs so the cover the PCIe address space properly
so cards plugged in like an e1000 work correctly.

Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-03-24 09:46:21 -05:00
Priyanka Jain
b1d67857af powerpc/85xx: corrected p1_p2_rdb EEPROM address
Board EEPROM is used to read/save Ethernet MAC addresses.

Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-02-09 23:47:52 -06:00
Prabhakar Kushwaha
b707090432 ppc/85xx: Fix compile err when PCI disabled on P1_P2_RDB
u-boot cannot be compiled after disabling CONFIG_PCI.

Place PCI related codes under #ifdef CONFIG_PCI

Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-01-19 22:58:24 -06:00
Kumar Gala
7a577fda22 powerpc/85xx: Move RESET_VECTOR_ADDRESS into config.h
Rather than defining it config.mk we can set it in config.h and remove
config.mk from several boards that don't need it.

We mimic what 4xx does and introduce CONFIG_RESET_VECTOR_ADDRESS for
config.h to set.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Acked-by: Wolfgang Denk <wd@denx.de>
2011-01-19 22:58:23 -06:00
Kumar Gala
7c57f3e859 powerpc/85xx: Bump up the CONFIG_SYS_BOOTM_LEN to 16M on FSL 85xx boards
CONFIG_SYS_BOOTMAPSZ has been 16M on these boards for some time so we
should also allow the kernel image to be up to 16M decompressed.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-01-14 01:32:22 -06:00
Kumar Gala
06eb4d8c68 powerpc/85xx: Rework P1_P2_RDB pci_init_board to use common FSL PCIe code
Remove duplicated code in P1_P2_RDB boards and utilize the common
fsl_pcie_init_board().  We also now dynamically setup the LAWs for PCI
controllers based on which PCIe controllers are enabled.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-01-14 01:32:20 -06:00
Becky Bruce
810c442749 85xx boards: Rename CONFIG_DDR_DLL to CONFIG_SYS_FSL_ERRATUM_DDR_MSYNC_IN
This config option is for an erratum workaround; rename it to be more
clear.  Also, drop it from config files don't need it and were
undefining it.

Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-01-14 01:32:19 -06:00
Kumar Gala
72c96a6802 tsec: Revert to setting TBICR_ANEG_ENABLE by default for SGMII
The following commit:

commit 46e91674fb
Author: Peter Tyser <ptyser@xes-inc.com>
Date:   Tue Nov 3 17:52:07 2009 -0600

    tsec: Force TBI PHY to 1000Mbps full duplex in SGMII mode

Removed setting Auto-Neg by default, however this is believed to be
proper default configuration for initialization of the TBI interface.

Instead we explicitly set CONFIG_TSEC_TBICR_SETTINGS for the
XPedite5370 & XPedite5500 boards that use a Broadcomm PHY which require
Auto-Neg to be disabled to function properly.

This addresses a breakage on the P2020 DS & MPC8572 DS boards when used
with an SGMII riser card.  We also remove setting
CONFIG_TSEC_TBICR_SETTINGS on the P1_P2_RDB family of boards as now the
default setting is sufficient for them.

Additionally, we clean up the code a bit to remove an unnecessary second
define.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Acked-by: Peter Tyser <ptyser@xes-inc.com>
Tested-by: Peter Tyser <ptyser@xes-inc.com>
2010-12-13 09:32:15 -06:00
Kumar Gala
a55bb8340b powerpc/85xx: Introduce CONFIG_SYS_EXTRA_ENV_RELOC
Some systems need to relocate the env_addr pointer early because the
location it points to will get invalidated before env_relocate is
called.  One example is on systems that might use a L2 or L3 cache
in SRAM mode and initialize that cache from SRAM mode back to being
a cache in cpu_init_r.

We set this on the 85xx boards that have support for NAND, SPI, or
SDHC/MMC boot support as they use a secondary cache in SRAM mode and
need the env_addr pointer relocated since we change from SRAM to normal
cache mode in cpu_init_r.

Also removed CONFIG_SYS_SPL as its not used anywhere.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-11-30 22:09:09 +01:00
Priyanka Jain
39c2a6eb75 p1_p2_rdb: to set SQW/INT pin of RTC as INT line
SQW/INT pin in RTC can be used for generating square wave(by default) or
as interrupt line.  U-boot is registering this pin for interrupts.
Configuring SQW/INT bit as interrupt line during board initialization
to avoid spurious interrupts generated by square wave.

Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-11-12 09:45:11 -06:00
Haiying Wang
96196a1f75 powerpc/85xx: add CONFIG_SYS_TEXT_BASE_SPL for 85xx nand spl build
Introduce a SPL specific CONFIG_SYS_TEXT_BASE_SPL define to be used by
the linker.  This has similiar semantics to CONFIG_SYS_TEXT_BASE however
since SPL is a unqiue image we introduce a new variable to control its
text base address.

Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-11-12 08:51:36 -06:00
Wolfgang Denk
25ddd1fb0a Replace CONFIG_SYS_GBL_DATA_SIZE by auto-generated value
CONFIG_SYS_GBL_DATA_SIZE has always been just a bad workarond for not
being able to use "sizeof(struct global_data)" in assembler files.
Recent experience has shown that manual synchronization is not
reliable enough.  This patch renames CONFIG_SYS_GBL_DATA_SIZE into
GENERATED_GBL_DATA_SIZE which gets automatically generated by the
asm-offsets tool.  In the result, all definitions of this value can be
deleted from the board config files.  We have to make sure that all
files that reference such data include the new <asm-offsets.h> file.

No other changes have been done yet, but it is obvious that similar
changes / simplifications can be done for other, related macro
definitions as well.

Signed-off-by: Wolfgang Denk <wd@denx.de>
Acked-by: Kumar Gala <galak@kernel.crashing.org>
2010-10-26 21:05:30 +02:00
Wolfgang Denk
553f09823c Rename CONFIG_SYS_INIT_RAM_END into CONFIG_SYS_INIT_RAM_SIZE
CONFIG_SYS_INIT_RAM_END was a misnomer as it suggests this might be
some end address; to make the meaning more clear we rename it into
CONFIG_SYS_INIT_RAM_SIZE

No other code changes are performed in this patch, only minor editing
of white space (due to the changed length) and the comments was done,
where noticed.

Note that the code for the PATI and cmi_mpc5xx board configurations
looks seriously broken.  Last known maintainers on Cc:

Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Denis Peter <d.peter@mpl.ch>
Cc: Martin Winistoerfer <martinwinistoerfer@gmx.ch>
Acked-by: Kumar Gala <galak@kernel.crashing.org>
2010-10-26 21:03:25 +02:00
Peter Tyser
d98b0523cf powerpc: Cleanup BOOTFLAG_* references
Now that warm booting is not supported, there isn't a need for the
BOOTFLAG_COLD and BOOTFLAG_WARM defines, so remove them.

Note that this change makes the board info bd_bootflags field useless.
It will always be set to 0, but we leave it around so that we don't
break the board info structure that some OSes are expecting to be passed
from U-Boot.

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
2010-10-18 22:38:56 +02:00
Wolfgang Denk
2ae1824196 Makefile: move all Power Architecture boards into boards.cfg
Clean up Makefile, and drop a lot of the config.mk files on the way.

We now also automatically pick all boards that are listed in
boards.cfg (and with all configurations), so we can drop the redundant
entries from MAKEALL to avoid building these twice.

Signed-off-by: Wolfgang Denk <wd@denx.de>
2010-10-18 22:12:04 +02:00
Wolfgang Denk
14d0a02a16 Rename TEXT_BASE into CONFIG_SYS_TEXT_BASE
The change is currently needed to be able to remove the board
configuration scripting from the top level Makefile and replace it by
a simple, table driven script.

Moving this configuration setting into the "CONFIG_*" name space is
also desirable because it is needed if we ever should move forward to
a Kconfig driven configuration system.

Signed-off-by: Wolfgang Denk <wd@denx.de>
2010-10-18 22:07:10 +02:00
Wolfgang Denk
d24f2d321d mkconfig: change CONFIG_MK_ prefix into plain CONFIG_
When planning for more generalization and Makefile cleanup it became
obvious that the introduction of a separate CONFIG_MK_ name space for
config options that were set through scripting in the Makefile was
not a good idea.

Originally the idea was to provide a script-free approach to supply
configuration options - there was no real need for a separate name
space. But when we now convert the existing Makefile entries to make
use of this approach, it would mean that we have to touch a large
number of board config files and add #ifdef / #define sequences to
"convert" from the CONFIG_MK_ to the CONFIG_ name space.

It seems much cleaner to get rid of this somewhat arbitrary _MK
string now for the few boards that actually use it.

Signed-off-by: Wolfgang Denk <wd@denx.de>
Acked-by: Mike Frysinger <vapier@gentoo.org>
2010-10-18 22:01:21 +02:00
Stefan Roese
24956642ef Remove unused CONFIG_SERIAL_SOFTWARE_FIFO feature
This patch removes the completely unused CONFIG_SERIAL_SOFTWARE_FIFO
feature from U-Boot. It has only been implemented for PPC4xx and was not
used at all. So let's remove it and make the code smaller and cleaner.

Signed-off-by: Stefan Roese <sr@denx.de>
Acked-by: Detlev Zundel <dzu@denx.de>
2010-09-23 09:02:05 +02:00
Kim Phillips
5be58f5fc8 powerpc/85xx: configure autocompletion support
because it's convenient.

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-08-01 11:18:44 -05:00
Kumar Gala
99d9c07edc powerpc/85xx: Move PCI/PCIe address defines into common immap_85xx.h
Remove dupliacted setting of PCI/PCIe address and offsets in board
config.h.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-07-20 04:37:11 -05:00
Poonam Aggrwal
ddac6f08db 85xx/p1_p2_rdb: PCIe E1000 card support added.
Enables the Intel Pro/1000 PT Gb Ethernet PCI-E Network Adapter
configuration support for P1/P2 RDB.

Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-07-16 10:55:10 -05:00
Becky Bruce
199e262eb3 mpc85xx: Add reginfo command
The new command dumps the TLBCAM, the LAWs, and the BR/OR regs.
Add CONFIG_CMD_REGINFO to the config for all MPC85xx parts.

Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-07-16 10:55:09 -05:00
Poonam Aggrwal
525f6c3add 85xx/p1_p2_rdb: enable hwconfig
Signed-off-by: Vivek Mahajan <vivek.mahajan@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-07-16 10:55:08 -05:00
Felix Radensky
90b5bf211b tsec: Fix eTSEC2 link problem on P2020RDB
On P2020RDB eTSEC2 is connected to Vitesse VSC8221 PHY via SGMII.
Current TBI PHY settings for SGMII mode cause link problems on
this platform, link never comes up.

Fix this by making TBI PHY settings configurable and add a working
configuration for P2020RDB.

Signed-off-by: Felix Radensky <felix@embedded-sol.com>
Acked-by: Andy Fleming <afleming@freescale.com>
2010-06-29 21:02:16 +02:00
Poonam Aggrwal
cdc6363f42 85xx/p1_p2_rdb: not able to modify "$bootfile" environment variable
Because the variable was getting defined twice.

Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Acked-by: Andy Fleming <afleming@freescale.com>
2010-06-29 20:48:25 +02:00
Kumar Gala
933419096e ppc/85xx: Use CONFIG_NS16550_MIN_FUNCTIONS to reduce NAND_SPL size
The MPC8536DS_NAND SPL build was failing due to code size increase
introduced by commit:

commit 33f57bd553
Author: Kumar Gala <galak@kernel.crashing.org>
Date:   Fri Mar 26 15:14:43 2010 -0500

    85xx: Fix enabling of L1 cache parity on secondary cores

We built in some NS16550 functions that we dont need and can get
rid of them via CONFIG_NS16550_MIN_FUNCTIONS.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-04-07 01:34:39 -05:00
Vivek Mahajan
66e821ebe9 85xx/p1_p2_rdb: enable hwconfig
Signed-off-by: Vivek Mahajan <vivek.mahajan@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-01-25 22:14:40 -06:00
Kumar Gala
783852e467 ppc/85xx: Remove CONFIG_SYS_DDR_TLB_START
Now that we dynamically determine TLB CAM entries to use we dont need
CONFIG_SYS_DDR_TLB_START anymore.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-01-05 13:49:08 -06:00
Heiko Schocher
4b142febff common: delete CONFIG_SYS_64BIT_VSPRINTF and CONFIG_SYS_64BIT_STRTOUL
There is more and more usage of printing 64bit values,
so enable this feature generally, and delete the
CONFIG_SYS_64BIT_VSPRINTF and CONFIG_SYS_64BIT_STRTOUL
defines.

Signed-off-by: Heiko Schocher <hs@denx.de>
2009-12-08 22:14:07 +01:00
Wolfgang Denk
4946775c6d Coding Style cleanup; update CHANGELOG, prepare -rc1
Signed-off-by: Wolfgang Denk <wd@denx.de>
2009-10-28 00:49:47 +01:00
Dipen Dudhat
fad15096e3 ppc/P1_P2_RDB: On-chip BootROM support
On Chip BootROM support for P1 and P2 series RDB platforms.

This patch is derived from latest On Chip BootROM support on MPC8536DS

Signed-off-by: Dipen Dudhat <dipen.dudhat@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-10-16 10:21:39 -05:00
Dipen Dudhat
f7780ec977 ppc/P1_P2_RDB: NAND Boot Support
NAND Boot support for P1 and P2 series RDB platforms.

This patch is derived from NAND Boot support on MPC8536DS.

Signed-off-by: Dipen Dudhat <dipen.dudhat@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-10-16 10:21:39 -05:00
Kumar Gala
62ca21c442 ppc/85xx: Simplify the top makefile for P1_P2_RDB boards
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-09-24 12:04:58 -05:00
Poonam Aggrwal
33f3f34255 85xx: Added PCIe support for P1 P2 RDB
Call fsl_pci_init_port() to initialize all the PCIe ports on the board.

Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-08-28 17:12:46 -05:00
Kumar Gala
ef41f2a25c 85xx: Removed BEDBUG support on P1_P2_RDB
To match all other 85xx platforms we are removing BEDBUG support.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-08-28 17:12:40 -05:00
Poonam Aggrwal
728ece343e 85xx: Add support for P2020RDB board
The code base adds P1 & P2 RDB platforms support.
The folder and file names can cater to future SOCs of P1/P2 family.
P1 & P2 processors are 85xx platforms, part of Freescale QorIQ series.

Tested following on P2020RDB:
1. eTSECs
2. DDR, NAND, NOR, I2C.

Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-08-28 17:12:38 -05:00