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tsec: Revert to setting TBICR_ANEG_ENABLE by default for SGMII
The following commit:
commit 46e91674fb
Author: Peter Tyser <ptyser@xes-inc.com>
Date: Tue Nov 3 17:52:07 2009 -0600
tsec: Force TBI PHY to 1000Mbps full duplex in SGMII mode
Removed setting Auto-Neg by default, however this is believed to be
proper default configuration for initialization of the TBI interface.
Instead we explicitly set CONFIG_TSEC_TBICR_SETTINGS for the
XPedite5370 & XPedite5500 boards that use a Broadcomm PHY which require
Auto-Neg to be disabled to function properly.
This addresses a breakage on the P2020 DS & MPC8572 DS boards when used
with an SGMII riser card. We also remove setting
CONFIG_TSEC_TBICR_SETTINGS on the P1_P2_RDB family of boards as now the
default setting is sufficient for them.
Additionally, we clean up the code a bit to remove an unnecessary second
define.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Acked-by: Peter Tyser <ptyser@xes-inc.com>
Tested-by: Peter Tyser <ptyser@xes-inc.com>
This commit is contained in:
parent
ac8983bcba
commit
72c96a6802
4 changed files with 24 additions and 13 deletions
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@ -5,7 +5,7 @@
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* terms of the GNU Public License, Version 2, incorporated
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* herein by reference.
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*
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* Copyright 2004-2009 Freescale Semiconductor, Inc.
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* Copyright 2004-2010 Freescale Semiconductor, Inc.
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* (C) Copyright 2003, Motorola, Inc.
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* author Andy Fleming
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*
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@ -292,13 +292,12 @@ static uint tsec_local_mdio_read(volatile tsec_mdio_t *phyregs,
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/* By default force the TBI PHY into 1000Mbps full duplex when in SGMII mode */
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#ifndef CONFIG_TSEC_TBICR_SETTINGS
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#define TBICR_SETTINGS ( \
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#define CONFIG_TSEC_TBICR_SETTINGS ( \
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TBICR_PHY_RESET \
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| TBICR_ANEG_ENABLE \
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| TBICR_FULL_DUPLEX \
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| TBICR_SPEED1_SET \
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)
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#else
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#define TBICR_SETTINGS CONFIG_TSEC_TBICR_SETTINGS
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#endif /* CONFIG_TSEC_TBICR_SETTINGS */
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/* Configure the TBI for SGMII operation */
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@ -311,7 +310,7 @@ static void tsec_configure_serdes(struct tsec_private *priv)
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tsec_local_mdio_write(priv->phyregs_sgmii, priv->regs->tbipa, TBI_TBICON,
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TBICON_CLK_SELECT);
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tsec_local_mdio_write(priv->phyregs_sgmii, priv->regs->tbipa, TBI_CR,
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TBICR_SETTINGS);
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CONFIG_TSEC_TBICR_SETTINGS);
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}
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/* Discover which PHY is attached to the device, and configure it
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@ -437,14 +437,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
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#define CONFIG_PHY_GIGE 1 /* Include GbE speed/duplex detection */
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/* TBI PHY configuration for SGMII mode */
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#define CONFIG_TSEC_TBICR_SETTINGS ( \
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TBICR_PHY_RESET \
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| TBICR_ANEG_ENABLE \
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| TBICR_FULL_DUPLEX \
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| TBICR_SPEED1_SET \
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)
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#endif /* CONFIG_TSEC_ENET */
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/*
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@ -375,6 +375,16 @@ extern unsigned long get_board_ddr_clk(unsigned long dummy);
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#define CONFIG_MII_DEFAULT_TSEC 1 /* Allow unregistered phys */
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#define CONFIG_ETHPRIME "eTSEC2"
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/*
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* In-band SGMII auto-negotiation between TBI and BCM5482S PHY fails, force
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* 1000mbps SGMII link
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*/
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#define CONFIG_TSEC_TBICR_SETTINGS ( \
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TBICR_PHY_RESET \
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| TBICR_FULL_DUPLEX \
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| TBICR_SPEED1_SET \
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)
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#define CONFIG_TSEC1 1
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#define CONFIG_TSEC1_NAME "eTSEC1"
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#define TSEC1_FLAGS (TSEC_GIGABIT | TSEC_REDUCED)
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@ -345,6 +345,16 @@ extern unsigned long get_board_ddr_clk(unsigned long dummy);
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#define CONFIG_MII_DEFAULT_TSEC 1 /* Allow unregistered phys */
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#define CONFIG_ETHPRIME "eTSEC2"
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/*
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* In-band SGMII auto-negotiation between TBI and BCM5482S PHY fails, force
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* 1000mbps SGMII link
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*/
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#define CONFIG_TSEC_TBICR_SETTINGS ( \
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TBICR_PHY_RESET \
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| TBICR_FULL_DUPLEX \
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| TBICR_SPEED1_SET \
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)
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#define CONFIG_TSEC1 1
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#define CONFIG_TSEC1_NAME "eTSEC1"
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#define TSEC1_FLAGS (TSEC_GIGABIT | TSEC_REDUCED)
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