Commit graph

40132 commits

Author SHA1 Message Date
Masahiro Yamada
f666a65824 ARM: uniphier: remove unneeded CONFIG_USB_MAX_CONTROLLER_COUNT define
ARCH_UNIPHIER selects DM_USB, where CONFIG_USB_MAX_CONTROLLER_COUNT
is not used.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2016-10-18 14:06:46 +09:00
Masahiro Yamada
0bd203bbd1 ARM: uniphier: fix addresses of Cortex-A72 gear setting macros
My mistake during copy-paste work.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-10-18 14:06:46 +09:00
Masahiro Yamada
935e09cdcb pinctrl: uniphier: fix unused-const-variable warnings for GCC 6.x
Marek reports warnings in UniPhier pinctrl drivers when compiled by
GCC 6.x, like:

  drivers/pinctrl/uniphier/pinctrl-uniphier-ld20.c:58:18: warning:
  'usb3_muxvals' defined but not used [-Wunused-const-variable=]
   static const int usb3_muxvals[] = {0, 0};
                    ^~~~~~~~~~~~

My intention here is to compile minimum set of pin data for SPL to
save memory footprint, but GCC these days is clever enough to notice
unused data arrays.

We can fix it by sprinkling around __maybe_unused on those arrays,
but I did not do that because they are counterparts of the pinctrl
drivers in Linux.  All the pin data were just copy-pasted from Linux
and are kept in sync for maintainability.

I chose a bit tricky way to fix the issue; calculate ARRAY_SIZE of
*_pins and *_muxvals and set their sum to an unused struct member.
This trick will satisfy GCC because the data arrays are used anyway,
but such data arrays will be dropped from the final binary because
the pointers to them are not used.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reported-by: Marek Vasut <marex@denx.de>
2016-10-18 14:06:46 +09:00
Tom Rini
d5a815327d Prepare v2016.11-rc2
Signed-off-by: Tom Rini <trini@konsulko.com>
2016-10-17 20:09:33 -04:00
Tom Rini
78ad715788 Merge git://git.denx.de/u-boot-mpc85xx 2016-10-15 13:03:19 -04:00
Heiko Schocher
ebf7fff20a spl: move FDT_FIXUP_PARTITIONS to Kconfig
Move FDT_FIXUP_PARTITIONS to Kconfig and cleanup existing
uses.

Signed-off-by: Heiko Schocher <hs@denx.de>
2016-10-15 08:12:46 -04:00
Heiko Schocher
29d3bc793c spl: move SYS_OS_BASE to Kconfig
Move SYS_OS_BASE to Kconfig and cleanup existing
uses.

Signed-off-by: Heiko Schocher <hs@denx.de>
[trini: Also migrate a4m2k]
Signed-off-by: Tom Rini <trini@konsulko.com>
2016-10-15 08:12:27 -04:00
Heiko Schocher
c20ae2ffaa spl: move SPL_OS_BOOT to Kconfig
Move SPL_OS_BOOT to Kconfig and cleanup existing
uses.

Signed-off-by: Heiko Schocher <hs@denx.de>
2016-10-14 21:11:33 -04:00
Tom Rini
2b2c6e51e7 test/py/tests/test_sleep.py: Add check for CONFIG_CMD_MISC
We can only run this command if the sleep command is enabled and that
depends on CONFIG_CMD_MISC

Signed-off-by: Tom Rini <trini@konsulko.com>
2016-10-14 19:12:31 -04:00
Masahiro Yamada
2fe1281c79 ARM: create .secure_stack section only for PSCI
Jon Master reports that QEMU refuses to load a U-Boot image built
with CONFIG_ARMV7_NONSEC, but without CONFIG_ARMV7_PSCI since
commit 5a3aae68c7 ("ARM: armv7: guard memory reserve for PSCI
with #ifdef CONFIG_ARMV7_PSCI").

It looks like only PSCI that needs the Secure stack, so move
the #ifdef to guard the whole of .secure_stack allocation in order
not to create the empty section.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reported-by: Jon Masters <jcm@redhat.com>
Link: http://patchwork.ozlabs.org/patch/664025/
2016-10-14 16:18:34 -04:00
Prabhakar Kushwaha
a9320c495e arch: powerpc: Remove unused dts frequency fixup for lbc_clk
lbc_clk is used to fixup dts as "bus frequency".
It is not being used by Linux IFC and eLBC driver.

So remove unused "bus frqeuency" fix-up of devicre tree.

Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2016-10-14 10:23:11 -07:00
Zhao Qiang
c5938c10ef pbl: use "wait" command instead of "flush" command
PBL flush command is restricted to CCSR memory space. So use WAIT
PBI command to provide enough time for data to get flush in
target memory.

Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
[York Sun: rewrap commit message]
Reviewed-by: York Sun <york.sun@nxp.com>
2016-10-14 10:21:30 -07:00
Zhao Qiang
ec90ac7359 Txxx/RCW: Split unified RCW to RCWs for sd, spi and nand.
T series boards use unified RCW for sd, spi and nand boot.
Now split txxx_rcw.cfg to txxx_sd_rcw.cfg, txxx_spi_rcw.cfg
and txxx_nand_rcw.cfg for SPI/NAND/SD boot.
And modify RCW[PBI_SRC] for them:
	PBI_SRC=5            for SPI 24-bit addressing
	PBI_SRC=6            for SD boot
	PBI_SRC=14           for IFC NAND boot

Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2016-10-14 10:21:03 -07:00
Tom Rini
4504062b27 Merge git://git.denx.de/u-boot-fdt 2016-10-13 20:03:33 -04:00
Simon Glass
42b7600d62 libfdt: Drop inlining of fdt_path_offset()
The fdt_path_offset() function is not inlined in upstream libfdt. Adjust
U-Boot's version to match.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-10-13 14:12:40 -06:00
Simon Glass
df87e6b1b8 libfdt: Sync fdt_for_each_subnode() with upstream
The signature for this macro has changed. Bring in the upstream version and
adjust U-Boot's usages to suit.

Signed-off-by: Simon Glass <sjg@chromium.org>
Update to drivers/power/pmic/palmas.c:
Signed-off-by: Keerthy <j-keerthy@ti.com>

Change-Id: I6cc9021339bfe686f9df21d61a1095ca2b3776e8
2016-10-13 14:10:32 -06:00
Simon Glass
b02e4044ff libfdt: Bring in upstream stringlist functions
These have now landed upstream. The naming is different and in one case the
function signature has changed. Update the code to match.

This applies the following upstream commits by
Thierry Reding <treding@nvidia.com> :

   604e61e fdt: Add functions to retrieve strings
   8702bd1 fdt: Add a function to get the index of a string
   2218387 fdt: Add a function to count strings

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-10-13 13:54:10 -06:00
Simon Glass
9c07b9877c libfdt: Sync up with upstream
This includes small changes to the following functions, from upstream
commit 6d1832c:

- fdt_get_max_phandle() (upstream commit 84e0e134)
- fdt_node_check_compatible (upstream commit 53bf130b)
- fdt_setprop_inplace_namelen_partial() to remove useless brackets and
     use idx instead of index
- _fdt_resize_property() to use idx instead of index
- _fdt_splice() (upstream commit d4c7c25c)

It also includes various typo fixes in libfdt.h

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-10-13 13:54:10 -06:00
David Gibson
491c7b6f42 libfdt: Fix undefined behaviour in fdt_offset_ptr()
Using pointer arithmetic to generate a pointer outside a known object is,
technically, undefined behaviour in C.  Unfortunately, we were using that
in fdt_offset_ptr() to detect overflows.

To fix this we need to do our bounds / overflow checking on the offsets
before constructing pointers from them.

Reported-by: David Binderman <dcb314@hotmail.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: Simon Glass <sjg@chromium.org>
2016-10-13 13:54:10 -06:00
Hannes Schmelzer
ef47683646 cmd/fdt: add possibilty to have 'extrasize' on fdt resize
Sometimes devicetree nodes and or properties are added out of the u-boot
console, maybe through some script or manual interaction.

The devicetree as loaded or embedded is quite small, so the devicetree
has to be resized to take up those new nodes/properties.

In original the devicetree was only extended by effective
4 * add_mem_rsv.

With this commit we can add an argument to the "fdt resize" command,
which takes the extrasize to be added.

Signed-off-by: Hannes Schmelzer <hannes.schmelzer@br-automation.com>

Signed-off-by: Hannes Schmelzer <oe5hpm@oevsv.at>
Acked-by: Simon Glass <sjg@chromium.org>
2016-10-13 13:54:10 -06:00
Tom Rini
44afdc4a12 Merge branch 'master' of git://git.denx.de/u-boot-net 2016-10-13 13:38:49 -04:00
Stephen Warren
c9abfbdd66 net: smsc95xx: fix DM MAC address reading
eth-uclass.c expects DM-capable Ethernet adapters to implement ops->
read_rom_hwaddr(), or for some other mechanism to set pdata->enetaddr, or
for the user to set environment variable $usbethaddr. Without any of
these, it will refuse to initialize the device since no valid MAC address
is known. Implement this function for the smsc95xx driver.

With this feature implemented, there is no point smsc95xx_init_common()
re-reading the MAC address from ROM, so ifdef out this code when DM_ETH
is enabled.

This allows (at least) the built-in Ethernet on the NVIDIA Harmony board
to operate again.

Fixes: 0990fcb772 ("net: smsc95xx: Add driver-model support")
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2016-10-13 12:25:40 -05:00
Guillaume GARDET
6a2981a713 test: add NFS download test
Add a NFS download test, based on TFTP test.
Tested on i.MX6 SabreLite board.

Signed-off-by: Guillaume GARDET <guillaume.gardet@free.fr>

Cc: Tom Rini <trini@konsulko.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Stephen Warren <swarren@wwwdotorg.org>
Cc: Simon Glass <sjg@chromium.org>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2016-10-13 12:25:36 -05:00
Peter Chubb
9bde741dec net: Fix cache misalignment message after network load operations
After any operation that downloads a file (e.g., pxe get, or dhcp), the
buffer containing the downloaded data is flushed.  This is unnecessary
and annoying.  Unnecessary, because
the network driver should already have fliushed the cache for the DMAed area,
and annoying because it generates a cache misalignment message.

Signed-off-by: Peter Chubb <peter.chubb@data61.csiro.au>
Acked-by: Heiko Schocher <hs@denx.de>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2016-10-13 12:25:33 -05:00
Peter Chubb
7377647a36 rtl8169: fix cache misalignment message on transmit.
The call to flush cache on the transmit buffer was misplaced (for very
short packets) and asked to flush less than a cacheline.

Move the flush cache call to after a short packet has been padded
to minimum length (so the padding is flushed too), and round the size
up to a cacheline.

Signed-off-by: Peter Chubb <peter.chubb@data61.csiro.au>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2016-10-13 12:25:29 -05:00
Hannes Schmelzer
c86ff7fdb2 net: write enetaddr down to hardware on env_callback
If mac-address is changed using "setenv ethaddr ...." command the new
mac-adress also must be written into the responsible ethernet driver.

Signed-off-by: Hannes Schmelzer <oe5hpm@oevsv.at>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2016-10-13 12:25:26 -05:00
Chris Packham
6723b23552 net: mvneta: fix typo in comment
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2016-10-13 12:25:21 -05:00
Chris Packham
b755abecd4 net: mv88e61xx: Add support for fixed links
On some boards these switches are wired directly into a SERDES
interface on another Ethernet MAC. Add the ability to specify
these kinds of boards using CONFIG_MV88E61XX_FIXED_PORTS which defines
a bit mask of these fixed ports.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2016-10-13 12:25:18 -05:00
Chris Packham
65d4d00abc net: Add support for mv88e609x switches
The Marvell Link Street mv88e60xx is a series of FastEthernet switch
chips, some of which also support Gigabit ports. It is similar to the
mv88e61xx series which support Gigabit on all ports.

The main difference is the number of ports. Which affects the
PORT_COUNT define and the size of the mask passed to
mv88e61xx_port_set_vlan().

Other than that it's just a matter of adding the appropriate chip
IDs.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Cc: Joshua Scott <joshua.scott@alliedtelesis.co.nz>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2016-10-13 12:25:14 -05:00
Roger Quadros
f411b5cca4 board: am335x: Always set eth/eth1addr environment variable
Ethernet ports might be used in the kernel even if CPSW driver
is disabled at u-boot. So always set ethaddr and eth1addr
environment variable from efuse.

Retain usbnet_devaddr as it is required for SPL USB eth boot.

Signed-off-by: Roger Quadros <rogerq@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2016-10-13 12:25:10 -05:00
Roger Quadros
e607ec993b board: am335x-icev2: add ethernet phy mode detection logic
Both ethernet ports can be used as CPSW ethernet (RMII mode)
or PRU ethernet (MII mode) by setting the jumper near the port.
Read the jumper value and set the pinmux, external mux and
PHY clock accordingly.

As jumper line is overridden by PHY RX_DV pin immediately
after bootstrap (power-up/reset), we have to use GPIO edge
detection to capture the jumper line status.

As u-boot doesn't provide any infrastructure for GPIO edge
detection, we directly access the GPIO registers.

Signed-off-by: Roger Quadros <rogerq@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2016-10-13 12:25:06 -05:00
Mugunthan V N
ab9715303d driver: net: cpsw: add support for RGMII id mode support and RMII clock source selection
cpsw driver supports only selection of phy mode in control module
but control module has more setting like RGMII ID mode selection,
RMII clock source selection. So ported to cpsw-phy-sel driver
from kernel to u-boot.

Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2016-10-13 12:25:02 -05:00
Mugunthan V N
4b00d02558 include: configs: am335x: add Atheros phy support
In AM335x GP EVM, Atheros 8031 phy is used, enable the driver as
AM335x SoC RGMII delay mode has to be enabled in phy as mentioned
in the silicon errata Advisory 1.0.10

Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2016-10-13 12:24:58 -05:00
Mugunthan V N
ce412b79e7 drivers: net: phy: atheros: add separate config for AR8031
In the current driver implementation, config() callback is common
for AR8035 and AR8031 phy. In config() callback, driver tries to
configure MMD Access Control Register and MMD Access Address Data
Register unconditionally for both phy versions which leads to
auto negotiation failure in AM335x EVMsk second port which uses
AR8031 Giga bit RGMII phy. Fixing this by adding separate config
for AR8031 phy.

Reviewed-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2016-10-13 12:24:55 -05:00
Andrea Merello
2ec4d10b65 phy: atheros: add support for RGMII_ID, RGMII_TXID and RGMII_RXID
This adds support for internal delay on RX and TX on RGMII interface for the
AR8035 phy.

This is basically the same Linux driver do. Tested on a Zynq Zturn board (for
which u-boot support in is my tree; first patch waiting ML approval)

Signed-off-by: Andrea Merello <andrea.merello@gmail.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Acked-by: Marek Vasut <marex@denx.de>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2016-10-13 12:24:51 -05:00
Tom Rini
c69f6d04ec Merge branch 'master' of http://git.denx.de/u-boot-mmc 2016-10-13 08:13:56 -04:00
Tom Rini
79493609c5 Merge git://git.denx.de/u-boot-dm 2016-10-12 20:48:43 -04:00
Tom Rini
5ebd27d860 Merge branch 'master' of git://git.denx.de/u-boot-x86 2016-10-12 13:59:26 -04:00
Tom Rini
f812574e61 Merge branch 'master' of git://git.denx.de/u-boot-tegra 2016-10-12 08:31:08 -04:00
Tom Rini
c14d4b0051 Merge branch 'master' of http://git.denx.de/u-boot-sunxi 2016-10-12 08:30:46 -04:00
Tom Rini
3c594d34c4 Merge branch 'master' of git://git.denx.de/u-boot-uniphier 2016-10-12 08:30:38 -04:00
Tom Rini
99615d812f Merge git://www.denx.de/git/u-boot-marvell 2016-10-12 08:30:08 -04:00
Tom Rini
711b534120 Merge git://git.denx.de/u-boot-fsl-qoriq
Signed-off-by: Tom Rini <trini@konsulko.com>

Conflicts:
	include/configs/ls1021aqds.h
	include/configs/ls1021atwr.h
2016-10-12 08:29:42 -04:00
Lokesh Vutla
8435179271 common: Add DISPLAY_BOARDINFO
Create a Kconfig entry for DISPLAY_BOARDINFO and make it be the default
in certain architectures.  Migrate all config files.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2016-10-12 08:20:17 -04:00
Lokesh Vutla
19a9747535 common/Kconfig: Add DISPLAY_CPUINFO
Create a Kconfig entry for DISPLAY_CPUINFO and make it be the default
in certain architectures.  Migrate all config files.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2016-10-12 08:04:34 -04:00
Bin Meng
00bcaedd5c x86: Clean up unused macros in the configuration headers
Legacy video driver macros are not needed. Clean them up.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2016-10-12 10:58:24 +08:00
Bin Meng
21c9bcebd0 video: Remove legacy VESA and coreboot framebuffer drivers
Now that all x86 boards have been converted to DM video, drop the
legacy drivers.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2016-10-12 10:58:24 +08:00
Bin Meng
2d3c573ee6 x86: coreboot: Convert to use DM coreboot video driver
This converts coreboot to use DM framebuffer driver.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2016-10-12 10:58:24 +08:00
Bin Meng
3968398eb2 dm: video: Don't do anything in alloc_fb() when plat->size is zero
With DM VESA driver on x86 boards, plat->base/size/align are all
zeroes and starting address passed to alloc_fb() happens to be 1MB
aligned, so this routine does not trigger any issue. On QEMU with
U-Boot as coreboot payload, the starting address is within 1MB
range (eg: 0x7fb0000), thus causes failure in video_post_bind().

Actually if plat->size is zero, it makes no sense to do anything
in this routine. Add such check there.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2016-10-12 10:58:23 +08:00
Bin Meng
13b2bfce51 dm: video: Add driver for coreboot framebuffer device
This adds a DM driver for coreboot framebuffer device.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2016-10-12 10:58:12 +08:00