Convert CONFIG_SYS_NAND_USE_FLASH_BBT to Kconfig, update defconfigs,
headers and whitelist.
Please note that this symbol already was used in Kconfig
(imply in CONFIG_NAND_ATMEL) which did not work, since this symbol was
not available in Kconfig. This changes now with this patch and all
boards with CONFIG_NAND_ATMEL will have BBT enabled. Which is what
I also need on my GARDENA AT91SAM based board.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Eugen Hristev <eugen.hristev@microchip.com>
Cc: Miquel Raynal <miquel.raynal@bootlin.com>
Cc: Gregory CLEMENT <gregory.clement@bootlin.com>
[trini: Rework such that the configs are unchanged to start with]
Signed-off-by: Tom Rini <trini@konsulko.com>
- remove rk3288 fennec board
- remove SPL raw image support for Rockchip SoCs
- add common misc_init_r() for ethaddr from cpuid
- enable USB HOST support for rk3328
- unify code for finding a valid gpt in part driver
This converts the following to Kconfig:
CONFIG_FSL_USDHC
Signed-off-by: Adam Ford <aford173@gmail.com>
[trini: Add IMX8M, TARGET_S32V234EVB to FSL_USDHC list]
Signed-off-by: Tom Rini <trini@konsulko.com>
This converts the following to Kconfig:
CONFIG_MXS_GPIO
Travis-CI: https://travis-ci.org/lmajewski/u-boot-dfu/builds/571260789
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Acked-by: Peng Fan <peng.fan@nxp.com>
Acked-by: Jagan Teki <jagan@amarulasolutions.com>
We need to store all the ram related cap/map info back to register
for each channel after all the init has been done in case some of register
was reset during the process.
Signed-off-by: YouMin Chen <cym@rock-chips.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Add DM regulator support for toggling VBUS, this is useful on boards
which control the VBUS e.g. through GPIO.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Chris Brandt <chris.brandt@renesas.com>
Fix remaining checkpatch complaints in the driver.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Chris Brandt <chris.brandt@renesas.com>
Add missing Kconfig entry for the R8A66597 driver.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Chris Brandt <chris.brandt@renesas.com>
Convert the R8A66597 USB driver to DM and add support for DT probing.
Drop support for legacy non-DM and non-DT probing, since there are no
platform using that.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Chris Brandt <chris.brandt@renesas.com>
Replace R8A66597_BASE0 with proper SYSCFG0 accesses, no functional
change.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Chris Brandt <chris.brandt@renesas.com>
While the USB controller can work both in LE and BE modes, there is
no user for the BE mode, so drop it. If there ever is a user for it,
it can be easily re-added back.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Chris Brandt <chris.brandt@renesas.com>
Replace in{bwl}()/out{bwl}() IO accessors with read{bwl}()/write{bwl}(),
to make the driver compile both on SH and ARM.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Chris Brandt <chris.brandt@renesas.com>
No other platforms use this r8a66597 controller but RZ/A1,
make RZ/A1 support the default and drop all the other SoC
support to remove ifdeffery.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Chris Brandt <chris.brandt@renesas.com>
Remove CONFIG_SUPERH_ON_CHIP_R8A66597 macro, which is unused.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Chris Brandt <chris.brandt@renesas.com>
Add an implementation of the rtc_enable_32khz_output() that uses the
driver model i2c APIs.
Also put code related to rtc_enable_32khz_output
under CONFIG_RTC_ENABLE_32KHZ_OUTPUT.
Signed-off-by: Chuanhua Han <chuanhua.han@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
I2C dm mode enablemenet causes below compilation errors:
In file included from include/config.h:8:0,
from include/common.h:20:
include/config_fallbacks.h:51:4: error: #error "Cannot define
CONFIG_SYS_I2C when CONFIG_DM_I2C is used"
# error "Cannot define CONFIG_SYS_I2C when CONFIG_DM_I2C is used"
^~~~~
In file included from include/config.h:8:0,
from include/common.h:20:
include/config_fallbacks.h:51:4: error: #error "Cannot define
CONFIG_SYS_I2C when CONFIG_DM_I2C is used"
# error "Cannot define CONFIG_SYS_I2C when CONFIG_DM_I2C is used"
^~~~~
board/freescale/lx2160a/lx2160a.c: In function 'board_early_init_f':
board/freescale/lx2160a/lx2160a.c:108:2: warning: implicit declaration
of function 'i2c_early_init_f'; did you mean 'arch_early_init_r'?
[-Wimplicit-function-declaration]
i2c_early_init_f();
^~~~~~~~~~~~~~~~
arch_early_init_r
drivers/i2c/mxc_i2c.c: In function 'mxc_i2c_probe':
drivers/i2c/mxc_i2c.c:824:8: warning: implicit declaration of function
'enable_i2c_clk';
did you mean 'enable_irq_wake'? [-Wimplicit-function-declaration]
ret = enable_i2c_clk(1, bus->seq);
^~~~~~~~~~~~~~
enable_irq_wake
So fix these compilation errors.
Signed-off-by: Chuanhua Han <chuanhua.han@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
DM_I2C_COMPAT is a compatibility layer that allows using the non-DM I2C
API when DM_I2C is used. When DM_I2C_COMPAT is not enabled for
compilation, a compilation error will be generated. This patch solves
the problem that the i2c-related api of the lx2160a platform does not
support dm.
Signed-off-by: Chuanhua Han <chuanhua.han@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
MC firmware need to be aligned to 512M, so minimum 512MB DDR is reserved.
But MC support to work with 128MB or 256MB DDR memory also, in this
case, rest of the memory is not usable.
So reporting this extra memory to Linux through dtb memory fixup.
Signed-off-by: Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Since we added clk enable_count and prograte clk child enabling
operation to clk parent, so add a new function sandbox_clk_enable_count
to get enable_count for test usage.
And add test code to get the enable_count after we enable/disable
the device clk.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
On i.MX8MM, thinking such as clk path
OSC->PLL->PLL GATE->CCM ROOT->CCGR GATE->Device
Only enabling CCGR GATE is not enough, we also need to enable PLL GATE
to make sure the clk path work. So when enabling CCGR GATE,
we could prograte to enabling PLL GATE to make life easier.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
As what Linux Kernel 5.3.0 provides when enable/disable clk,
there is an enable_count in clk_core_disable/enable. Introduce
enable_count to track the clk enable/disable count when
clk_enable/disable for CCF. And Initialize enable_count to 0 when
register the clk.
And clk tree dump with enable_count will be supported, it will
be easy for us to check the clk status with enable_count
Signed-off-by: Peng Fan <peng.fan@nxp.com>
This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.
The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.
Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>
It seems that SYSRESET_POWER_OFF was added recently, and all previous code
used SYSRESET_POWER for poweroff. SYSRESET_POWER is supposed to be a
PMIC-level power cycle, not a poweroff.
(Comment by Simon Glass)
SYSRESET_POWER means to do a power reset (removing and reinstating all power)
SYSRESET_POWER_OFF means to turn the device off and leave it off
Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
(Update comment to help understand the patch)
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
In some case with LIVE DT, some node always not valid, or not have
a valid name, eg. blk driver add by mmc.
Return fail instead of Assert for this kind of ofnode, and this
help with assert happen from time to time when of_live is enabled
and DEBUG is enabled.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
In y-modem transfer mode, tstc/getc fail to check if there is any
data available / received in RX FIFO, and so y-modem transfer never
succeeds. Using receive watermark bit within ip register fixes the
issue.
This patch is based on commit c7392b7bc4e1 ("Use the RX watermark
interrupt pending bit for TSTC") available at[1]
[1] https://github.com/sifive/HiFive_U-Boot/tree/regression
Signed-off-by: Sagar Shrikant Kadam <sagar.kadam@sifive.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
Tested-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Padmarao Begari <padmarao.begari@microchip.com>
Tested-by: Padmarao Begari <padmarao.begari@microchip.com>
Do not fail if any of the requested subtypes are not available, but set the
number of resources to 0 and continue parsing the resource ranges.
Based on Linux kernel patch by Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
Add a new SERDES driver for TI's AM654x SoC which configures
the SERDES only for PCIe. Support fo USB3 can be added later.
SERDES in am654x has three input clocks (left input, external
reference clock and right input) and two output clocks (left
output and right output) in addition to a PLL mux clock which
the SERDES uses for Clock Multiplier Unit (CMU refclock).
The PLL mux clock can select from one of the three input
clocks. The right output can select between left input and
external reference clock while the left output can select
between the right input and external reference clock.
The driver has support to select PLL mux and left/right output
mux as specified in device tree.
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Current dev_read_*() API lacks support to get address and size
of a "reg" property by name or index. Add support for the same.
Livetree support has been added but not tested on real hardware.
The existing unit tests testing reading address from device-tree
have been updated to test address as well as size.
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Add support for clk_is_match() which is required to
know if two clock pointers point to the same exact
physical clock.
Also add a unit test for the new API.
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Failure log for ti_sci_power_domain_on/off is as below:
"ti_sci_power_domain_on: get/set_device failed (-19)"
The above information is useless for debug without information
on what specific device access failed. So add that information as well.
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
This patch disables DM watchdog support for SPL builds and uses
the legacy omap watchdog driver on TI AM335x chipsets.
The following build error is reported if DM watchdog support was
enabled in SPL:
CC spl/drivers/usb/gadget/rndis.o
LD spl/drivers/usb/gadget/built-in.o
LD spl/drivers/usb/musb-new/built-in.o
LD spl/drivers/built-in.o
LD spl/u-boot-spl
arm-linux-ld.bfd: u-boot-spl section .u_boot_list will not fit in region .sram
arm-linux-ld.bfd: region .sram overflowed by 440 bytes
make[1]: *** [spl/u-boot-spl] Error 1
make: *** [spl/u-boot-spl] Error 2
Adjusted WATCHDOG_RESET macro accordingly. Earlier it was pointing
to hw_watchdog_reset. Since CONFIG_WATCHDOG replaces CONFIG_HW_WATCHDOG,
now WATCHDOG_RESET macro points to watchdog_reset. This watchdog_reset
is not defined anywhere for am33xx/omap2 and needs to be defined. Fixed
this by simply calling hw_watchdog_reset in watchdog_reset.
Built and tested on AM335x device (BeagleboneBlack), compile tested for
all other AM33xx/omap2 based boards.
Signed-off-by: Suniel Mahesh <sunil.m@techveda.org>
[trini: Fix watchdog.h logic]
Signed-off-by: Tom Rini <trini@konsulko.com>
The non-DM version of this driver used to set BAR0 register after the
calls to pci_set_region.
I found out that for some strange reason the ath10k driver in kernel
fails to work if this is done the other way around.
I know that Linux's driver should not depend on how U-Boot does things,
but for some strange reason it does and this seems to be the simplest
solution. Fix it since it caused regressions on Omnia.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Cc: Stefan Roese <sr@denx.de>
Cc: Dirk Eibach <dirk.eibach@gdsys.cc>
Cc: Mario Six <mario.six@gdsys.cc>
Cc: Chris Packham <chris.packham@alliedtelesis.co.nz>
Cc: Phil Sutter <phil@nwl.cc>
Cc: VlaoMao <vlaomao@gmail.com>
Tested-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
This patch adds device tree and driver model watchdog support,
converts the legacy omap watchdog driver to driver model for
TI AM335x chipsets. The following compile warning is removed:
===================== WARNING ======================
This board does not use CONFIG_WDT (DM watchdog support).
Please update the board to use CONFIG_WDT before the
v2019.10 release.
Failure to update by the deadline may result in board removal.
See doc/driver-model/MIGRATION.txt for more info.
====================================================
CONFIG_HW_WATCHDOG is no more a default option for AM33XX devices
after DT/DM conversion, adjusted kconfig accordingly.
DM watchdog support is enabled by default in SPL. The SPL image
doesn't fit into SRAM because of size constraints and build breaks
with an overflow. For this reason DM watchdog support should be
disabled in SPL, driver code should be adjusted accordingly to serve
this purpose.
Built and tested on AM335x device (BeagleboneBlack), compile tested
for all other AM33xx based boards.
Signed-off-by: Suniel Mahesh <sunil.m@techveda.org>
This file contains lots of internal details about the environment. Most
code can include env.h instead, calling the functions there as needed.
Rename this file and add a comment at the top to indicate its internal
nature.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
[trini: Fixup apalis-tk1.c]
Signed-off-by: Tom Rini <trini@konsulko.com>
This header file is now only used by files that access internal
environment features. Drop it from various places where it is not needed.
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
Avoid using a typedef here which is unnecessary. Add an 'env_' prefix to
both the enum and its members to make it clear that these are related to
the environment.
Add an ENV prefix to these two flags so that it is clear what they relate
to. Also move them to env.h since they are part of the public API. Use an
enum rather than a #define to tie them together.
Signed-off-by: Simon Glass <sjg@chromium.org>
U-Boot is not supposed to use typedef for structs anymore. Also this name
is the same as the ENTRY() macro used in assembler files, and 'entry'
itself is widely used in U-Boot (>8k matches).
Drop the typedef and rename the struct to env_entry to reduce confusion.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Move env_set_hex() over to the new header file along with env_set_addr()
which uses it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Move this function over to the new header file. Also rename it to have an
env_ prefix like the other functions.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
As part of the effort to remove things from common.h, create a new header
for the gzip functions. Move the function declarations to it and add
missing documentation.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
This commit adds MMC driver support for HI3660 SoC reusing hi6220_dw_mmc
driver. Since HI3660 operates at different clock rate and uses fifo
mode now, let's introduce the platform data and utilize it for different
SoCs supported by this driver.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Should use CONFIG_IS_ENABLED not IS_ENABLED for CLK driver, so it will
check the CONFIG_SPL_CLK when building SPL
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
This fix issue when access config from PCIe switch.
The PCIe controller need to send Type 0 config TLP if the targeting bus
matches with the secondary bus number, which is when the TLP is targeting
the immediate device on the link.
The PCIe controller send Type 1 config TLP if the targeting bus is
larger than the secondary bus, which is when the TLP is targeting the
device not immediate on the link.
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Hardware return completion status non-zero when read from non exist
function in multi-function PCIe device. Return error will cause PCIe
enumeration fail.
Change it to return 0 and return value 0xffffffff when error.
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
- Enable SD slot on Intel Edison
- Populate CSRT ACPI table for shared DMA controller on Intel Tangier
- Convert Intel ICH-SPI driver to use new spi-mem ops
- Enable config_distro_bootcmd for QEMU x86
- Support U-Boot as a payload for Intel Slim Bootloader
- Avoid writing temporary asl files into the source tree which fixes the
parallel build issue occasionally seen
Fix various type warnings when building this driver for 64bit machine.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
The R8A77980 V3H gether needs a few minor adjustments to the sh_eth
driver, add them to support ethernet on R8A77980.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
This is a configuration option specific to the tegra controller.
Doing it this way makes it show up directly under the tegra controller
option, indented one level, as "Disable external clock loopback".
The way it is now, it shows up at the end of the controller list, not
indented, as if it's some kind of generic MMC configuration option.
Cc: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Tom Warren <twarren@nvidia.com>
Signed-off-by: Trent Piepho <tpiepho@impinj.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
With the introduction of the new spi-mem model operations changed
slightly. The new spi-mem operations make things a bit easier to
handle for ich-spi flash interface. This patch converts the ich-spi
driver by using spi-mem operations.
Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested on Intel CrownBay and MinnowMax
Tested-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: fix compiler warnings when building the driver for 64-bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Remove a stray break which suppresses some debug messages.
Indicated by cppcheck.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Bin Meng <bmeng.cn@gmail.com>
- Add rk3399 boards Khadas Edge/-V/-Captain
- Add fully souce code support for rk3328 including TPL/DRAM init
- Enable boot from eMMC for rk3399 rock960/ficus boards
- turn on the IO supply for dw_mmc
Commit 3d296365e4 ("mmc: sdhci: Add support for
sdhci-caps-mask") sdhci_setup_cfg() expects a valid sdhci_host mmc
field.
Fixes: 3d296365e4 ("mmc: sdhci: Add support for sdhci-caps-mask")
Cc: Faiz Abbas <faiz_abbas@ti.com>
Cc: Vincent Tinelli <vincent.tinelli@intel.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Commit 3d296365e4 ("mmc: sdhci: Add support for
sdhci-caps-mask") sdhci_setup_cfg() expects a valid sdhci_host mmc
field.
Fixes: 3d296365e4 ("mmc: sdhci: Add support for sdhci-caps-mask")
Cc: Faiz Abbas <faiz_abbas@ti.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Commit 3d296365e4 ("mmc: sdhci: Add support for
sdhci-caps-mask") sdhci_setup_cfg() expects a valid sdhci_host mmc
field.
Fixes: 3d296365e4 ("mmc: sdhci: Add support for sdhci-caps-mask")
Cc: Faiz Abbas <faiz_abbas@ti.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Commit 3d296365e4 ("mmc: sdhci: Add support for
sdhci-caps-mask") sdhci_setup_cfg() expects a valid sdhci_host mmc
field.
Fixes: 3d296365e4 ("mmc: sdhci: Add support for sdhci-caps-mask")
Cc: Faiz Abbas <faiz_abbas@ti.com>
Cc: Ramon Fried <rfried.dev@gmail.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Commit 3d296365e4 ("mmc: sdhci: Add support for
sdhci-caps-mask") sdhci_setup_cfg() expects a valid sdhci_host mmc
field.
Fixes: 3d296365e4 ("mmc: sdhci: Add support for sdhci-caps-mask")
Cc: Faiz Abbas <faiz_abbas@ti.com>
Cc: Matthias Brugger <mbrugger@suse.com>
Cc: Thomas Fitzsimmons <fitzsim@fitzsim.org>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Commit 3d296365e4 ("mmc: sdhci: Add support for
sdhci-caps-mask") sdhci_setup_cfg() expects a valid sdhci_host mmc
field.
Fixes: 3d296365e4 ("mmc: sdhci: Add support for sdhci-caps-mask")
Cc: Faiz Abbas <faiz_abbas@ti.com>
Cc: Wenyou Yang <wenyou.yang@atmel.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Tested-by: Eugen Hristev <eugen.hristev@microchip.com>
Since commit 3d296365e4 ("mmc: sdhci: Add support for
sdhci-caps-mask") sdhci_setup_cfg() expects a valid sdhci_host mmc
field. Move the mmc field initialization before sdhci_setup_cfg()
call to avoid crash on mmc pointer dereference.
[this patch is based on commit 41a9fab8da ("mmc: mv_sdhci: fix
uninitialized pointer deref on probe") by Baruch Siach]
Fixes: 3d296365e4 ("mmc: sdhci: Add support for sdhci-caps-mask")
Cc: Faiz Abbas <faiz_abbas@ti.com>
Cc: Baruch Siach <baruch@tkos.co.il>
Signed-off-by: Matwey V. Kornilov <matwey.kornilov@gmail.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Tested-by: Michal Simek <michal.simek@xilinx.com> (on zcu102/zc706)
Select SPL_HS200_SUPPORT if SPL_HS400_SUPPORT is selected as is being
done for the U-boot case.
Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
dfu_prepare_function() allocates N+1 descriptor header structures,
the last one being the "DFU Functional Descriptor".
dfu_unbind() handles de-allocation, but fails to free the final
one (eg. "DFU Functional Descriptor"), leading to memory leak.
Fixed by incrementing counter, as in dfu_prepare_function().
Signed-off-by: Ralph Siemsen <ralph.siemsen@linaro.org>
"slot-suffixes" variable was dropped in fastboot tool (in [1]). Let's
track AOSP/master and drop this variable in U-Boot as well.
[1] 42b18a518b
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
[lukma: Remove getvar_slot_suffixes() declaration]
Signed-off-by: Lukasz Majewski <lukma@denx.de>
commit 57faca19a8 ("drivers: USB: OHCI: allow compilation for 64-bit targets")
broke ohci support for the mpc85xx based socrates board,
as it removed volatile keyword from ohci_readl/writel.
Fix this so usb works again on socrates board.
Signed-off-by: Heiko Schocher <hs@denx.de>
var ohci_pci_ids is only used if DM_USB is not enabled.
So define this varaible only if
!CONFIG_IS_ENABLED(DM_USB)
Signed-off-by: Heiko Schocher <hs@denx.de>
With the recently added phy driver, this patch will enable the
musb driver on the da8xx to operate in host mode.
Signed-off-by: Adam Ford <aford173@gmail.com>
In preparation for supporting the musb driver, this patch
adds support for the usb phy associated with the musb driver.
Signed-off-by: Adam Ford <aford173@gmail.com>
Fix the following Coverity warning:
CID 244086: Incorrect expression (BAD_COMPARE)
Comparing pointer "ep_bar" against NULL using anything besides == or
is likely to be incorrect.
Fixes: 914026d258 ("drivers: pci_ep: Introduce UCLASS_PCI_EP uclass")
Signed-off-by: Ramon Fried <rfried.dev@gmail.com>
This adds high speed interface subsystem - hifsys (i.e. PCIe and USB)
for MT7623 SoC and enables its reset controller.
The control block is shared with ethsys and accordingly rename the
related defines.
Tested-by: Frank Wunderlich <frank-w@public-files.de>
Signed-off-by: Ryder Lee <ryder.lee@mediatek.com>
This driver supports DDR3/LPDDR3/DDR4 SDRAM initialization.
Signed-off-by: YouMin Chen <cym@rock-chips.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
[cherry picked from commit 9fb0777ec3 with minor modifications]
Signed-off-by: Matwey V. Kornilov <matwey.kornilov@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
This patch cleans up some coding style related issues in the mtk_wtd
driver to make this driver comply again with the U-Boot coding style
standards.
The only minimal functional change is that the timeout parameter is now
passed in (u64) instead of (unsigned int) from mtk_wdt_start() to
mtk_wdt_set_timeout(), preserving the original value.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Shannon Barber <sbarber@dataspeedinc.com>
Cc: Ryder Lee <ryder.lee@mediatek.com>
Cc: Matthias Brugger <matthias.bgg@gmail.com>
Cc: Frank Wunderlich <frank-w@public-files.de>
Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com>
The BCM2835/2836 watchdog is not used in mainline U-Boot at all. This
patch removes the driver and its references (CONFIG_BCM2835_WDT)
completely.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Paolo Pisati <p.pisati@gmail.com>
- add support for 4GiB DRAM memory
- add support for Amlogic G12B based Odroid-N2
- small duplicate logic fix for gxbb clock driver
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Merge tag 'u-boot-amlogic-20190731' of https://gitlab.denx.de/u-boot/custodians/u-boot-amlogic
- sync Amlogic G12A DT with linux 5.3-rc1
- add support for 4GiB DRAM memory
- add support for Amlogic G12B based Odroid-N2
- small duplicate logic fix for gxbb clock driver
The array bounds have to be checked before accessing the array element.
Identified by cppcheck.
Fixes: 67ac6ffaee ("mtd: nand: davinci: add opportunity to write keystone U-boot image")
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
First thing we check in meson_clk_set_rate_by_id() is current_rate == rate.
There is not need to check it again.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Acked-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
The comment about init op being NULL used to be next to the NULL check
code. Commit 8ca51e51c1 ("dm: mmc: Add a way to use driver model for
MMC operations") separated the comment from the code. Put them back
together.
Fixes: 8ca51e51c1 ("dm: mmc: Add a way to use driver model for MMC operations")
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
When reading large data in once (reading 512MiB is tested on MT7623), a
watchdog timeout is triggered due to watchdog not being fed.
This patch adds WATCHDOG_RESET() to msdc_start_data() so the watchdog will
be fed every 1024 blocks are read/written.
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
The standard property name for chip-detect gpio is "cd-gpios". All
in-tree DT files use only this name.
Fixes: 451931ea70 ("mmc: sdhci: Read cd-gpio from devicetree")
Cc: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Cc: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Since commit 3d296365e4 ("mmc: sdhci: Add support for
sdhci-caps-mask") sdhci_setup_cfg() expects a valid sdhci_host mmc
field. Move the mmc field initialization before sdhci_setup_cfg()
call to avoid crash on mmc pointer dereference.
Fixes: 3d296365e4 ("mmc: sdhci: Add support for sdhci-caps-mask")
Cc: Faiz Abbas <faiz_abbas@ti.com>
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
When the device not binded with a node, we need ignore
the parents and rate settings.
Cc: Simon Glass <sjg@chromium.org>
Cc: Jagan Teki <jagan@amarulasolutions.com>
Cc: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Cc: Neil Armstrong <narmstrong@baylibre.com>
Cc: Andreas Dannenberg <dannenberg@ti.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
When support Clock Common Framework, U-Boot use dev for
clk tree information, there is no clk->parent. When
support composite clk, it contains mux/gate/divider,
but the mux/gate/divider is not binded with device.
So we could not use dev_get_uclass_priv to get the correct
clk_mux/gate/divider. So add clk_dev_binded to let
choose the correct method.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Fixes the microSD slot on the ASUS C201.
Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com<mailto:peng.fan@nxp.com>>
- extend mxc_ipuv3_fb to enable backlight/display
- include fb_base in global_data for DM_VIDEO
- show frame buffer address via board info
as used to be with legacy VIDEO support
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Merge tag 'video-for-2019.10-rc1' of https://gitlab.denx.de/u-boot/custodians/u-boot-video
- fix EDID mode filtering
- extend mxc_ipuv3_fb to enable backlight/display
- include fb_base in global_data for DM_VIDEO
- show frame buffer address via board info
as used to be with legacy VIDEO support
fpga:
- Xilinx virtex2 cleanup
- Altera cyclon2 cleanup
zynq:
- Minor Kconfig cleanup
- Add psu_init configuration for Z-turn board
zynqmp:
- Add support for pmufw config passing to PMU
- script for psu_init conversion
- zcu1275 renaming
xilinx:
- Add support for UltraZed-EV SoM
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Merge tag 'xilinx-for-v2019.10' of https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze
Xilinx/FPGA changes for v2019.10
fpga:
- Xilinx virtex2 cleanup
- Altera cyclon2 cleanup
zynq:
- Minor Kconfig cleanup
- Add psu_init configuration for Z-turn board
zynqmp:
- Add support for pmufw config passing to PMU
- script for psu_init conversion
- zcu1275 renaming
xilinx:
- Add support for UltraZed-EV SoM
As already done for the 'pre' function, a check is added to not follow a
NULL pointer, if somebody has not assigned a 'post' function.
Signed-off-by: Alexander Dahl <ada@thorsis.com>
Nothing special, but done before further cleanup.
* spacing
* braces
* __FUNCTION__ → __func__
Suggested-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Alexander Dahl <ada@thorsis.com>
This adds support for slave serial programming, in addition to the
previously supported slave SelectMAP mode. There are two ways that this
can be used:
-Using the clk and wdata callbacks in order to write image data one bit
at a time using pure bit-banging. This works, but is rather painfully
slow with typical image sizes.
-By specifying the wbulkdata callback instead, the image loading process
can be offloaded to SPI hardware. In this mode the clk and wdata
callbacks do not need to be specified. This allows the image to be
loaded much faster, taking only a few seconds with even relatively large
images.
Slave serial programming has been tested on the Kintex-7 series of
FPGAs.
Signed-off-by: Robert Hancock <hancock@sedsystems.ca>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Some Xilinx FPGA configuration options can result in the startup
sequence extending past the end of the FPGA bitstream. Continue applying
CCLK clock cycles for 8 cycles after DONE is asserted in order to ensure
the startup sequence is complete, as recommended by Xilinx.
Signed-off-by: Robert Hancock <hancock@sedsystems.ca>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
This is in preparation for adding slave serial programming support,
which uses the same pre/post operations as slave SelectMAP, to avoid
duplicating code.
Signed-off-by: Robert Hancock <hancock@sedsystems.ca>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Add an option to allow this driver to be selected with Kconfig. As noted
in the description, this driver should also work with many newer Xilinx
FPGA families as the programming methods are essentially the same.
Also added a missing FPGA_XILINX dependency to the similar Spartan 3
driver.
Signed-off-by: Robert Hancock <hancock@sedsystems.ca>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Address Checkpatch warnings in virtex2 code prior to making other
changes. No functional change intended.
Signed-off-by: Robert Hancock <hancock@sedsystems.ca>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Extend the davinci NAND driver to support the driver model. For now this
doesn't add any device-tree parsing due to the fact that we can't access
the actual nand node on the device-tree - it's a subnode of the aemif
device and we don't have an aemif driver on davinci at the moment.
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
There are no more users of the compatibility layer for i2c. Remove the
driver and all references to it.
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Acked-by: Heiko Schocher <hs@denx.de>
Fix the following warning when CONFIG_PINCONF=n:
drivers/pinctrl/mediatek/pinctrl-mtk-common.c:35:36:
warning: ‘mtk_drive’ defined but not used [-Wunused-const-variable=]
static const struct mtk_drive_desc mtk_drive[] = {
^~~~~~~~~
Signed-off-by: Fabien Parent <fparent@baylibre.com>
recently added gpio hog patch was "in discussion"
state with Simon Glass. This patch now adds most
of comments from Simon Glass.
Signed-off-by: Heiko Schocher <hs@denx.de>
commit 49116e6d23 ("doc: arch: Convert README.sandbox to reST")
Moves README.sandbox to doc/arch.
Replace all the existing instances to point to the right documentation
file.
Signed-off-by: Keerthy <j-keerthy@ti.com>
- Clean up and migrate to use common rockchip spl board file
- Clean up and migrate to use common rockchip board file
- Increase rk3288 CONFIG_SYS_BOOTM_LEN to 16MB
Fix GPIO bank 0 pin 0 request/release off by one error. Without this
patch, it is not possible to request/release GPIO bank 0 pin 0.
Signed-off-by: Tiezhuang Dong <tiezhuang.dong.yh@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Eugeniu Rosca <roscaeugeniu@gmail.com>
Cc: Yoshihiro Shimoda <shimoda.yoshihiro.uh@renesas.com>
When probing we query for the width and hight of the display. If the
firmware does not report any connected display the system will crash.
See https://github.com/raspberrypi/firmware/issues/1157 for details.
Signed-off-by: Fabian Vogt <fvogt@suse.com>
[mb: update commit message]
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Tested-by: Andre Przywara <andre.przywara@arm.com>
Init CPU frquency in clock driver instead of in SPL board file,
this will help for use common board file later.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Add support for the ddc-i2c-bus device tree property which allows
for using an external i2c master for reading the display's EDID.
Signed-off-by: Niklas Schulze <me@jns.io>
Add support for the new mode_valid() display op to filter out unsupported
display DMT timings.
This is useful when connected to 4k displays, since we only support DMT
monitors up to 1920x1080, the 4k native timings are discarded to select
supported timings.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Introduce a new display op, mode_valid() to be used with the newly
introduced edid_get_timing_validate() function, to filter supported
monitor timings if handled by the display driver.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Add support for display and bits-per-pixel properties.
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
Extend the driver to build with DM_VIDEO enabled. DTS files
must additionally include 'u-boot,dm-pre-reloc' property in
soc and child nodes to enable driver binding to fsl_dcu_fb device.
Currently display timings aren't obtained from DT.
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
Move dcu-related code to fsl_dcu_probe_common, keep in video_hw_init()
only legacy video stack (filling GraphicPanel struct etc.).
Add wrappers for all init functions, that will let to provide
struct fb_info as an additional param (needed for further moving it from
the global scope to driver private data struct in DM converted driver).
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
The j721e 4 bit instances don't have a hard DLL and therefore don't need
any DLL related configurations. Split the compatibles into an 8 bit and a
4 bit one. Add a private flags field which can be used to check if the
DLL is present and don't register the set_ios_post callback for the 4 bit
compatible instances.
Also update the compatibles in k3-j721e-main.dtsi to avoid breaking boot
with the new compatibles.
Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
k3_rproc driver is specifically meant for controlling an arm64
core using TISCI protocol. So rename the driver, Kconfig symbol,
compatible and functions accordingly.
While at it drop this remoteproc selection for a53 defconfig.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Update the k3_rproc driver to use the generic ti_sci_proc helper
apis which simplifies the driver a bit.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Texas Instruments' K3 generation SoCs has specific modules/register
spaces used for configuring the various aspects of a remote processor.
These include power, reset, boot vector and other configuration features
specific to each compute processor present on the SoC. These registers
are managed by the System Controller such as DMSC on K3 AM65x SoCs.
The Texas Instrument's System Control Interface (TI-SCI) Message Protocol
is used to communicate to the System Controller from various compute
processors to invoke specific services provided by the firmware running
on the System Controller.
Add a common processor control interface header file that can be used by
multiple remoteproc drivers. The helper functions within this header file
abstract the various TI SCI protocol ops for the remoteproc drivers, and
allow them to request the System Controller to be able to program and
manage various remote processors on the SoC. The common macros required
by the R5 remoteproc driver were also added. The remoteproc drivers are
expected to manage the life-cycle of their ti_sci_proc_dev local
structures.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Suman Anna <s-anna@ti.com>
TISCI protocol supports for enabling the device either with exclusive
permissions for the requesting host or with sharing across the hosts.
There are certain devices which are exclusive to Linux context and
there are certain devices that are shared across different host contexts.
So add support for getting this information from DT by increasing
the power-domain cells to 2.
For keeping the DT backward compatibility intact, defaulting the
device permissions to set the exclusive flag set. In this case the
power-domain-cells is 1.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Any host while requesting for a device can request for its exclusive
access. If an exclusive permission is obtained then it is the host's
responsibility to release the device before the software entity on
the host completes its execution. Else any other host's request for
the device will be nacked. So add a command that releases all the
exclusive devices that is acquired by the current host. This should
be used with utmost care and can be called only at the end of the
execution.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Add and expose a new processor shutdown API that wraps the two TISCI
messages involved in initiating a core shutdown. The API will first
queue a message to have the DMSC wait for a certain processor boot
status to happen followed by a message to trigger the actual shutdown-
with both messages being sent without waiting or requesting for a
response. Note that the processor shutdown API call will need to be
followed up by user software placing the respective core into either
WFE or WFI mode.
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
Sysfw provides an option for requesting exclusive access for a
device using the flags MSG_FLAG_DEVICE_EXCLUSIVE. If this flag is
not used, the device is meant to be shared across hosts. Once a device
is requested from a host with this flag set, any request to this
device from a different host will be nacked by sysfw. Current tisci
driver enables this flag for every device requests. But this may not
be true for all the devices. So provide a separate commands in driver
for exclusive and shared device requests.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
H3/H5 can either use the internal phy or an external one.
Before getting clock and resets for the internal phy,
test that we are using it because otherwise it break emac
when using an external phy.
Tested-on: OrangePi PC2 (H5)
Fixes: 2348453c41 (net: sun8i_emac: Add EPHY CLK and RESET support)
Signed-off-by: Emmanuel Vadot <manu@freebsd.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Now that we removed all legacy boards selecting TI_EMAC we can
completely convert the driver code to using the driver model.
This patch also updates all remaining users of davinci_emac.
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Tested-by: Adam Ford <aford173@gmail.com> #am3517-evm & da850-evm
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Instead of depending on CONFIG_SYS_LITTLE_ENDIAN, we check at runtime
whether underlying system is little-endian or big-endian. This way
we are not dependent on any U-Boot specific OR compiler specific macro
to check system endianness.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
The SiFive MACB ethernet has a custom TX_CLK_SEL register to select
different TX clock for 1000mbps vs 10/100mbps.
This patch adds SiFive MACB compatible string and extends the MACB
ethernet driver to change TX clock using TX_CLK_SEL register for
SiFive MACB.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
In the case of the tsec network driver, so far there has been no
mainline user of DM_ETH where the DT bindings get used.
In the case of the mdio bus, it looks like the "fsl,tsec-mdio" string
was made up for the documentation, but there is no mainline code that
parses the "compatible" property anyway.
In both cases, there are no DT blobs that contain the old strings.
So change the documentation to "fsl,etsec2" for the Ethernet ports and
"fsl,etsec2-mdio" for the MDIO buses, which are strings that Linux also
uses, at least for LS1021A. More compatible strings can be added once
other (PowerPC) SoCs are migrated to DM_ETH.
The current ls1021a.dtsi doesn't match what was documented for the MDIO
buses anyway (the "compatible" is "gianfar" currently). This will be
fixed in the next patch.
Fixes: 69a00875e3 ("doc: dt-bindings: Describe Freescale TSEC ethernet controller")
Signed-off-by: Vladimir Oltean <olteanv@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
In tsec_init, the MAC address is retrieved from 2 different structures
depending on whether DM_ETH is enabled or not.
But since the field name is the same inside both structures, we can
conditionally define the structure of the correct type and simplify the
assignments.
Signed-off-by: Vladimir Oltean <olteanv@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
This replaces debug() calls with printf() so that it is immediately
obvious from the console that something is wrong.
Signed-off-by: Vladimir Oltean <olteanv@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
This is a cosmetic patch that reorders variable definitions in the
inverse order of their line length, where possible.
Signed-off-by: Vladimir Oltean <olteanv@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
By convention, the eTSEC MDIO controller nodes are defined in DT at
0x2d24000 and 0x2d50000, but actually U-Boot does not touch the
interrupt portion of the register map (MDIO_IEVENTM, MDIO_IMASKM,
MDIO_EMAPM).
That leaves only the MDIO bus registers (MDIO_MIIMCFG, MDIO_MIIMCOM,
MDIO_MIIMADD, MDIO_MIIMADD, MDIO_MIIMCON, MDIO_MIIMSTAT) which start at
the 0x520 offset.
So shift the DT-defined register map by the offset of MDIO_MIIMCFG when
mapping the MDIO bus registers.
Signed-off-by: Vladimir Oltean <olteanv@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
The point of this patch is to eliminate the use of the locally-defined
"reg" variable (which interferes with next patch) and simplify the
fallback to the default CONFIG_SYS_TBIPA_VALUE in case "tbi-handle" is
missing.
Signed-off-by: Vladimir Oltean <olteanv@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Macb Ethernet controller requires a RX buffer of 128 bytes. It is
highly sub-optimal for Gigabit-capable GEM that is able to use
a bigger DMA buffer. Change this constant and associated macros
with data stored in the private structure.
RX DMA buffer size has to be multiple of 64 bytes as indicated in
DMA Configuration Register specification.
Signed-off-by: Ramon Fried <rfried.dev@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
DMA configuration was heavily dependent on the HW
defaults, add function to properly set the required
fields, including the new dma_burst_length.
Signed-off-by: Ramon Fried <rfried.dev@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
Tested-by: Anup Patel <anup.patel@wdc.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
GEM support higher DMA burst writes/reads than the default (4).
add configuration structure with dma burst length so it could be
applied later to DMA configuration.
Signed-off-by: Ramon Fried <rfried.dev@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
Tested-by: Anup Patel <anup.patel@wdc.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
This patch adds support for the sgmii phy interface,
available only to DM users, dictated by current driver
design.
Signed-off-by: Ramon Fried <rfried.dev@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
Tested-by: Anup Patel <anup.patel@wdc.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
macb.h provides macros for reading/setting bitfields,
in macb registers and descriptors. use that instead
of redefining them in the source file.
Signed-off-by: Ramon Fried <rfried.dev@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
Tested-by: Anup Patel <anup.patel@wdc.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
add support for clock rates higher than 2.4Mhz
Signed-off-by: Ramon Fried <rfried.dev@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
Tested-by: Anup Patel <anup.patel@wdc.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Few registers and bits were added by Cadence and
they were not updated in the headers.
Take the latest definitions as defined in Linux
header (5.1) that also includes some comments
about existing registers.
One register was improperly named (UR), fix that.
Signed-off-by: Ramon Fried <rfried.dev@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
Tested-by: Anup Patel <anup.patel@wdc.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
This driver is used for MDIO muxes driven over I2C. This is currently
used on Freescale LS1028A QDS board, on which the physical MDIO MUX is
controlled by an on-board FPGA which in turn is configured through I2C.
Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Using 'phy_connect' instead of 'phy_find_by_mask' and 'phy_connect_dev'
both deduplicates code and adds support for 'fixed-link'.
Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
SGMII 2500 as supported on NXP SoCs requires AN to be disabled, handle
this case in the enetc sgmii init code.
Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Ethernet interfaces using serial protocols go through the serdes block
integrated in the SoC. This is accessed over dedicated internal MDIOs
which are part of the Ethernet PCI functions. Set up serdes at _start,
along with other protocol specific port/MAC configuration.
MDIO code is shared with enetc_mdio, read/write functions are exported
from fsl_enetc_mdio for this reason.
Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Adds a driver for the MDIO interface currently integrated in LS1028A SoC.
This MDIO interface is shared by multiple ethernet interfaces and is
presented as a stand-alone PCI function on the SoC ECAM.
Ethernet has a functional dependency on MDIO, for simplicity there is a
single config option for both.
Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Adds a driver for NXP ENETC ethernet controller currently integrated in
LS1028A. ENETC is a fairly straight-forward BD ring device and interfaces
are presented as PCI EPs on the SoC ECAM.
Signed-off-by: Catalin Horghidan <catalin.horghidan@nxp.com>
Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Since u-boot has added the spi-mem framework and replaced
the spi-nor framework, the mtk_qspi is no longer compatible
with the new spi-nor driver.
Remove this driver along with replacing config item
with new mtk spi-nor driver.
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
[jagan: squash related changes and update commit message]
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Reduce power domain calls when CONFIG_POWER_DOMAIN is disabled.
With gcc v8.2, this change saves 104 bytes.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Right now when using clk_of_xlate_default(), clk->data
remains un-initialized because clk_get_bulk() does not
initialize memory on allocation of clock structure.
This can cause problems when data is used to match if
two clocks pointers are exactly the same underlying
clocks, for example.
Fix it by initializing clk->data to 0.
Suggested-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
