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Merge branch '2019-07-29-ti-imports'

Browse source 
- More DaVinci DM migration, drop am18xx EVM platform
- Keystone bug fix
This commit is contained in:
Tom Rini 2019-07-29 17:59:15 -04:00
commit 333755ef7b
29 changed files with 95 additions and 338 deletions
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7
Makefile
View file

@ -936,13 +936,6 @@ ifneq ($(CONFIG_DM_SPI)$(CONFIG_OF_CONTROL),yy)
endif
endif
endif
ifeq ($(CONFIG_DM_I2C_COMPAT)$(CONFIG_SANDBOX),y)
@echo >&2 "===================== WARNING ======================"
@echo >&2 "This board uses CONFIG_DM_I2C_COMPAT. Please remove"
@echo >&2 "(possibly in a subsequent patch in your series)"
@echo >&2 "before sending patches to the mailing list."
@echo >&2 "===================================================="
endif
ifeq ($(CONFIG_MMC),y)
ifneq ($(CONFIG_DM_MMC)$(CONFIG_OF_CONTROL)$(CONFIG_BLK),yyy)
@echo >&2 "===================== WARNING ======================"

4
arch/arm/dts/da850-evm-u-boot.dtsi
View file

@ -10,6 +10,10 @@
soc@1c00000 {
u-boot,dm-spl;
};
nand {
compatible = "ti,davinci-nand";
};
};
&flash {

4
arch/arm/dts/da850-lcdk-u-boot.dtsi
View file

@ -9,4 +9,8 @@
aliases {
i2c0 = &i2c0;
};
nand {
compatible = "ti,davinci-nand";
};
};

2
arch/arm/include/asm/ti-common/davinci_nand.h
View file

@ -95,6 +95,4 @@ struct davinci_emif_regs {
#define DAVINCI_ABCR_ASIZE_16BIT 1
#define DAVINCI_ABCR_ASIZE_8BIT 0
void davinci_nand_init(struct nand_chip *nand);
#endif

10
arch/arm/mach-keystone/mon.c
View file

@ -1,11 +1,11 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* K2HK: secure kernel command file
* K2x: Secure commands file
*
* (C) Copyright 2012-2014
* Texas Instruments Incorporated, <www.ti.com>
* Copyright (C) 2012-2019 Texas Instruments Incorporated - http://www.ti.com/
*/
#include <asm/unaligned.h>
#include <common.h>
#include <command.h>
#include <mach/mon.h>
@ -120,9 +120,9 @@ void board_fit_image_post_process(void **p_image, size_t *p_size)
/*
* Overwrite the image headers after authentication
* and decryption. Update size to reflect removal
* of header.
* of header and restore original file size.
*/
*p_size -= KS2_HS_SEC_HEADER_LEN;
*p_size = get_unaligned_le32(image + (*p_size - 4));
memcpy(image, image + KS2_HS_SEC_HEADER_LEN, *p_size);
/*

4
board/davinci/da8xxevm/MAINTAINERS
View file

@ -7,10 +7,6 @@ F: configs/da850evm_defconfig
F: configs/da850evm_nand_defconfig
F: configs/da850evm_direct_nor_defconfig
AM18XXEVM BOARD
S: Orphan
F: configs/da850_am18xxevm_defconfig
OMAPL138_LCDK BOARD
M: Peter Howard <phoward@gme.net.au>
S: Maintained

4
board/davinci/da8xxevm/README.da850
View file

@ -29,9 +29,7 @@ Compilation
===========
The exact build target you need will depend on the board you have. For
Logic PD boards, or other boards which store the ethernet MAC address at
the end of SPI flash, run 'make da850evm'. For boards which store the
ethernet MAC address in the i2c EEPROM located at 0x50, run
'make da850_am18xxevm'. Once this build completes you will have a
the end of SPI flash, run 'make da850evm'. Once this build completes you will have a
u-boot.ais file that needs to be written to the correct persistent
storage.

18
board/davinci/da8xxevm/omapl138_lcdk.c
View file

@ -11,11 +11,11 @@
#include <common.h>
#include <i2c.h>
#include <net.h>
#include <spi.h>
#include <spi_flash.h>
#include <asm/arch/hardware.h>
#include <asm/ti-common/davinci_nand.h>
#include <asm/io.h>
#include <ns16550.h>
#include <dm/platdata.h>
#include <linux/errno.h>
#include <asm/mach-types.h>
#include <asm/arch/davinci_misc.h>
@ -357,3 +357,17 @@ int board_mmc_init(bd_t *bis)
}
#endif
#endif
#ifdef CONFIG_SPL_BUILD
static const struct ns16550_platdata serial_pdata = {
.base = DAVINCI_UART2_BASE,
.reg_shift = 2,
.clock = 228000000,
.fcr = UART_FCR_DEFVAL,
};
U_BOOT_DEVICE(omapl138_uart) = {
.name = "ns16550_serial",
.platdata = &serial_pdata,
};
#endif

67
configs/da850_am18xxevm_defconfig
View file

@ -1,67 +0,0 @@
CONFIG_ARM=y
CONFIG_ARCH_DAVINCI=y
CONFIG_SYS_TEXT_BASE=0xc1080000
CONFIG_TARGET_DA850EVM=y
CONFIG_MAC_ADDR_IN_EEPROM=y
CONFIG_TI_COMMON_CMD_OPTIONS=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_SYS_MALLOC_F_LEN=0x800
CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_NR_DRAM_BANKS=1
CONFIG_SPL=y
CONFIG_SPL_SPI_FLASH_SUPPORT=y
CONFIG_SPL_SPI_SUPPORT=y
CONFIG_SYS_EXTRA_OPTIONS="DA850_AM18X_EVM,SYS_I2C_EEPROM_ADDR_LEN=2,SYS_I2C_EEPROM_ADDR=0x50"
CONFIG_BOOTDELAY=3
CONFIG_MISC_INIT_R=y
CONFIG_VERSION_VARIABLE=y
# CONFIG_DISPLAY_CPUINFO is not set
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_SPL_TEXT_BASE=0x80000000
CONFIG_SPL_SPI_LOAD=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="U-Boot > "
CONFIG_CRC32_VERIFY=y
# CONFIG_CMD_EEPROM is not set
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_GPIO is not set
# CONFIG_CMD_GPT is not set
# CONFIG_CMD_PART is not set
# CONFIG_CMD_SETEXPR is not set
# CONFIG_CMD_TIME is not set
# CONFIG_CMD_EXT4 is not set
# CONFIG_CMD_FS_GENERIC is not set
CONFIG_CMD_DIAG=y
CONFIG_OF_CONTROL=y
CONFIG_SPL_OF_CONTROL=y
CONFIG_DEFAULT_DEVICE_TREE="da850-evm"
CONFIG_SPL_OF_PLATDATA=y
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_DM=y
CONFIG_SPL_DM=y
CONFIG_DA8XX_GPIO=y
CONFIG_DM_I2C=y
CONFIG_DM_I2C_COMPAT=y
CONFIG_SYS_I2C_DAVINCI=y
CONFIG_MTD_DEVICE=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_SPI_FLASH_WINBOND=y
CONFIG_DM_ETH=y
CONFIG_MII=y
CONFIG_DRIVER_TI_EMAC=y
CONFIG_DM_SERIAL=y
CONFIG_SYS_NS16550=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_DAVINCI_SPI=y
CONFIG_USB=y
CONFIG_DM_USB=y
# CONFIG_SPL_DM_USB is not set
CONFIG_USB_OHCI_HCD=y
CONFIG_USB_OHCI_DA8XX=y
CONFIG_USB_STORAGE=y
# CONFIG_FAT_WRITE is not set

1
configs/da850evm_defconfig
View file

@ -52,6 +52,7 @@ CONFIG_DA8XX_GPIO=y
CONFIG_DM_I2C=y
CONFIG_SYS_I2C_DAVINCI=y
CONFIG_DM_MMC=y
CONFIG_MTD=y
CONFIG_MTD_DEVICE=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH=y

1
configs/da850evm_direct_nor_defconfig
View file

@ -42,6 +42,7 @@ CONFIG_DA8XX_GPIO=y
CONFIG_DM_I2C=y
CONFIG_SYS_I2C_DAVINCI=y
# CONFIG_MMC is not set
CONFIG_MTD=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_FLASH_CFI_DRIVER=y
CONFIG_SYS_FLASH_PROTECTION=y

1
configs/da850evm_nand_defconfig
View file

@ -49,6 +49,7 @@ CONFIG_DM_GPIO=y
CONFIG_DA8XX_GPIO=y
CONFIG_DM_I2C=y
CONFIG_DM_MMC=y
CONFIG_MTD=y
CONFIG_NAND=y
CONFIG_NAND_DAVINCI=y
CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y

15
configs/omapl138_lcdk_defconfig
View file

@ -18,6 +18,7 @@ CONFIG_VERSION_VARIABLE=y
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_SPL_TEXT_BASE=0x80000000
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0xb5
CONFIG_SPL_NAND_SUPPORT=y
CONFIG_HUSH_PARSER=y
@ -26,33 +27,35 @@ CONFIG_CRC32_VERIFY=y
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_GPIO is not set
CONFIG_CMD_NAND=y
# CONFIG_CMD_SPI is not set
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_MTDPARTS=y
CONFIG_CMD_DIAG=y
CONFIG_CMD_UBI=y
CONFIG_OF_CONTROL=y
CONFIG_SPL_OF_CONTROL=y
CONFIG_DEFAULT_DEVICE_TREE="da850-lcdk"
CONFIG_SPL_OF_PLATDATA=y
CONFIG_ENV_IS_IN_NAND=y
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_DM=y
CONFIG_SPL_DM=y
CONFIG_DM_I2C=y
CONFIG_DM_I2C_COMPAT=y
CONFIG_SYS_I2C_DAVINCI=y
CONFIG_DM_MMC=y
CONFIG_MTD=y
CONFIG_NAND=y
CONFIG_NAND_DAVINCI=y
CONFIG_SYS_NAND_BUSWIDTH_16BIT=y
CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y
CONFIG_SYS_NAND_U_BOOT_OFFS=0x28000
CONFIG_SPL_NAND_SIMPLE=y
CONFIG_SPI_FLASH=y
CONFIG_SF_DEFAULT_SPEED=30000000
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_SPI_FLASH_WINBOND=y
CONFIG_DM_ETH=y
CONFIG_MII=y
CONFIG_DRIVER_TI_EMAC=y
CONFIG_SPECIFY_CONSOLE_INDEX=y
CONFIG_DM_SERIAL=y
CONFIG_SYS_NS16550=y
CONFIG_SPI=y
CONFIG_DAVINCI_SPI=y
CONFIG_USE_TINY_PRINTF=y
# CONFIG_SPL_OF_LIBFDT is not set

1
configs/sandbox64_defconfig
View file

@ -89,7 +89,6 @@ CONFIG_BOARD=y
CONFIG_BOARD_SANDBOX=y
CONFIG_PM8916_GPIO=y
CONFIG_SANDBOX_GPIO=y
CONFIG_DM_I2C_COMPAT=y
CONFIG_I2C_CROS_EC_TUNNEL=y
CONFIG_I2C_CROS_EC_LDO=y
CONFIG_DM_I2C_GPIO=y

1
configs/sandbox_defconfig
View file

@ -107,7 +107,6 @@ CONFIG_PM8916_GPIO=y
CONFIG_SANDBOX_GPIO=y
CONFIG_DM_HWSPINLOCK=y
CONFIG_HWSPINLOCK_SANDBOX=y
CONFIG_DM_I2C_COMPAT=y
CONFIG_I2C_CROS_EC_TUNNEL=y
CONFIG_I2C_CROS_EC_LDO=y
CONFIG_DM_I2C_GPIO=y

1
configs/sandbox_flattree_defconfig
View file

@ -75,7 +75,6 @@ CONFIG_BOARD=y
CONFIG_BOARD_SANDBOX=y
CONFIG_PM8916_GPIO=y
CONFIG_SANDBOX_GPIO=y
CONFIG_DM_I2C_COMPAT=y
CONFIG_I2C_CROS_EC_TUNNEL=y
CONFIG_I2C_CROS_EC_LDO=y
CONFIG_DM_I2C_GPIO=y

1
configs/sandbox_noblk_defconfig
View file

@ -81,7 +81,6 @@ CONFIG_BOARD=y
CONFIG_BOARD_SANDBOX=y
CONFIG_PM8916_GPIO=y
CONFIG_SANDBOX_GPIO=y
CONFIG_DM_I2C_COMPAT=y
CONFIG_I2C_CROS_EC_TUNNEL=y
CONFIG_I2C_CROS_EC_LDO=y
CONFIG_DM_I2C_GPIO=y

1
configs/sandbox_spl_defconfig
View file

@ -96,7 +96,6 @@ CONFIG_BOARD=y
CONFIG_BOARD_SANDBOX=y
CONFIG_PM8916_GPIO=y
CONFIG_SANDBOX_GPIO=y
CONFIG_DM_I2C_COMPAT=y
CONFIG_I2C_CROS_EC_TUNNEL=y
CONFIG_I2C_CROS_EC_LDO=y
CONFIG_DM_I2C_GPIO=y

1
configs/tools-only_defconfig
View file

@ -12,7 +12,6 @@ CONFIG_DEFAULT_DEVICE_TREE="sandbox"
CONFIG_IP_DEFRAG=y
# CONFIG_UDP_FUNCTION_FASTBOOT is not set
CONFIG_SANDBOX_GPIO=y
CONFIG_DM_I2C_COMPAT=y
CONFIG_PCI=y
CONFIG_DM_PCI=y
CONFIG_PCI_SANDBOX=y

13
drivers/i2c/Kconfig
View file

@ -12,18 +12,7 @@ config DM_I2C
write and speed, is implemented with the bus drivers operations,
which provide methods for bus setting and data transfer. Each chip
device (bus child) info is kept as parent platdata. The interface
is defined in include/i2c.h. When i2c bus driver supports the i2c
uclass, but the device drivers not, then DM_I2C_COMPAT config can
be used as compatibility layer.
config DM_I2C_COMPAT
bool "Enable I2C compatibility layer"
depends on DM
help
Enable old-style I2C functions for compatibility with existing code.
This option can be enabled as a temporary measure to avoid needing
to convert all code for a board in a single commit. It should not
be enabled for any board in an official release.
is defined in include/i2c.h.
config I2C_CROS_EC_TUNNEL
tristate "Chrome OS EC tunnel I2C bus"

1
drivers/i2c/Makefile
View file

@ -3,7 +3,6 @@
# (C) Copyright 2000-2007
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
obj-$(CONFIG_DM_I2C) += i2c-uclass.o
obj-$(CONFIG_DM_I2C_COMPAT) += i2c-uclass-compat.o
obj-$(CONFIG_DM_I2C_GPIO) += i2c-gpio.o
obj-$(CONFIG_$(SPL_)I2C_CROS_EC_TUNNEL) += cros_ec_tunnel.o
obj-$(CONFIG_$(SPL_)I2C_CROS_EC_LDO) += cros_ec_ldo.o

128
drivers/i2c/i2c-uclass-compat.c
View file

@ -1,128 +0,0 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (c) 2014 Google, Inc
*/
#include <common.h>
#include <dm.h>
#include <errno.h>
#include <i2c.h>
static int cur_busnum __attribute__((section(".data")));
static int i2c_compat_get_device(uint chip_addr, int alen,
struct udevice **devp)
{
struct dm_i2c_chip *chip;
int ret;
ret = i2c_get_chip_for_busnum(cur_busnum, chip_addr, alen, devp);
if (ret)
return ret;
chip = dev_get_parent_platdata(*devp);
if (chip->offset_len != alen) {
printf("I2C chip %x: requested alen %d does not match chip offset_len %d\n",
chip_addr, alen, chip->offset_len);
return -EADDRNOTAVAIL;
}
return 0;
}
int i2c_probe(uint8_t chip_addr)
{
struct udevice *bus, *dev;
int ret;
ret = uclass_get_device_by_seq(UCLASS_I2C, cur_busnum, &bus);
if (ret) {
debug("Cannot find I2C bus %d: err=%d\n", cur_busnum, ret);
return ret;
}
if (!bus)
return -ENOENT;
return dm_i2c_probe(bus, chip_addr, 0, &dev);
}
int i2c_read(uint8_t chip_addr, unsigned int addr, int alen, uint8_t *buffer,
int len)
{
struct udevice *dev;
int ret;
ret = i2c_compat_get_device(chip_addr, alen, &dev);
if (ret)
return ret;
return dm_i2c_read(dev, addr, buffer, len);
}
int i2c_write(uint8_t chip_addr, unsigned int addr, int alen, uint8_t *buffer,
int len)
{
struct udevice *dev;
int ret;
ret = i2c_compat_get_device(chip_addr, alen, &dev);
if (ret)
return ret;
return dm_i2c_write(dev, addr, buffer, len);
}
int i2c_get_bus_num_fdt(int node)
{
struct udevice *bus;
int ret;
ret = uclass_get_device_by_of_offset(UCLASS_I2C, node, &bus);
if (ret)
return ret;
return bus->seq;
}
unsigned int i2c_get_bus_num(void)
{
return cur_busnum;
}
int i2c_set_bus_num(unsigned int bus)
{
cur_busnum = bus;
return 0;
}
void i2c_init(int speed, int slaveaddr)
{
/* Nothing to do here - the init happens through driver model */
}
void board_i2c_init(const void *blob)
{
/* Nothing to do here - the init happens through driver model */
}
uint8_t i2c_reg_read(uint8_t chip_addr, uint8_t offset)
{
struct udevice *dev;
int ret;
ret = i2c_compat_get_device(chip_addr, 1, &dev);
if (ret)
return 0xff;
return dm_i2c_reg_read(dev, offset);
}
void i2c_reg_write(uint8_t chip_addr, uint8_t offset, uint8_t val)
{
struct udevice *dev;
int ret;
ret = i2c_compat_get_device(chip_addr, 1, &dev);
if (!ret)
dm_i2c_reg_write(dev, offset, val);
}

48
drivers/mtd/nand/raw/davinci_nand.c
View file

@ -31,6 +31,7 @@
#include <common.h>
#include <asm/io.h>
#include <nand.h>
#include <dm/uclass.h>
#include <asm/ti-common/davinci_nand.h>
/* Definitions for 4-bit hardware ECC */
@ -730,7 +731,7 @@ static int nand_davinci_dev_ready(struct mtd_info *mtd)
return __raw_readl(&davinci_emif_regs->nandfsr) & 0x1;
}
void davinci_nand_init(struct nand_chip *nand)
static void davinci_nand_init(struct nand_chip *nand)
{
#if defined CONFIG_KEYSTONE_RBL_NAND
int i;
@ -785,10 +786,53 @@ void davinci_nand_init(struct nand_chip *nand)
nand->dev_ready = nand_davinci_dev_ready;
}
int board_nand_init(struct nand_chip *chip) __attribute__((weak));
#ifdef CONFIG_SYS_NAND_SELF_INIT
static int davinci_nand_probe(struct udevice *dev)
{
struct nand_chip *nand = dev_get_priv(dev);
struct mtd_info *mtd = nand_to_mtd(nand);
int ret;
nand->IO_ADDR_R = (void __iomem *)CONFIG_SYS_NAND_BASE;
nand->IO_ADDR_W = (void __iomem *)CONFIG_SYS_NAND_BASE;
davinci_nand_init(nand);
ret = nand_scan(mtd, CONFIG_SYS_NAND_MAX_CHIPS);
if (ret)
return ret;
return nand_register(0, mtd);
}
static const struct udevice_id davinci_nand_ids[] = {
{ .compatible = "ti,davinci-nand" },
{ }
};
U_BOOT_DRIVER(davinci_nand) = {
.name = "davinci-nand",
.id = UCLASS_MTD,
.of_match = davinci_nand_ids,
.probe = davinci_nand_probe,
.priv_auto_alloc_size = sizeof(struct nand_chip),
};
void board_nand_init(void)
{
struct udevice *dev;
int ret;
ret = uclass_get_device_by_driver(UCLASS_MTD,
DM_GET_DRIVER(davinci_nand), &dev);
if (ret && ret != -ENODEV)
pr_err("Failed to initialize %s: %d\n", dev->name, ret);
}
#else
int board_nand_init(struct nand_chip *chip) __attribute__((weak));
int board_nand_init(struct nand_chip *chip)
{
davinci_nand_init(chip);
return 0;
}
#endif /* CONFIG_SYS_NAND_SELF_INIT */

3
include/_exports.h
View file

@ -40,8 +40,7 @@
EXPORT_FUNC(simple_strtol, long, simple_strtol,
const char *, char **, unsigned int)
EXPORT_FUNC(strcmp, int, strcmp, const char *cs, const char *ct)
#if defined(CONFIG_CMD_I2C) && \
(!defined(CONFIG_DM_I2C) || defined(CONFIG_DM_I2C_COMPAT))
#if defined(CONFIG_CMD_I2C) && !defined(CONFIG_DM_I2C)
EXPORT_FUNC(i2c_write, int, i2c_write, uchar, uint, int , uchar * , int)
EXPORT_FUNC(i2c_read, int, i2c_read, uchar, uint, int , uchar * , int)
#else

1
include/configs/am3517_evm.h
View file

@ -14,7 +14,6 @@
#include <configs/ti_omap3_common.h>
#undef CONFIG_DM_I2C_COMPAT
#define CONFIG_REVISION_TAG
/* Hardware drivers */

4
include/configs/da850evm.h
View file

@ -174,6 +174,10 @@
#define CONFIG_SPL_NAND_DRIVERS
#define CONFIG_SPL_NAND_ECC
#define CONFIG_SPL_NAND_LOAD
#ifndef CONFIG_SPL_BUILD
#define CONFIG_SYS_NAND_SELF_INIT
#endif
#endif
/*

8
include/configs/omapl138_lcdk.h
View file

@ -16,14 +16,6 @@
#undef CONFIG_USE_SPIFLASH
#undef CONFIG_SYS_USE_NOR
/*
* Disable DM_* for SPL build and can be re-enabled after adding
* DM support in SPL
*/
#ifdef CONFIG_SPL_BUILD
#undef CONFIG_DM_I2C
#undef CONFIG_DM_I2C_COMPAT
#endif
/*
* SoC Configuration
*/

3
include/exports.h
View file

@ -32,8 +32,7 @@ long simple_strtol(const char *cp, char **endp, unsigned int base);
int strcmp(const char *cs, const char *ct);
unsigned long ustrtoul(const char *cp, char **endp, unsigned int base);
unsigned long long ustrtoull(const char *cp, char **endp, unsigned int base);
#if defined(CONFIG_CMD_I2C) && \
(!defined(CONFIG_DM_I2C) || defined(CONFIG_DM_I2C_COMPAT))
#if defined(CONFIG_CMD_I2C) && !defined(CONFIG_DM_I2C)
int i2c_write (uchar, uint, int , uchar* , int);
int i2c_read (uchar, uint, int , uchar* , int);
#endif

80
include/i2c.h
View file

@ -271,86 +271,6 @@ int i2c_get_chip_offset_len(struct udevice *dev);
*/
int i2c_deblock(struct udevice *bus);
#ifdef CONFIG_DM_I2C_COMPAT
/**
* i2c_probe() - Compatibility function for driver model
*
* Calls dm_i2c_probe() on the current bus
*/
int i2c_probe(uint8_t chip_addr);
/**
* i2c_read() - Compatibility function for driver model
*
* Calls dm_i2c_read() with the device corresponding to @chip_addr, and offset
* set to @addr. @alen must match the current setting for the device.
*/
int i2c_read(uint8_t chip_addr, unsigned int addr, int alen, uint8_t *buffer,
int len);
/**
* i2c_write() - Compatibility function for driver model
*
* Calls dm_i2c_write() with the device corresponding to @chip_addr, and offset
* set to @addr. @alen must match the current setting for the device.
*/
int i2c_write(uint8_t chip_addr, unsigned int addr, int alen, uint8_t *buffer,
int len);
/**
* i2c_get_bus_num_fdt() - Compatibility function for driver model
*
* @return the bus number associated with the given device tree node
*/
int i2c_get_bus_num_fdt(int node);
/**
* i2c_get_bus_num() - Compatibility function for driver model
*
* @return the 'current' bus number
*/
unsigned int i2c_get_bus_num(void);
/**
* i2c_set_bus_num() - Compatibility function for driver model
*
* Sets the 'current' bus
*/
int i2c_set_bus_num(unsigned int bus);
static inline void I2C_SET_BUS(unsigned int bus)
{
i2c_set_bus_num(bus);
}
static inline unsigned int I2C_GET_BUS(void)
{
return i2c_get_bus_num();
}
/**
* i2c_init() - Compatibility function for driver model
*
* This function does nothing.
*/
void i2c_init(int speed, int slaveaddr);
/**
* board_i2c_init() - Compatibility function for driver model
*
* @param blob Device tree blbo
* @return the number of I2C bus
*/
void board_i2c_init(const void *blob);
/*
* Compatibility functions for driver model.
*/
uint8_t i2c_reg_read(uint8_t addr, uint8_t reg);
void i2c_reg_write(uint8_t addr, uint8_t reg, uint8_t val);
#endif
/**
* struct dm_i2c_ops - driver operations for I2C uclass
*