Commit graph

53865 commits

Author SHA1 Message Date
Anup Patel
ef8c3d3fce riscv: qemu: Use different SYS_TEXT_BASE for S-mode
When u-boot runs in S-mode, the M-mode runtime firmware
(BBL or equivalent) uses memory range in 0x80000000 to
0x80200000. Due to this, we cannot use 0x80000000 as
SYS_TEXT_BASE when running in S-mode. Instead for S-mode,
we use 0x80200000 as SYS_TEXT_BASE.

Even Linux RISC-V kernel ignores/reserves memory range
0x80000000 to 0x80200000 because it runs in S-mode.

Signed-off-by: Anup Patel <anup@brainfault.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
2018-12-05 14:13:59 +08:00
Anup Patel
d2db2a8fa4 riscv: Add kconfig option to run U-Boot in S-mode
This patch adds kconfig option RISCV_SMODE to run U-Boot in
S-mode. When this opition is enabled we use s<xyz> CSRs instead
of m<xyz> CSRs.

It is important to note that there is no equivalent S-mode CSR
for misa and mhartid CSRs so we expect M-mode runtime firmware
(BBL or equivalent) to emulate misa and mhartid CSR read.

In-future, we will have more patches to avoid accessing misa and
mhartid CSRs from S-mode.

Signed-off-by: Anup Patel <anup@brainfault.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
2018-12-05 14:13:53 +08:00
Tom Rini
2e2a2a5d4f Merge branch 'master' of git://git.denx.de/u-boot-sh
- DT sync with Linux 4.19 and minor fixes.
2018-12-04 19:22:31 -05:00
Marek Vasut
0451380505 ARM: dts: Turn ULCB into Multi-DTB config
Bundle DTBs for R8A7795, R8A7796 ULCB variants into single U-Boot
build and let U-Boot choose between them based on the CPU model.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-12-04 09:21:07 +01:00
Marek Vasut
14ebe87b58 ARM: dts: Turn Salvator-X into Multi-DTB config
Bundle DTBs for R8A7795, R8A7796, R8A77965 Salvator-X variants
into the single U-Boot build and let U-Boot choose between them
based on the CPU model.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-12-04 09:21:07 +01:00
Marek Vasut
3ba61f0672 ARM: rmobile: Drop unused macros from Gen3 boards
Drop unused MSTP macros from Gen3 boards. These are no longer needed
as the boards are using clock framework to manipulate clock.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-12-04 09:21:07 +01:00
Marek Vasut
00e4b57e9e ARM: rmobile: Set environment variable containing CPU type
Set environment variable 'platform' containing the CPU type.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-12-04 09:21:07 +01:00
Marek Vasut
66582cf6da ARM: rmobile: Enable MMC extensions
Enable extended MMC commands and GPT partition table support.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
---
V2: Rebase on u-boot/master
2018-12-04 09:21:07 +01:00
Marek Vasut
cbff9f80ce ARM: dts: rmobile: Sync Gen3 DTs with Linux 4.19.6
Synchronize DTs with mainline Linux 4.19.6 ,
commit 96db90800c06d3fe3fa08eb6222fe201286bb778

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
---
V2: Rebase on u-boot/master
2018-12-04 09:21:07 +01:00
Marek Vasut
3b255531b6 ARM: dts: rmobile: Sync Gen2 DTs with Linux 4.19.6
Synchronize DTs with mainline Linux 4.19.6 ,
commit 96db90800c06d3fe3fa08eb6222fe201286bb778

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
---
V2: Rebase on u-boot/master
2018-12-04 09:21:07 +01:00
Marek Vasut
4e96b693ee ARM: dts: rmobile: Extract i2c6 on M2W Porter
The i2c6 node is missing in mainline Linux thus far, pull it
into U-Boot specific DT until it hits mainline Linux, to make
syncing of DTs easier.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
---
V2: Rebase on u-boot/master
2018-12-04 09:21:07 +01:00
Marek Vasut
47179e5737 ARM: dts: rmobile: Extract SCIF2 node on E3 Ebisu
The SCIF2 node is not in Linux 4.17 DTs on E3, pull it into U-Boot
specific DT extras until it hits mainline Linux, to make syncing of
DTs easier.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
---
V2: Rebase on u-boot/master
2018-12-04 09:21:07 +01:00
Marek Vasut
6bdb7a80cb ARM: dts: rmobile: Extract SDHI nodes on E3 Ebisu
The SDHI nodes are not in Linux 4.17 DTs in E3, pull them into U-Boot
specific DT extras until they hit mainline Linux, to make syncing of
DTs easier.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
---
V2: Rebase on u-boot/master
2018-12-04 09:21:07 +01:00
Marek Vasut
1bce3ec801 ARM: dts: rmobile: Extract SDHI extras on H3, M3W, M3N Salvator-X
The SDHI nodes are missing features supported in upstream U-Boot,
like mode support properties. Pull the extras into U-Boot specific
DT until it hits mainline Linux, to make syncing of DTs easier.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
---
V2: Rebase on u-boot/master
2018-12-04 09:21:07 +01:00
Marek Vasut
750a147b3c ARM: dts: rmobile: Extract SDHI extras on H3 and M3W ULCB
The SDHI nodes are missing features supported in upstream U-Boot,
like mode support properties. Pull the extras into U-Boot specific
DT until it hits mainline Linux, to make syncing of DTs easier.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
---
V2: Rebase on u-boot/master
2018-12-04 09:21:07 +01:00
Marek Vasut
d2038b26e7 ARM: dts: rmobile: Extract CPLD node on H3 and M3W ULCB
The CPLD node is missing in Linux 4.17 DTs on H3/M3W ULCB, pull the
node into U-Boot specific DT until it hits mainline Linux, to make
syncing of DTs easier.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
---
V2: Rebase on u-boot/master
2018-12-04 09:21:07 +01:00
Marek Vasut
1172ade967 ARM: dts: rmobile: Extract AVB node extras on V3M Eagle
The AVB node is not complete in Linux 4.17 DTs on V3M Eagle, pull the
AVB node extras into U-Boot specific DT until they hit mainline Linux,
to make syncing of DTs easier.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
---
V2: Rebase on u-boot/master
2018-12-04 09:21:07 +01:00
Marek Vasut
830b94f768 ARM: dts: rmobile: Extract SDHI nodes on M3N
The SDHI nodes are not in Linux 4.17 DTs in M3N, pull them into U-Boot
specific DT extras until they hit mainline Linux, to make syncing of
DTs easier.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
---
V2: Rebase on u-boot/master
2018-12-04 09:21:07 +01:00
Marek Vasut
f529bc551b ARM: dts: rmobile: Extract USB nodes on M3N
The USB nodes are not in Linux 4.17 DTs in M3N, pull them into U-Boot
specific DT extras until they hit mainline Linux, to make syncing of
DTs easier.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
---
V2: Rebase on u-boot/master
2018-12-04 09:21:07 +01:00
Marek Vasut
8c7d9e1f62 ARM: dts: rmobile: Extract RPC node to u-boot specific DT
The RPC DT bindings are still work in progress. Extract the RPC DT node
from the DT to allow easier update and so it can be replaced once the DT
bindings are stable.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
---
V2: Rebase on u-boot/master
2018-12-04 09:21:07 +01:00
Marek Vasut
a89929bbb3 ARM: dts: rmobile: Add soc label to Gen3
Add label to the /soc node, so it can be referenced from the U-Boot DTs.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
---
V2: Rebase on u-boot/master
2018-12-04 09:21:07 +01:00
Marek Vasut
07a8060a12 ARM: rmobile: Convert to bootm_size
Convert all Renesas R-Car boards to bootm_size of 256 MiB and drop both
fdt_high and initrd_high. This change implies that the FDT and initrd
will always be copied into the first 256 MiB of RAM instead of being
used in place, which can cause various kinds of inobvious problems.

The simpler problems include FDT or initrd being overwritten or being
used from unaligned addresses, especially on ARM64. The overhead of
copying the FDT to aligned location is negligible and these problems
go away, so the benefit is significant.

Regarding alignment problems with fitImage. The alignment of DT properties
is always 32 bits, which implies that the alignment of the "data" property
in fitImage is also 32 bits. The /incbin/ syntax plays no role here. The
kernel expects all elements, including DT and initrd, to be aligned to
64 bits on ARM64, thus using them in place may not be possible. Using the
bootm_size assures correct alignment, again with negligible overhead.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Cc: Tom Rini <trini@konsulko.com>
2018-12-04 09:21:06 +01:00
Marek Vasut
cf345760bd mmc: Do not issue CMD 6 on SD 1.00 and SD 1.01
According to SD Specifications Part 1 Physical Layer Simplified Specification
Version 6.00 August 29, 2018, section 4.3.10 (Switch Function Command) and
section 5.6 (SCR register), SD cards version 1.00 and 1.01 do not support the
SD CMD 6.

Currently, U-Boot will issue CMD 6 unconditionally in sd_set_card_speed()
while configuring the bus for selected frequency. This will make SD cards
version 1.00 and 1.01 time out and thus fail detection altogether.

Fix this by not sending CMD 6 on such cards. Tested on Matsushita Electric
Industrial Co., Ltd. Japan RP-SD008B / Victor 8MB SD card, CU-SD008, which
is correctly detected with this patch as:

Device: sd@ee160000
Manufacturer ID: 1
OEM: 5041
Name: S008B
Bus Speed: 25000000
Mode : SD Legacy
Rd Block Len: 512
SD version 1.0
High Capacity: No
Capacity: 6.5 MiB
Bus Width: 4-bit
Erase Group Size: 512 Bytes

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-12-04 09:21:06 +01:00
Tom Rini
d452f27b3e Prepare v2019.01-rc1
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-12-03 23:50:13 -05:00
Jorge Ramirez-Ortiz
94981c9859 MAINTAINERS: board: qcom: db820c: update email.
Update email address

Signed-off-by: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
2018-12-03 21:50:54 -05:00
Simon Goldschmidt
1a67969a99 Revert "serial: ns16550: fix debug uart putc called before init"
This reverts commit 6f57c34473 since it
does not seem to work at least on rk3399.

The Rockchip Technical Reference Manual (TRM) for the rk3399 says the baud
rate prescaler register is readable only when USR[0] is zero. Since this
bit is defined as "reserved" in the socfpga cylcone5 TRM, let's rather
drop this than making the ns16550 debug uart more platform specific.

Reported-by: Roosen Henri <Henri.Roosen@ginzinger.com>
Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com
2018-12-03 21:50:47 -05:00
Tom Rini
7cfc1a381e dm: MIGRATION: Update migration plan for BLK
The biggest part of migration to using CONFIG_BLK is that we need to
have the various subsystems migrated first, so reword the plan here to
reference the new deadlines.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-12-03 19:31:13 -05:00
Tom Rini
ea9d7c17fc dm: MIGRATION: Add migration plan for CONFIG_SATA
As the core of the subsystem has been converted along with some of the
drivers, formalize a deadline for migration.

Cc: Akshay Bhat <akshaybhat@timesys.com>
Cc: Andreas Geisreiter <ageisreiter@dh-electronics.de>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Christian Gmeiner <christian.gmeiner@gmail.com>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Jason Liu <jason.hui.liu@nxp.com>
Cc: Ken Lin <Ken.Lin@advantech.com.tw>
Cc: Ludwig Zenz <lzenz@dh-electronics.de>
Cc: Marek Vasut <marex@denx.de>
Cc: Max Krummenacher <max.krummenacher@toradex.com>
Cc: Nikita Kiryanov <nikita@compulab.co.il>
Cc: Otavio Salvador <otavio@ossystems.com.br>
Cc: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Cc: Soeren Moch <smoch@web.de>
Cc: Stefan Roese <sr@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Tim Harvey <tharvey@gateworks.com>
Cc: Troy Kisky <troy.kisky@boundarydevices.com>
Cc: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
Cc: York Sun <york.sun@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-12-03 19:31:13 -05:00
Tom Rini
109d8bf3ac dm: MIGRATION: Add migration plan for DM_USB
As much of the USB system has been migrated to DM now, formalize a
deadline for migration.

Reviewed-by: Marek Vasut <marex@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-12-03 19:31:13 -05:00
Tom Rini
1cb5d5df38 dm: MIGRATION: Add migration plan for DM_MMC
Given that at this point the MMC subsystem itself has been migrated
along with a number of subsystem drivers, formalize a deadline for
migration.

Reviewed-by: Simon Glass <sjg@chromium.org>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-12-03 19:31:13 -05:00
Tom Rini
0a3d59e010 Xilinx changes for v2019.01
microblaze:
 - Use default functions for memory decoding
 - Showing model from DT
 
 zynq:
 - Fix spi flash DTs
 - Fix zynq_help_text with CONFIG_SYS_LONGHELP
 - Tune cse/mini configurations
 - Enabling cse/mini testing with current targets
 
 zynqmp:
 - Enable gzip SPL support
 - Fix chip detection logic
 - Tune mini configurations
 - DT fixes(spi-flash, models, clocks, etc)
 - Add support for OF_SEPARATE configurations
 - Enabling mini testing with current targets
 - Add mini mtest configuration
 - Some minor config setting
 
 nand:
 - arasan: Add subpage configuration
 
 net:
 - gem: Add 64bit DMA support
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Merge tag 'xilinx-for-v2019.01' of git://git.denx.de/u-boot-microblaze

Xilinx changes for v2019.01

microblaze:
- Use default functions for memory decoding
- Showing model from DT

zynq:
- Fix spi flash DTs
- Fix zynq_help_text with CONFIG_SYS_LONGHELP
- Tune cse/mini configurations
- Enabling cse/mini testing with current targets

zynqmp:
- Enable gzip SPL support
- Fix chip detection logic
- Tune mini configurations
- DT fixes(spi-flash, models, clocks, etc)
- Add support for OF_SEPARATE configurations
- Enabling mini testing with current targets
- Add mini mtest configuration
- Some minor config setting

nand:
- arasan: Add subpage configuration

net:
- gem: Add 64bit DMA support
2018-12-03 19:30:54 -05:00
Tom Rini
9981c60ef5 Patch queue for rpi - 2018-12-03
A few Raspberry Pi specific changes this time:
 
   - Allow 2nd MMC device
   - Support RPi 3 Model A+
   - Allow UUID to find filesystem
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Merge tag 'signed-rpi-next' of git://github.com/agraf/u-boot

Patch queue for rpi - 2018-12-03

A few Raspberry Pi specific changes this time:

  - Allow 2nd MMC device
  - Support RPi 3 Model A+
  - Allow UUID to find filesystem
2018-12-03 17:52:53 -05:00
Tom Rini
f388e3bed7 Patch queue for efi - 2018-12-03
This release is fully packed with lots of glorious improvements in UEFI
 land again!
 
   - Make PE images more standards compliant
   - Improve sandbox support
   - Improve correctness
   - Fix RISC-V execution on virt model
   - Honor board defined top of ram (fixes a few boards)
   - Imply DM USB access when distro boot is available
   - Code cleanups
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Merge tag 'signed-efi-next' of git://github.com/agraf/u-boot

Patch queue for efi - 2018-12-03

This release is fully packed with lots of glorious improvements in UEFI
land again!

  - Make PE images more standards compliant
  - Improve sandbox support
  - Improve correctness
  - Fix RISC-V execution on virt model
  - Honor board defined top of ram (fixes a few boards)
  - Imply DM USB access when distro boot is available
  - Code cleanups
2018-12-03 17:52:40 -05:00
Tom Rini
ec0d0d8742 Merge branch 'master' of git://git.denx.de/u-boot-sh
- MMC fixes for R-Car Gen3
2018-12-03 17:51:45 -05:00
Tom Rini
cf7c6f5333 Merge branch '2018-12-03-master-imports'
- Baltos platform updates
- rtc m41t62 converted to DM.
- PowerPC MPC8xx DM conversion
- Verified boot updates
2018-12-03 16:23:03 -05:00
Jonathan Gray
d61cf138bc rpi: add 3 Model A+
Add Raspberry Pi 3 Model A+ to list of models, the revision code is 0xE
according to the list on raspberrypi.org.

Signed-off-by: Jonathan Gray <jsg@jsg.id.au>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-12-03 20:25:06 +01:00
Jonathan Gray
cb3f94718d rpi: add URL of official revision code list
Replace various third party lists of Raspberry Pi revision codes in a
comment with the list on raspberrypi.org.

Signed-off-by: Jonathan Gray <jsg@jsg.id.au>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-12-03 20:25:06 +01:00
Christophe Leroy
fb0204e48b spi, mpc8xx: migrate to DM_SPI
Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
2018-12-03 10:44:10 -05:00
Christophe Leroy
c1cd921b75 board_r: fix build with DM_SPI
CC      common/board_r.o
common/board_r.c:747:2: error: ‘initr_spi’ undeclared here (not in a function)
  initr_spi,
  ^
make[1]: *** [common/board_r.o] Error 1

Fixes: ebe76a2df9 ("dm: Remove spi_init() from board_r.c when using driver model")
Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
2018-12-03 10:44:10 -05:00
Christophe Leroy
42b54013a0 drivers: serial: get rid of non DM mpc8xx driver
Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
2018-12-03 10:44:10 -05:00
Christophe Leroy
a8b8645fa9 board: MCR3000: migrate to DM_SERIAL
Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
2018-12-03 10:44:10 -05:00
Christophe Leroy
bdfa11ebcf drivers: serial: migrate mpc8xx to DM
Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
2018-12-03 10:44:10 -05:00
Christophe Leroy
4c4ca6cdd5 board: MCR3000: use new DM watchdog
This patch switches MCR3000 board to the new DM watchdog.

The change in u-boot.lds is because MCR3000.o grows a bit
with this patch and doesn't fit anymore below env_offset on
some versions of GCC.

Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
2018-12-03 10:44:10 -05:00
Christophe Leroy
749c9aae9d drivers: watchdog: add a DM driver for the MPC8xx watchdog
This patch adds a DM driver for the MPC8xx watchdog.
Basically, the watchdog is enabled by default from the start and
SYPCR register has to be writen once to set the timeout and/or
deactivate the watchdog. Once written, it cannot be written again.

It means that wdt_stop() can be called before wdt_start() to stop the
watchdog, but cannot be called if wdt_start() has been called.

Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
2018-12-03 10:44:10 -05:00
Christophe Leroy
f55db0afa2 board: MCR3000: Activate CONFIG_DM and CONFIG_OF_CONTROL
Add mcr3000 device tree and activate CONFIG_DM and CONFIG_OF_CONTROL

Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
2018-12-03 10:44:10 -05:00
Christophe Leroy
71c743c5f7 powerpc, mpc8xx: clear top of stack
Reported-by: Joakim Tjernlund <Joakim.Tjernlund@infinera.com>
Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
Reviewed-by: Joakim Tjernlund <Joakim.Tjernlund@infinera.com>
2018-12-03 10:44:10 -05:00
Philippe Reynes
ed47097a04 test: vboot: clean its file
This update the its file used in vboot test to respect the new
node style name defined in doc/uImage.FIT (for example: replace
kernel@1 by kernel and fdt@1 by fdt-1)

Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-12-03 10:44:10 -05:00
Philippe Reynes
e246b728ee test: vboot: add padding pss for rsa signature
The padding pss is now supported for rsa signature.
This add test with padding pss on vboot test.

Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-12-03 10:44:10 -05:00
Philippe Reynes
b0ec829978 configs: sandbox: enable padding pss for rsa signature
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-12-03 10:44:10 -05:00
Philippe Reynes
e83cf2fbfc doc: uImage.FIT: signature.txt: add option padding
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-12-03 10:44:10 -05:00