ARM: dts: rmobile: Extract SDHI extras on H3 and M3W ULCB

The SDHI nodes are missing features supported in upstream U-Boot,
like mode support properties. Pull the extras into U-Boot specific
DT until it hits mainline Linux, to make syncing of DTs easier.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
---
V2: Rebase on u-boot/master
This commit is contained in:
Marek Vasut 2018-12-03 20:55:01 +01:00 committed by Marek Vasut
parent d2038b26e7
commit 750a147b3c
3 changed files with 45 additions and 9 deletions

View file

@ -18,3 +18,24 @@
gpio-sstbz = <&gpio2 3 0>;
};
};
&sdhi2_pins {
groups = "sdhi2_data8", "sdhi2_ctrl", "sdhi2_ds";
power-source = <1800>;
};
&sdhi2_pins_uhs {
groups = "sdhi2_data8", "sdhi2_ctrl", "sdhi2_ds";
};
&sdhi0 {
sd-uhs-sdr12;
sd-uhs-sdr25;
sd-uhs-sdr104;
max-frequency = <208000000>;
};
&sdhi2 {
mmc-hs400-1_8v;
max-frequency = <200000000>;
};

View file

@ -18,3 +18,24 @@
gpio-sstbz = <&gpio2 3 0>;
};
};
&sdhi2_pins {
groups = "sdhi2_data8", "sdhi2_ctrl", "sdhi2_ds";
power-source = <1800>;
};
&sdhi2_pins_uhs {
groups = "sdhi2_data8", "sdhi2_ctrl", "sdhi2_ds";
};
&sdhi0 {
sd-uhs-sdr12;
sd-uhs-sdr25;
sd-uhs-sdr104;
max-frequency = <208000000>;
};
&sdhi2 {
mmc-hs400-1_8v;
max-frequency = <200000000>;
};

View file

@ -299,13 +299,13 @@
};
sdhi2_pins: sd2 {
groups = "sdhi2_data8", "sdhi2_ctrl", "sdhi2_ds";
groups = "sdhi2_data8", "sdhi2_ctrl";
function = "sdhi2";
power-source = <1800>;
power-source = <3300>;
};
sdhi2_pins_uhs: sd2_uhs {
groups = "sdhi2_data8", "sdhi2_ctrl", "sdhi2_ds";
groups = "sdhi2_data8", "sdhi2_ctrl";
function = "sdhi2";
power-source = <1800>;
};
@ -387,12 +387,8 @@
vqmmc-supply = <&vccq_sdhi0>;
cd-gpios = <&gpio3 12 GPIO_ACTIVE_LOW>;
bus-width = <4>;
sd-uhs-sdr12;
sd-uhs-sdr25;
sd-uhs-sdr50;
sd-uhs-sdr104;
status = "okay";
max-frequency = <208000000>;
};
&sdhi2 {
@ -405,10 +401,8 @@
vqmmc-supply = <&reg_1p8v>;
bus-width = <8>;
mmc-hs200-1_8v;
mmc-hs400-1_8v;
non-removable;
status = "okay";
max-frequency = <200000000>;
};
&ssi1 {