Commit graph

354 commits

Author SHA1 Message Date
Mike Frysinger
464c79207c punt unused clean/distclean targets
The top level Makefile does not do any recursion into subdirs when
cleaning, so these clean/distclean targets in random arch/board dirs
never get used.  Punt them all.

MAKEALL didn't report any errors related to this that I could see.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-10-15 22:20:36 +02:00
Wolfgang Denk
f0c0b3a9e6 Fix incorrect use of getenv() before relocation
A large number of boards incorrectly used getenv() in their board init
code running before relocation.  In some cases this caused U-Boot to
hang when certain environment variables grew too long.
Fix the code to use getenv_r().

Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Stefan Roese <sr@denx.de>
Cc: The LEOX team <team@leox.org>
Cc: Michael Schwingen <michael@schwingen.org>
Cc: Georg Schardt <schardt@team-ctech.de>
Cc: Werner Pfister <Pfister_Werner@intercontrol.de>
Cc: Dirk Eibach <eibach@gdsys.de>
Cc: Peter De Schrijver <p2@mind.be>
Cc: John Zhan <zhanz@sinovee.com>
Cc: Rishi Bhattacharya <rishi@ti.com>
Cc: Peter Tyser <ptyser@xes-inc.com>
2011-05-12 19:48:42 +02:00
Scott Wood
83b7e2a7f2 Handle most LDSCRIPT setting centrally
Currently, some linker scripts are found by common code in config.mk.
Some are found using CONFIG_SYS_LDSCRIPT, but the code for that is
sometimes in arch config.mk and sometimes in board config.mk.  Some
are found using an arch-specific rule for looking in CPUDIR, etc.

Further, the powerpc config.mk rule relied on CONFIG_NAND_SPL
when it really wanted CONFIG_NAND_U_BOOT -- which covered up the fact
that not all NAND_U_BOOT builds actually wanted CPUDIR/u-boot-nand.lds.

Replace all of this -- except for a handful of boards that are actually
selecting a linker script in a unique way -- with centralized ldscript
finding.

If board code specifies LDSCRIPT, that will be used.
Otherwise, if CONFIG_SYS_LDSCRIPT is specified, that will be used.

If neither of these are specified, then the central config.mk will
check for the existence of the following, in order:

$(TOPDIR)/board/$(BOARDDIR)/u-boot-nand.lds (only if CONFIG_NAND_U_BOOT)
$(TOPDIR)/$(CPUDIR)/u-boot-nand.lds (only if CONFIG_NAND_U_BOOT)
$(TOPDIR)/board/$(BOARDDIR)/u-boot.lds
$(TOPDIR)/$(CPUDIR)/u-boot.lds

Some boards (sc3, cm5200, munices) provided their own u-boot.lds that
were dead code, because they were overridden by a CPUDIR u-boot.lds under
the old powerpc rules.  These boards' own u-boot.lds have bitrotted and
no longer work -- these lds files have been removed.

Signed-off-by: Scott Wood <scottwood@freescale.com>
Tested-by: Graeme Russ <graeme.russ@gmail.com>
2011-04-30 00:59:47 +02:00
Po-Yu Chuang
44c6e6591c rename _end to __bss_end__
Currently, _end is used for end of BSS section.  We want _end to mean
end of u-boot image, so we rename _end to __bss_end__ first.

Signed-off-by: Po-Yu Chuang <ratbert@faraday-tech.com>
2011-03-27 19:18:37 +02:00
Felix Radensky
da7d3dffac PPC4xx: Reduce NAND TLB window size on Canyonlands
16MiB NAND TLB window is way too big. Reduce it to 1KiB.

Signed-off-by: Felix Radensky <felix@embedded-sol.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2011-01-10 12:50:29 +01:00
Stefan Roese
37805cf1db ppc4xx: Fix missing linker scripts for partial linking
This patch fixes the acadia_nand and kilauea_nand linker scripts
which have been missing in commit ee8028b7 [ppc4xx: Cleanup for
partial linking and --gc-sections]

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Bernhard Weirich <Bernhard.Weirich@riedel.net>
2010-12-15 13:16:33 +01:00
Wolfgang Denk
ee8028b7f1 ppc4xx: Cleanup for partial linking and --gc-sections
This commit adapts 4xx boards for partial linking with --gc-sections.

Signed-off-by: Stefan Roese <sr@denx.de>
Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Stefan Roese <sr@denx.de>
Cc: Tirumala Marri <tmarri@apm.com>
Cc: David Updegraff <dave@cray.com>
Cc: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
Cc: Dirk Eibach <eibach@gdsys.de>
Cc: Larry Johnson <lrj@acm.org>
Cc: Peter De Schrijver <p2@mind.be>
Cc: Niklaus Giger <niklaus.giger@netstal.com>
Cc: Daniel Poirot <dan.poirot@windriver.com>
Acked-by: Stefan Roese <sr@denx.de>
2010-11-27 23:35:09 +01:00
Stefan Roese
c56f84ca9c ppc4xx: Fix build problems of IBM DDR2 NAND booting targets
This change is needed to compile the PPC4xx NAND booting targets
equipped with the IBM DDR2 SDRAM controller.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
Acked-by: Stefan Roese <sr@denx.de>
2010-11-26 22:08:19 +01:00
Sebastien Carlier
6d8962e814 Switch from archive libraries to partial linking
Before this commit, weak symbols were not overridden by non-weak symbols
found in archive libraries when linking with recent versions of
binutils.  As stated in the System V ABI, "the link editor does not
extract archive members to resolve undefined weak symbols".

This commit changes all Makefiles to use partial linking (ld -r) instead
of creating library archives, which forces all symbols to participate in
linking, allowing non-weak symbols to override weak symbols as intended.
This approach is also used by Linux, from which the gmake function
cmd_link_o_target (defined in config.mk and used in all Makefiles) is
inspired.

The name of each former library archive is preserved except for
extensions which change from ".a" to ".o".  This commit updates
references accordingly where needed, in particular in some linker
scripts.

This commit reveals board configurations that exclude some features but
include source files that depend these disabled features in the build,
resulting in undefined symbols.  Known such cases include:
- disabling CMD_NET but not CMD_NFS;
- enabling CONFIG_OF_LIBFDT but not CONFIG_QE.

Signed-off-by: Sebastien Carlier <sebastien.carlier@gmail.com>
2010-11-17 21:02:18 +01:00
Wolfgang Denk
25ddd1fb0a Replace CONFIG_SYS_GBL_DATA_SIZE by auto-generated value
CONFIG_SYS_GBL_DATA_SIZE has always been just a bad workarond for not
being able to use "sizeof(struct global_data)" in assembler files.
Recent experience has shown that manual synchronization is not
reliable enough.  This patch renames CONFIG_SYS_GBL_DATA_SIZE into
GENERATED_GBL_DATA_SIZE which gets automatically generated by the
asm-offsets tool.  In the result, all definitions of this value can be
deleted from the board config files.  We have to make sure that all
files that reference such data include the new <asm-offsets.h> file.

No other changes have been done yet, but it is obvious that similar
changes / simplifications can be done for other, related macro
definitions as well.

Signed-off-by: Wolfgang Denk <wd@denx.de>
Acked-by: Kumar Gala <galak@kernel.crashing.org>
2010-10-26 21:05:30 +02:00
Stefan Roese
4adcbdc6be ppc4xx: Enable NOR flash support in sequoia_ramboot target
Until now, the Sequoia RAM-booting image disabled NOR flash support
as this image was mainly created for NAND-only boards. This patch
now enables NOR flash support for this RAM-booting version as well.

Signed-off-by: Stefan Roese <sr@denx.de>
2010-10-20 10:08:16 +02:00
Wolfgang Denk
2ae1824196 Makefile: move all Power Architecture boards into boards.cfg
Clean up Makefile, and drop a lot of the config.mk files on the way.

We now also automatically pick all boards that are listed in
boards.cfg (and with all configurations), so we can drop the redundant
entries from MAKEALL to avoid building these twice.

Signed-off-by: Wolfgang Denk <wd@denx.de>
2010-10-18 22:12:04 +02:00
Wolfgang Denk
14d0a02a16 Rename TEXT_BASE into CONFIG_SYS_TEXT_BASE
The change is currently needed to be able to remove the board
configuration scripting from the top level Makefile and replace it by
a simple, table driven script.

Moving this configuration setting into the "CONFIG_*" name space is
also desirable because it is needed if we ever should move forward to
a Kconfig driven configuration system.

Signed-off-by: Wolfgang Denk <wd@denx.de>
2010-10-18 22:07:10 +02:00
Rupjyoti Sarmah
709d9481e9 ppc44x: config GPIOs for USB on canyonlands board
The GPIO 16 and 19 reconfiguration should be done once USB is initialized.
So moved the reconfiguration to the USB init  function.

Signed-off-by: Rupjyoti Sarmah <rsarmah@apm.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2010-10-04 11:23:59 +02:00
Stefan Roese
98303292ad ppc4xx: Small whitespace cleanup in canyonlands.c
Signed-off-by: Stefan Roese <sr@denx.de>
2010-10-04 11:19:56 +02:00
Tirumala Marri
d0e6665a24 APM821xx: Add bluestone board support
Add support code for bluestone board wth APM821XX processor based.
This patch includes early board init, misc init, configure EBC,
initializes UIC, MAKEALL, board.cfg and MAINTAINERS file.

Signed-off-by: Tirumala R Marri <tmarri@apm.com
Signed-off-by: Stefan Roese <sr@denx.de>
2010-10-04 11:17:38 +02:00
Wolfgang Denk
2e6e1772c0 Merge branch 'next' of /home/wd/git/u-boot/next
Conflicts:
	include/ppc4xx.h

Signed-off-by: Wolfgang Denk <wd@denx.de>
2010-09-28 23:30:47 +02:00
Stefan Roese
550650ddd0 ppc4xx: Use common NS16550 driver for PPC4xx UART
This patch removes the PPC4xx UART driver. Instead the common NS16550
driver is used, since all PPC4xx SoC's use this peripheral device.

The file 4xx_uart.c now only implements the UART clock calculation
function which also sets the SoC internal UART divisors.

All PPC4xx board config headers are changed to use this common NS16550
driver now.

Tested on these boards:
acadia, canyonlands, katmai, kilauea, sequoia, zeus

Signed-off-by: Stefan Roese <sr@denx.de>
2010-09-23 09:02:05 +02:00
Stefan Roese
afabb498b7 ppc4xx: Big header cleanup part 2, mostly PPC405 related
This cleanup is done by creating header files for all SoC versions and
moving the SoC specific defines into these special headers. This way the
common header ppc405.h and ppc440.h can be cleaned up finally.

As a part from this cleanup, the GPIO definitions for PPC405EP are
corrected. The high and low parts of the registers (for example
CONFIG_SYS_GPIO0_OSRL vs. CONFIG_SYS_GPIO0_OSRH) have been defined in
the wrong order. This patch now fixes this issue by switching these
xxxH and xxxL values. This brings the GPIO 405EP port in sync with all
other PPC4xx ports.

Signed-off-by: Stefan Roese <sr@denx.de>
2010-09-23 09:02:05 +02:00
Stefan Roese
5e7abce991 ppc4xx: Big header cleanup, mostly PPC440 related
This patch starts a bit PPC4xx header cleanup. First patch mostly
touches PPC440 files. A later patch will touch the PPC405 files as well.

This cleanup is done by creating header files for all SoC versions and
moving the SoC specific defines into these special headers. This way the
common header ppc405.h and ppc440.h can be cleaned up finally.

Signed-off-by: Stefan Roese <sr@denx.de>
2010-09-23 09:02:05 +02:00
Stefan Roese
0988776288 ppc4xx: Move gpio.h to ppc4xx-gpio.h since its ppc4xx specific
Signed-off-by: Stefan Roese <sr@denx.de>
2010-09-23 09:02:05 +02:00
Stefan Roese
b36df56115 ppc4xx: Move ppc4xx headers to powerpc include directory
This patch moves some ppc4xx related headers from the common include
directory (include/) to the powerpc specific one
(arch/powerpc/include/asm/). This way to common include directory is not
so cluttered with files.

Signed-off-by: Stefan Roese <sr@denx.de>
2010-09-23 09:02:05 +02:00
Stefan Roese
8a805df136 ppc4xx/fdt/flash: Change fdt_fixup_nor_flash_node() to not rely on cs size
This patch changes the behaviour of the fdt_fixup_nor_flash_node()
function. Now it doesn't patch the size of the "reg" property with the
chip-select size, but with the size returned from the new function
flash_get_bank_size(). This function will return per weak default the
flash size of the bank (bank = chip-select numer) detected by the flash
driver. If this does not fit your needs, this function may be overridden
by a board specific one.

For this the parameters needed to be changed. So I intentionally squashed
the PPC4xx stuff using this routine into this patch. Otherwise it would
not be git-bisectable anymore.

The board specific function for the AMCC/APM Ebony eval board is now
included in this patch version.

Signed-off-by: Stefan Roese <sr@denx.de>
Tested-by: Detlev Zundel <dzu@denx.de>
Cc: Gerald Van Baren <vanbaren@cideas.com>
Cc: Wolfgang Denk <wd@denx.de>
2010-09-23 08:49:49 +02:00
Wolfgang Denk
a2a649d73c 4xx: adjust TEXT_BASE to increase U-Boot image size
On some boards (canyonlands, luan, sequoia) we need more room for the
U-Boot image to allow for new features like the new environment code.
Shift TEXT_BASE as needed.

Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Stefan Roese <sr@denx.de>
Acked-by: Stefan Roese <sr@denx.de>
2010-09-19 19:29:47 +02:00
Wolfgang Denk
47e26b1bf9 cmd_usage(): simplify return code handling
Lots of code use this construct:

	cmd_usage(cmdtp);
	return 1;

Change cmd_usage() let it return 1 - then we can replace all these
ocurrances by

	return cmd_usage(cmdtp);

This fixes a few places with incorrect return code handling, too.

Signed-off-by: Wolfgang Denk <wd@denx.de>
2010-07-24 20:43:57 +02:00
Rupjyoti Sarmah
17a6844497 ppc4xx/Canyonlands added USB board callbacks
Functions added to support board callbacks for USB init. This
isolates USB manipulations such that it is only touched if USB is
used by U-Boot.

Signed-off-by: Dave Mitchell <dmitchell@appliedmicro.com>
Signed-off-by: Rupjyoti Sarmah <rsarmah@appliedmicro.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2010-07-23 09:53:20 +02:00
Wolfgang Denk
54841ab50c Make sure that argv[] argument pointers are not modified.
The hush shell dynamically allocates (and re-allocates) memory for the
argument strings in the "char *argv[]" argument vector passed to
commands.  Any code that modifies these pointers will cause serious
corruption of the malloc data structures and crash U-Boot, so make
sure the compiler can check that no such modifications are being done
by changing the code into "char * const argv[]".

This modification is the result of debugging a strange crash caused
after adding a new command, which used the following argument
processing code which has been working perfectly fine in all Unix
systems since version 6 - but not so in U-Boot:

int main (int argc, char **argv)
{
	while (--argc > 0 && **++argv == '-') {
/* ====> */	while (*++*argv) {
			switch (**argv) {
			case 'd':
				debug++;
				break;
			...
			default:
				usage ();
			}
		}
	}
	...
}

The line marked "====>" will corrupt the malloc data structures and
usually cause U-Boot to crash when the next command gets executed by
the shell.  With the modification, the compiler will prevent this with
an
	error: increment of read-only location '*argv'

N.B.: The code above can be trivially rewritten like this:

	while (--argc > 0 && **++argv == '-') {
		char *arg = *argv;
		while (*++arg) {
			switch (*arg) {
			...

Signed-off-by: Wolfgang Denk <wd@denx.de>
Acked-by: Mike Frysinger <vapier@gentoo.org>
2010-07-04 23:55:42 +02:00
Wolfgang Denk
a77034a8df Merge branch 'master' of git://git.denx.de/u-boot-ppc4xx 2010-04-24 21:16:57 +02:00
Stefan Roese
a47a12becf Move arch/ppc to arch/powerpc
As discussed on the list, move "arch/ppc" to "arch/powerpc" to
better match the Linux directory structure.

Please note that this patch also changes the "ppc" target in
MAKEALL to "powerpc" to match this new infrastructure. But "ppc"
is kept as an alias for now, to not break compatibility with
scripts using this name.

Signed-off-by: Stefan Roese <sr@denx.de>
Acked-by: Wolfgang Denk <wd@denx.de>
Acked-by: Detlev Zundel <dzu@denx.de>
Acked-by: Kim Phillips <kim.phillips@freescale.com>
Cc: Peter Tyser <ptyser@xes-inc.com>
Cc: Anatolij Gustschin <agust@denx.de>
2010-04-21 23:42:38 +02:00
Stefan Roese
cf6eb6da43 ppc4xx: TLB init file cleanup
This patch adds new macros, with frequently used combinations of the
4xx TLB access control and storage attibutes. Additionally the 4xx init.S
files are updated to make use of these new macros. Resulting in easier
to read TLB definitions.

Additionally some init.S files are updated to use the mmu header for the
TLB defines, instead of defining their own macros.

Signed-off-by: Stefan Roese <sr@denx.de>
2010-04-19 15:29:03 +02:00
Peter Tyser
8d1f268204 ppc: Move cpu/$CPU to arch/ppc/cpu/$CPU
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
2010-04-13 09:13:16 +02:00
Peter Tyser
61f2b38a17 Replace "#include <asm-$ARCH/$FILE>" with "#include <asm/$FILE>"
The appropriate include/asm-$ARCH directory should already by symlinked
to include/asm so using the whole "asm-$ARCH" path is unnecessary.

This change should also allow us to move the include/asm-$ARCH
directories into their appropriate lib/$ARCH/ directories.

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
2010-04-13 09:13:04 +02:00
Stefan Roese
9998b1366e ppc4xx: Kilauea: Add CPLD version detection and EBC reconfiguration
A newer CPLD version on the 405EX evaluation board requires a different
EBC controller setup for the CPLD register access. This patch adds a CPLD
version detection for Kilauea and code to reconfigure the EBC controller
(chip select 2) for the old CPLD if no new version is found.

Additionally the CPLD version is printed upon bootup:

Board: Kilauea - AMCC PPC405EX Evaluation Board (CPLD rev. 0)

Signed-off-by: Stefan Roese <sr@denx.de>
Acked-by: Wolfgang Denk <wd@denx.de>
Cc: Zhang Bao Quan <bqzhang@udtech.com.cn>
2010-01-23 09:27:28 +01:00
Peter Tyser
64917ca389 PCIe, USB: Replace 'end point' references with 'endpoint'
When referring to PCIe and USB 'endpoint' is the standard naming
convention.

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Acked-by: Stefan Roese <sr@denx.de>
Acked-by: Remy Bohmer <linux@bohmer.net>
2010-01-17 23:06:44 +01:00
Stefan Roese
39ff7d5f4c POST: Remove duplicated post_hotkey_pressed() functions
This patch introduces a weak default function for post_hotkey_pressed(),
returning 0, for boards without hotkey support. The long-running tests
won't be started on those boards. This default function was implemented
in many board directories. By implementing this weak default we can
remove all those duplicate versions.

Boards with hotkey support, can override this weak default function
by defining one in their board specific code.

Signed-off-by: Stefan Roese <sr@denx.de>
2009-12-07 22:44:31 +01:00
Stefan Roese
6c70049bd1 ppc4xx: Consolidate pci_master_init() function
This patch removes the duplicted implementations of the pci_master_init()
function by introducing a weak default function for it. It can be
overridden by a board specific version.

Signed-off-by: Stefan Roese <sr@denx.de>
2009-11-19 11:35:34 +01:00
Stefan Roese
a760b02031 ppc4xx: Consolidate pci_pre_init() function
This patch removes the duplicted implementations of the pci_pre_init()
function by introducing a weak default function for it. This weak default
has a different implementation for some PPC variants. It can be
overridden by a board specific version.

Signed-off-by: Stefan Roese <sr@denx.de>
2009-11-19 11:35:30 +01:00
Stefan Roese
1095493a5d ppc4xx: Consolidate pci_target_init() function
This patch removes the duplicted implementations of the pci_target_init()
function by introducing a weak default function for it. This weak default
has a different implementation for 440EP(x)/GR(x) PPC's. It can be
overridden by a board specific version (e.g. PMC440, korat).

Signed-off-by: Stefan Roese <sr@denx.de>
Acked-by: Matthias Fuchs <matthias.fuchs@esd.eu>
2009-11-19 11:35:08 +01:00
Stefan Roese
efe12bcec5 ppc4xx: Katmai: Add chip_config command
This patch removes the Katmai "bootstrap" command and replaces it
with the now common command "chip_config".

Signed-off-by: Stefan Roese <sr@denx.de>
2009-11-10 15:09:37 +01:00
Stefan Roese
56f9b39d1f ppc4xx: Fix NAND booting targets after 4xx linker script consolidation
Somehow I missed the NAND booting targets in the 4xx linker script
consolidation patchset. This patch fixes this issue.

Signed-off-by: Stefan Roese <sr@denx.de>
2009-11-09 13:01:19 +01:00
Stefan Roese
9a81c61249 ppc4xx: Remove duplicated is_pci_host() functions
This patch introduces a weak default function for is_pci_host(),
returning 1. This is the default behaviour, since most boards only
implement PCI host functionality. This weak default can be overridden
by a board specific version if needed.

Signed-off-by: Stefan Roese <sr@denx.de>
2009-11-09 11:27:08 +01:00
Stefan Roese
b0b867462c ppc4xx: Consolidate 4xx PCIe board specific configuration
This patch consolidates the PPC4xx board specific PCIe configuration
code. This way the duplicated code is removed. Boards can implement a
special, non standard behaviour (e.g. number of PCIe slots, etc) by
overriding the weak default functions.

Signed-off-by: Stefan Roese <sr@denx.de>
2009-11-09 11:26:57 +01:00
Stefan Roese
2cd95a25cb ppc4xx: Remove board specific linker scripts from most PPC4xx boards
All these linker scripts can be removed since the new common ppc4xx
linker script should be able to handle all of those boards.

Please test and report problems. Thanks.

Signed-off-by: Stefan Roese <sr@denx.de>
2009-11-02 16:29:04 +01:00
Stefan Roese
cfc2587462 ppc4xx: Sequoia: Add chip_config command
This patch removes the Sequoia "bootstrap" command and replaces it
with the now common command "chip_config".

Please note that the patches with the dynamic PCI sync clock
configuration have to be applied, before this one should go in.
This is because Sequoia has 2 different bootstrap EEPROMs, and
the old bootstrap command configured different values depending
on the detected PCI async clock (33 vs. 66MHz). With the PCI sync
clock patches, this is not necessary anymore. The PCI sync clock
will be configured correctly on-the-fly now.

Signed-off-by: Stefan Roese <sr@denx.de>
2009-10-23 16:05:11 +02:00
Stefan Roese
c85b583970 ppc4xx: Yosemite/Yellowstone: Check and reconfigure the PCI sync clock
This patch now uses the 440EP(x)/GR(x) function to check and dynamically
reconfigure the PCI sync clock.

Signed-off-by: Stefan Roese <sr@denx.de>
2009-10-23 16:05:02 +02:00
Stefan Roese
23c51a2d63 ppc4xx: Sequoia/Rainer: Check and reconfigure the PCI sync clock
This patch now uses the 440EP(x)/GR(x) function to check and dynamically
reconfigure the PCI sync clock.

Signed-off-by: Stefan Roese <sr@denx.de>
2009-10-23 16:04:54 +02:00
Wolfgang Denk
cd77dd109c Merge branch 'reloc' 2009-10-09 00:03:18 +02:00
Niklaus Giger
ddc922ff2c ppc_4xx: Apply new HW register names
Modify all existing *.c files to use the new register names
as seen in the AMCC manuals.

Signed-off-by: Niklaus Giger <niklaus.giger@member.fsf.org>
Signed-off-by: Stefan Roese <sr@denx.de>
2009-10-07 09:15:20 +02:00
Stefan Roese
06dfaeef52 ppc4xx: Fix msg "initialization as root-complex failed" upon PCIe scan
This message is printed upon PCIe bus scan, not only upon error, but also
if no PCIe device is detected at all. Since this is not an error, let's
remove this message in this case. We already have the message
"link is not up." if there is no PCIe device present.

Signed-off-by: Stefan Roese <sr@denx.de>
Acked-by: Wolfgang Denk <wd@denx.de>
2009-10-07 09:13:46 +02:00
Peter Tyser
858290178f ppc: Enable full relocation to RAM
The following changes allow U-Boot to fully relocate from flash to
RAM:
 - Remove linker scripts' .fixup sections from the .text section
 - Add -mrelocatable to PLATFORM_RELFLAGS for all boards
 - Define CONFIG_RELOC_FIXUP_WORKS for all boards

Previously, U-Boot would partially relocate, but statically initialized
pointers needed to be manually relocated.

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
2009-10-03 10:15:45 +02:00
Stefan Roese
95b602bab5 ppc4xx: Convert PPC4xx SDRAM defines from lower case to upper case
The latest PPC4xx register cleanup patch missed some SDRAM defines.
This patch now changes lower case UIC defines to upper case. Also
some names are changed to match the naming in the IBM/AMCC users
manuals (e.g. mem_mcopt1 -> SDRAM0_CFG).

Signed-off-by: Stefan Roese <sr@denx.de>
2009-09-28 10:45:54 +02:00
Stefan Roese
952e7760bf ppc4xx: Convert PPC4xx UIC defines from lower case to upper case
The latest PPC4xx register cleanup patch missed the UIC defines.
This patch now changes lower case UIC defines to upper case.

Signed-off-by: Stefan Roese <sr@denx.de>
2009-09-28 10:45:42 +02:00
Wolfgang Denk
cae26e2fdd Merge branch 'master' of git://git.denx.de/u-boot-ppc4xx 2009-09-15 21:43:25 +02:00
Wolfgang Denk
6c7bc91fb3 board/amcc/common/flash.c: Fix compile warning
Fix warning: ../common/flash.c:917: warning: dereferencing type-punned
pointer will break strict-aliasing rules

Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Stefan Roese <sr@denx.de>
Acked-by: Stefan Roese <sr@denx.de>
2009-09-15 00:29:49 +02:00
Wolfgang Denk
70fb809c56 board/amcc/yucca/flash.c: Fix compile warning
Fix warning: flash.c:919: warning: dereferencing type-punned pointer
will break strict-aliasing rules

Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Stefan Roese <sr@denx.de>
Acked-by: Stefan Roese <sr@denx.de>
2009-09-15 00:29:13 +02:00
Wolfgang Denk
030ec52f8c board/amcc/taihu/flash.c: Fix compile warning
Fix warnings:
flash.c: In function 'write_word_1':
flash.c:696: warning: dereferencing type-punned pointer will break strict-aliasing rules
flash.c: In function 'write_word_2':
flash.c:1044: warning: dereferencing type-punned pointer will break strict-aliasing rules

Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Stefan Roese <sr@denx.de>
Acked-by: Stefan Roese <sr@denx.de>
2009-09-15 00:28:24 +02:00
Stefan Roese
d1c3b27525 ppc4xx: Big cleanup of PPC4xx defines
This patch cleans up multiple issues of the 4xx register (mostly
DCR, SDR, CPR, etc) definitions:

- Change lower case defines to upper case (plb4_acr -> PLB4_ACR)
- Change the defines to better match the names from the
  user's manuals (e.g. cprpllc -> CPR0_PLLC)
- Removal of some unused defines

Please test this patch intensive on your PPC4xx platform. Even though
I tried not to break anything and tested successfully on multiple
4xx AMCC platforms, testing on custom platforms is recommended.

Signed-off-by: Stefan Roese <sr@denx.de>
2009-09-11 10:35:58 +02:00
Stefan Roese
514bab6609 ppc4xx: Fix "chip_config" command for AMCC Arches
This patch fixes the "chip_config" command for I2C bootstrap EEPROM
configuration. First it changes the I2C bootstrap EEPROM address to
0x54 as this is used on Arches (instead of 0x52 on Canyonlands/
Glacier). Additionally, the NAND bootstrap settings are removed
for Arches since Arches doesn't support NAND-booting.

Signed-off-by: Stefan Roese <sr@denx.de>
2009-08-18 09:16:33 +02:00
Stefan Roese
c3fa4f0c86 ppc4xx: Add support for PPC460EX/460GT rev B chip to AMCC Canyonlands
This patch is based on a diff created by Phong Vo from AMCC.

Signed-off-by: Phong Vo <pvo@amcc.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2009-07-30 07:22:18 +02:00
Stefan Roese
042d01c72e ppc4xx: Fix problem with NOR range assignment in Canyonlands ft_board_setup
This patch fixes the problem, that the current fdt board fixup code only
set's one range, the one for NOR. By this it's overwriting the already
correctly configured values done in __ft_board_setup(). Just remove this
now unneeded NOR fixup and all the ranges are correctly defined.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Dirk Eibach <eibach@gdsys.de>
Cc: Felix Radensky <felix@embedded-sol.com>
2009-07-28 07:26:07 +02:00
Stefan Roese
11a1604f8d ppc4xx: Add some NAND-booting bootstrap entries to Kilauea chip_config cmd
This patch adds some I2C bootstrap setting for NAND booting to the Kilauea
chip_config command ("533-nand" and "600-nand").

Additionally some incorrectly indented lines are fixed.

Signed-off-by: Stefan Roese <sr@denx.de>
2009-07-28 07:24:01 +02:00
Stefan Roese
f3ed3c9b74 ppc4xx: Fix Arches DDR2 initialization
Testing on AMCC Arches with the latest U-Boot version yielded that DDR2
initialization is currently broken. U-Boot hangs upon relocation to SDRAM
or crashes with random traps. This patch fixes this problem. Arches now
uses a different WRDTR and CLKTR default setting than Canyonlands/Glacier.

Signed-off-by: Stefan Roese <sr@denx.de>
2009-07-28 07:22:46 +02:00
Stefan Roese
4b1389e0ce ppc4xx: Add chip_config command to AMCC Kilauea eval board
This patch removes the "alterpll" command and replaces it with the now
ppc4xx standard "chip_config" command to configure the I2C bootstrap
EEPROM.

Signed-off-by: Stefan Roese <sr@denx.de>
2009-07-24 09:56:40 +02:00
Stefan Roese
87c0b72908 Add "chip_config" command for PPC4xx bootstrap configuration
This patch adds a generic command for programming I2C bootstrap
eeproms on PPC4xx. An implementation for Canyonlands board is
included.

The command name is intentionally chosen not to be PPC4xx specific.
This way other CPU's/SoC's can implement a similar command under
the same name, perhaps with a different syntax.

Usage on Canyonlands:

=> chip_config
Available configurations (I2C address 0x52):
600-nor          - NOR  CPU: 600 PLB: 200 OPB: 100 EBC: 100
600-nand         - NAND CPU: 600 PLB: 200 OPB: 100 EBC: 100
800-nor          - NOR  CPU: 800 PLB: 200 OPB: 100 EBC: 100
800-nand         - NAND CPU: 800 PLB: 200 OPB: 100 EBC: 100
1000-nor         - NOR  CPU:1000 PLB: 200 OPB: 100 EBC: 100
1000-nand        - NAND CPU:1000 PLB: 200 OPB: 100 EBC: 100
1066-nor         - NOR  CPU:1066 PLB: 266 OPB:  88 EBC:  88 ***
1066-nand        - NAND CPU:1066 PLB: 266 OPB:  88 EBC:  88
=> chip_config 600-nor
Using configuration:
600-nor          - NOR  CPU: 600 PLB: 200 OPB: 100 EBC: 100
done (dump via 'i2c md 52 0.1 10')
Reset the board for the changes to take effect

Other 4xx boards will be migrated to use this command soon
as well.

Signed-off-by: Stefan Roese <sr@denx.de>
Signed-off-by: Dirk Eibach <eibach@gdsys.de>
Acked-by: Matthias Fuchs <matthias.fuchs@esd.eu>
2009-07-24 06:42:32 +02:00
Felix Radensky
26d37f0061 ppc4xx: Fix FDT EBC mappings on Canyonlands
This patch fixes 2 problems with FDT EBC mappings on Canyonlands.
First, NAND EBC mapping was missing, making Linux NAND driver
unusable on this board. Second, NOR remapping code assumed that
NOR is always on CS0, however when booting from NAND NOR is on CS3.

Signed-off-by: Felix Radensky <felix@embedded-sol.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2009-07-08 10:59:06 +02:00
Wolfgang Denk
a89c33db96 General help message cleanup
Many of the help messages were not really helpful; for example, many
commands that take no arguments would not print a correct synopsis
line, but "No additional help available." which is not exactly wrong,
but not helpful either.

Commit ``Make "usage" messages more helpful.'' changed this
partially. But it also became clear that lots of "Usage" and "Help"
messages (fields "usage" and "help" in struct cmd_tbl_s respective)
were actually redundant.

This patch cleans this up - for example:

Before:
	=> help dtt
	dtt - Digital Thermometer and Thermostat

	Usage:
	dtt         - Read temperature from digital thermometer and thermostat.

After:
	=> help dtt
	dtt - Read temperature from Digital Thermometer and Thermostat

	Usage:
	dtt

Signed-off-by: Wolfgang Denk <wd@denx.de>
2009-06-12 20:47:16 +02:00
Stefan Roese
d873133f2b ppc4xx: Add Sequoia RAM-booting target
This patch adds another build target for the AMCC Sequoia PPC440EPx
eval board. This RAM-booting version is targeted for boards without
NOR FLASH (NAND booting) which need a possibility to initially
program their NAND FLASH. Using a JTAG debugger (e.g. BDI2000/3000)
configured to setup the SDRAM, this debugger can load this RAM-
booting image to the target address in SDRAM (in this case 0x1000000)
and start it there. Then U-Boot's standard NAND commands can be
used to program the NAND FLASH (e.g. "nand write ...").

Here the commands to load and start this image from the BDI2000:

440EPX>reset halt
440EPX>load 0x1000000 /tftpboot/sequoia/u-boot.bin
440EPX>go 0x1000000

Please note that this image automatically scans for an already
initialized SDRAM TLB (detected by EPN=0). This TLB will not be
cleared. This TLB doesn't need to be TLB #0, this RAM-booting
version will detect it and preserve it. So booting via BDI2000
will work and booting with a complete different TLB init via
U-Boot works as well.

Signed-off-by: Stefan Roese <sr@denx.de>
2009-06-12 20:39:47 +02:00
Stefan Roese
17c1b0e89b ppc4xx: Remove unused code for Sequoia NAND booting version
The current define of get_bus_freq() in the CONFIG_NAND_SPL #ifdef is not
used at all. This patch changes it's define to the currently used value of
133333333 and removes the unnecessary code.

Signed-off-by: Stefan Roese <sr@denx.de>
2009-04-16 09:12:08 +02:00
Stefan Roese
5132106a27 ppc4xx: Fixup chip-selects in dtb for NAND-booting Sequoia
Currently the NOR & NAND support in Linux only works for the "standard"
Sequoia, the version booting for NOR flash. The NAND-booting version
has the chip-selects swapped. Here the chip-select mappings:

"Standard" NOR-booting version:
CS0	NOR
CS3	NAND

NAND-booting version:
CS0	NAND
CS3	NOR

With this path the dtb gets fixed-up, so that the correct chip-select
numbers are patched in the dtb enabling correct NOR & NAND support
in Linux on the NAND-booting Sequoia version.

Signed-off-by: Stefan Roese <sr@denx.de>
2009-04-16 09:12:08 +02:00
Stefan Roese
3edf68c47f ppc4xx: Sequoia: Fix TLB reassignment in NAND booting code
This patch fixes a bug in the Sequoia TLB init code to reconfigure
the correct TLB (boot space) after running from RAM. This bug was
introduced with patch 4d332dbeb0
[ppc4xx: Make Sequoia boot vxWorks] which changed the order of the
TLB in the Sequoia init.S file.

Signed-off-by: Stefan Roese <sr@denx.de>
2009-03-26 18:36:40 +01:00
Trent Piepho
f62fb99941 Fix all linker script to handle all rodata sections
A recent gcc added a new unaligned rodata section called '.rodata.str1.1',
which needs to be added the the linker script.  Instead of just adding this
one section, we use a wildcard ".rodata*" to get all rodata linker section
gcc has now and might add in the future.

However, '*(.rodata*)' by itself will result in sub-optimal section
ordering.  The sections will be sorted by object file, which causes extra
padding between the unaligned rodata.str.1.1 of one object file and the
aligned rodata of the next object file.  This is easy to fix by using the
SORT_BY_ALIGNMENT command.

This patch has not be tested one most of the boards modified.  Some boards
have a linker script that looks something like this:

*(.text)
. = ALIGN(16);
*(.rodata)
*(.rodata.str1.4)
*(.eh_frame)

I change this to:

*(.text)
. = ALIGN(16);
*(.eh_frame)
*(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))

This means the start of rodata will no longer be 16 bytes aligned.
However, the boundary between text and rodata/eh_frame is still aligned to
16 bytes, which is what I think the real purpose of the ALIGN call is.

Signed-off-by: Trent Piepho <xyzzy@speakeasy.org>
2009-03-20 22:39:12 +01:00
Mikhail Zolotaryov
ee86fd15e1 Fix AMCC Sequoia board DDR memory configuration
Sequoia board schematics (DES0211_11_SCH_11.pdf, page 5, unit U1D)
specifies that BankSel#1 is not connected, while bootloader memory
configuration is (board/amcc/sequoia/sdram.c):
       mtsdram(DDR0_10, 0x00000300);
i.e. both Chip Selects used - not correct.

If we change to correct value here:
       mtsdram(DDR0_10, 0x00000100);
memory is accessible OK also.

Signed-off-by: Mikhail Zolotaryov <lebon@lebon.org.ua>
Signed-off-by: Stefan Roese <sr@denx.de>
2009-03-17 10:52:36 +01:00
Stefan Roese
cef0efaf2f ppc4xx: Fix problem with board_eth_init() vs cpu_eth_init() on AMCC boards
Some AMCC eval boards do have a board_eth_init() function calling
pci_eth_init(). These boards need to call cpu_eth_init() explicitly now
with the new eth_init rework.

Signed-off-by: Stefan Roese <sr@denx.de>
2009-02-12 06:08:07 +01:00
Peter Tyser
2fb2604d5c Command usage cleanup
Remove command name from all command "usage" fields and update
common/command.c to display "name - usage" instead of
just "usage". Also remove newlines from command usage fields.

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
2009-01-28 08:49:52 +01:00
Peter Tyser
79621bc10b amcc: Clean up command usage output
Update taihu and taishan commands to use cmd_usage() function
to display usage messages.

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
2009-01-28 08:43:52 +01:00
Peter Tyser
62c3ae7c6e Standardize command usage messages with cmd_usage()
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
2009-01-28 08:43:45 +01:00
Dave Mitchell
ddf45cc758 ppc4xx: Changed 460EX/GT OCM TLB and internal SRAM initialization
Expanded OCM TLB to allow access to 64K OCM as well as 256K of
internal SRAM.

Adjusted internal SRAM initialization to match updated user
manual recommendation.

OCM & ISRAM are now mapped as follows:
        physical        virtual         size
ISRAM   0x4_0000_0000   0xE300_0000     256k
OCM     0x4_0004_0000   0xE304_0000     64k

A single TLB was used for this mapping.

Signed-off-by: Dave Mitchell <dmitch71@gmail.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2008-11-21 11:02:04 +01:00
Dave Mitchell
b14ca4b61a ppc4xx: Added ppc4xx-isram.h for internal SRAM and L2 cache DCRs
Added include/asm-ppc/ppc4xx-isram.h and moved internal SRAM and
L2 cache DCRs from ppc440.h to this new header.

Also converted these DCR defines from lowercase to uppercase and
modified referencing modules to use them.

Signed-off-by: Dave Mitchell <dmitch71@gmail.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2008-11-21 10:52:33 +01:00
Selvamuthukumar
9b827cf172 Align end of bss by 4 bytes
Most of the bss initialization loop increments 4 bytes
at a time. And the loop end is checked for an 'equal'
condition. Make the bss end address aligned by 4, so
that the loop will end as expected.

Signed-off-by: Selvamuthukumar <selva.muthukumar@e-coninfotech.com>
Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-11-18 23:13:16 +01:00
Wolfgang Denk
3cbd823116 Coding Style cleanup, update CHANGELOG
Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-11-02 16:14:22 +01:00
Wolfgang Denk
06c2942218 Merge branch 'master' of git://git.denx.de/u-boot-ppc4xx 2008-10-21 21:19:35 +02:00
Stefan Roese
f4d14c5550 ppc4xx: Add 1.0 & 1.066 GHz to canyonlands bootstrap command for PLL setup
Signed-off-by: Stefan Roese <sr@denx.de>
2008-10-21 17:35:02 +02:00
Adam Graham
f09f09d389 ppc4xx: Add AMCC Arches board support (dual 460GT)
The Arches Evaluation board is based on the AMCC 460GT SoC chip.
This board is a dual processor board with each processor providing
independent resources for Rapid IO, Gigabit Ethernet, and serial
communications. Each 460GT has it's own 512MB DDR2 memory, 32MB NOR
FLASH, UART, EEPROM and temperature sensor, along with a shared debug
port. The two 460GT's will communicate with each other via shared
memory, Gigabit Ethernet and x1 PCI-Express.

Signed-off-by: Adam Graham <agraham@amcc.com>
Signed-off-by: Victor Gallardo <vgallardo@amcc.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2008-10-21 17:34:46 +02:00
Wolfgang Denk
8ed44d91c8 Cleanup: fix "MHz" spelling
Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-10-21 11:25:39 +02:00
Jean-Christophe PLAGNIOL-VILLARD
6d0f6bcf33 rename CFG_ macros to CONFIG_SYS
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2008-10-18 21:54:03 +02:00
Stefan Roese
8fd4166c46 ppc4xx: Canyonlands: Remove unnecessary FDT warning upon DTB fixup
Depending on the configuration jumper "SATA SELECT", U-Boot disabled
either one PCIe node or the SATA node in the device tree blob. This
patch removes the unnecessary and even confusing warning, when the node
is not found at all.

Signed-off-by: Stefan Roese <sr@denx.de>
2008-09-22 23:17:31 +02:00
Wolfgang Denk
afbc526336 Merge branch 'Makefile-next' of git://git.denx.de/u-boot-arm 2008-09-12 16:13:12 +02:00
Stefan Roese
7bf5ecfa50 ppc4xx: Fix SDRAM inititialization of multiple 405 based board ports
This patch fixes a problem introdiced with patch
bbeff30c [ppc4xx: Remove superfluous dram_init() call or replace it by
initdram()].

The boards affected are:
- PCI405
- PPChameleonEVB
- quad100hd
- taihu
- zeus

Signed-off-by: Stefan Roese <sr@denx.de>
2008-09-12 07:12:33 +02:00
Jean-Christophe PLAGNIOL-VILLARD
0e8d158664 rename CFG_ENV macros to CONFIG_ENV
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2008-09-10 22:48:06 +02:00
Jean-Christophe PLAGNIOL-VILLARD
8a40fb148e move cmd_get_data_size to command.c
add CMD_DATA_SIZE macro to enable it

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2008-09-10 22:48:05 +02:00
Jean-Christophe PLAGNIOL-VILLARD
5a1aceb068 rename CFG_ENV_IS_IN_FLASH in CONFIG_ENV_IS_IN_FLASH
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2008-09-10 22:48:04 +02:00
Jean-Christophe PLAGNIOL-VILLARD
0cf4fd3cf8 rename environment.c in env_embedded.c to reflect is functionality
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2008-09-10 22:48:01 +02:00
Ben Warren
10efa024b8 Moved initialization of EEPRO100 Ethernet controller to board_eth_init()
Affected boards:
	db64360
	db64460
	katmai
	taihu
	taishan
	yucca
	cpc45
	cpu87
	eXalion
	elppc
	debris
	kvme080
	mpc8315erdb
	integratorap
	ixdp425
	oxc
	pm826
	pm828
	pm854
	pm856
	ppmc7xx
	sc3
	sc520_spunk
	sorcery
	tqm8272
	tqm85xx
	utx8245

Removed initialization of the driver from net/eth.c
Also, wrapped contents of pci_eth_init() by CONFIG_PCI.

Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2008-09-02 21:18:19 -07:00
Stefan Roese
9939ffd5fb Merge branch 'master' of /home/stefan/git/u-boot/u-boot into next 2008-08-12 20:39:27 +02:00
Steven A. Falco
eab1007334 ppc4xx: Sequoia has two UARTs in "4-pin" mode. Configure the GPIOs as per schematic.
The Sequoia board has two UARTs in "4-pin" mode. This patch modifies the GPIO
configuration to match the schematic, and also sets the SDR0_PFC1 register to
select the corresponding mode for the UARTs.

Signed-off-by: Steven A. Falco <sfalco@harris.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2008-08-07 12:06:18 +02:00
Stefan Roese
4b326101d6 Merge branch 'master' of /home/stefan/git/u-boot/u-boot into next 2008-07-14 10:45:47 +02:00
Stefan Roese
068c1b77c8 ppc4xx: Remove redundant ft_board_setup() functions from some 4xx boards
This patch removes some ft_board_setup() functions from some 4xx boards.
This can be done since we now have a default weak implementation for this
in cpu/ppc4xx/fdt.c. Only board in need for a different/custom
implementation like canyonlands need their own version.

Signed-off-by: Stefan Roese <sr@denx.de>
2008-07-13 15:04:11 +02:00
Wolfgang Denk
bde6358762 Fix some more printf() format issues.
Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-07-11 22:56:11 +02:00
Stefan Roese
1d0554736a ppc4xx: Some Rewood cleanups (coding style, leading white spaces)
Signed-off-by: Stefan Roese <sr@denx.de>
2008-07-11 13:18:14 +02:00
Stefan Roese
d9056b7913 ppc4xx: Cleanup Katmai & Yucca PCIe register usage
This patch cleans up the 440SPe PCIe register usage. Now only defines
from the include/asm-ppc/4xx_pcie.h are used.

Signed-off-by: Stefan Roese <sr@denx.de>
2008-07-11 13:18:14 +02:00