This patch enables SPL for all mtmips boards. And also remove defconfig
files which are intend to build ram bootable u-boot files.
SPL_DM and OF_CONTROL are enabled for both boards.
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Create special function for reading bootmode on Versal and ZynqMP.
Zynq is using specific function (without mask) already.
Future patches will be calling this function from different location too.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Use register intstead of static variable to store HSDK init status as
we want to avoid the situation when we reload U-boot via MDB after
previous init is done but HW reset (board reset) isn't done. So
let's store the init status in unused register - CREG_CPU_0_ENTRY
so status will survive after U-boot is reloaded via MDB.
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
For HSDK-4xD we do additional AXI bridge tweaking while doing
hsdk_init command:
- we shrink IOC region.
- we configure ARC HS CORE SLV1 aperture depending on
haps_apb_location environment variable.
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Add support for CSM enable/disable and CSM relocation via
hsdk_init command. We allow to relocate CSM to the beginning of
any aperture even if HW support finer granularity.
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
HSDK-4xD has other GPU type so it consumes only GPU core clock.
Even we have additional GPU clock dividers they are not routed
to anything. So drop information about those additional clocks
in hsdk_clock print_all command.
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
HSDK-4xD has HDMI working so let's print info about HDMI clocks.
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
ARC HS CPU in HSDK-4xD has ARC ID = 0x54, so fix headerize script
accordingly.
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Add quirk for HSDK-4xD - due to HW issues HSDK can use any pulse
polarity but HSDK-4xD require active low polarity of cpu_start pulse.
So use low polarity of cpu_start pulse for both board.
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Add initial HSDK-4xD board support.
The ARC HS4x/HS4xD Development Kit includes a multicore ARC HS4xD-based
chip that integrates a wide range of interfaces including Ethernet,
HDMI, WiFi, Bluetooth, USB, SDIO, I2C, SPI, UART, I2S, ADC, PWM and
GPIO, as well as a Think Silicon GPU.
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
This commit adds common arch support for Actions Semi Owl
series SoCs and removes the Bubblegum96 board files.
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Amit Singh Tomar <amittomer25@gmail.com>
The commit was added as a workaround required in QEMU when using BBL as
the supervisor binary interface (SBI) for Linux. We are now using
OpenSBI to provide the SBI, the workaround is therefore not required
anymore and can be removed.
This reverts commit 897206c5cc.
Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
- Fix boot on am335x guardian board
- Increase OPSI speed on AM65x and J721E devices
- Use JTAD register for identifying K3 devices.
- Update TI entry in MAINTAINERS file.
Add support for backplane kr on t208xqds: remove board specific fixups
on t208xqds for ethernet interfaces specified in device tree as
supported backplane modes.
Signed-off-by: Florinel Iordache <florinel.iordache@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Add support for backplane kr on lx2160aqds: remove board specific fixups
on lx2160aqds for ethernet interfaces specified in device tree as
supported backplane modes.
Signed-off-by: Florinel Iordache <florinel.iordache@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Add support for backplane kr on ls1046aqds: remove board specific fixups
on ls1046aqds for ethernet interfaces specified in device tree as
supported backplane modes.
Signed-off-by: Florinel Iordache <florinel.iordache@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
This patch is to define esdhc_status_fixup function for ls1028a to disable
SDHC1/SDHC2 status in device tree node if not selected.
Signed-off-by: Yinbo Zhu <yinbo.zhu@nxp.com>
Signed-off-by: Xiaowei Bao <xiaowei.bao@nxp.com>
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
If the board is configured without CONFIG_GIC_V3_ITS, an error occurs:
board/freescale/lx2160a/lx2160a.c: In function ‘ft_board_setup’:
board/freescale/lx2160a/lx2160a.c:673:6: error: unused variable
‘gic_lpi_base’ [-Werror=unused-variable]
673 | u64 gic_lpi_base;
| ^~~~~~~~~~~~
Let's define the variable as __maybe_unused.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
After the
commit 4213609cc7 ("drivers: core: use strcmp when find device by name")
the exact DTS node name for PMIC device must be provided.
This patch fixes this issue by providing full DTS node name ('mc34708@8').
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Jaehoon Chug <jh80.chung@samsung.com>
Use DM_ETH instead of legacy networking. Add VIO as a fixed regulator
to the relevant device-trees and augment the FEC node with properties
for the reset GPIO.
It should be noted that the relevant properties for the reset GPIO
already exist in the PHY node (reset-gpios, reset-delay-us,
reset-post-delay-us) but U-Boot currently ignores those and only
supports the bus-level reset properties in the FEC node
(phy-reset-gpios, phy-reset-duration, phy-reset-post-delay).
Signed-off-by: Harald Seiler <hws@denx.de>
Since CONFIG_DISPLAY_BOARDINFO_LATE is no longer used, the checkboard()
function is no longer called.
As it is useful to print the board revision, print it inside
board_late_init() instead.
Also, to avoid GPIO errors related to using a GPIO without requesting it,
move the gpio_request(REV_DETECTION, "REV_DETECT") call prior to its
usage.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Tested-by: Heiko Schocher <hs@denx.de>
On wandboard variants prior to revD1, there is no PMIC populated, so
do not print an error when the reading of the device ID register fails.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Tested-by: Heiko Schocher <hs@denx.de>
The detection of the revD1 version is based on the presence of the PMIC.
Currently revb1 device trees are used for mx6q/mx6dl variants, which
do not have the PMIC nodes.
This causes revD1 boards to be incorrectly be detected as revB1.
Fix this issue by using the revd1 device trees, so that the PMIC node can be
found and then the PMIC can be detected by reading its register ID.
Imported the revd1 device trees from mainline kernel version 5.7-rc1.
Reported-by: Heiko Schocher <hs@denx.de>
Reported-by: Derek Atkins <derek@ihtfp.com>
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Tested-by: Derek Atkins <derek@ihtfp.com>
Tested-by: Heiko Schocher <hs@denx.de>
Tested-by: Peter Robinson <pbrobinson@gmail.com>
Adjust DRAM size in case BL32 secure payload is loaded (OP-TEE/Trusty),
so during MMU initialization U-Boot won't touch this mem area.
BL32 is loaded to the end of DRAM, bl32 payload size is read from
rom_pointer[1]. This relates to the issue described in
59efa6b52b("imx8m: Fix MMU table issue for OPTEE memory").
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Adjust DRAM size in case BL32 secure payload is loaded (OP-TEE/Trusty),
so during MMU initialization U-Boot won't touch this mem area.
BL32 is loaded to the end of DRAM, bl32 payload size is read from
rom_pointer[1]. This relates to the issue described in
59efa6b52b("imx8m: Fix MMU table issue for OPTEE memory").
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
After triggering a "reboot" command in Linux the following
hang in SPL is observed:
U-Boot SPL 2020.04 (Apr 15 2020 - 10:49:29 -0300)
Normal Boot
WDT: Not found!
Trying to boot from MMC2_2
spl: mmc init failed with error: -70
SPL: failed to boot from all boot devices
### ERROR ### Please RESET the board ###
This error happens because the CMD_ERR bit is set in the IRQ status
register after booting from Linux.
To ensure a fresh start, force the VMMC supply to get unpowered first.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Ethernet, usdhc2 and i2c1 interfaces are probed by dm drivers.
Therefor init functions in board file are not necessary.
Signed-off-by: Michael Krummsdorf <michael.krummsdorf@ew.tq-group.com>
Keep code for non-dm configuration of baseboard WRU4.
It cannot be upgraded to device model as
we have no suitable device tree for it.
These changes were not run-tested on WRU4,
only compile-tested.
Signed-off-by: Michael Krummsdorf <michael.krummsdorf@ew.tq-group.com>
reason: SYS_TEXT_BASE was moved to Kconfig. Give reasonable defaults
in board specific Kconfig.
Signed-off-by: Markus Niebel <Markus.Niebel@tq-group.com>
Signed-off-by: Michael Krummsdorf <michael.krummsdorf@ew.tq-group.com>
mx6ul_evk uses DM_ETH, so there is no need to have board code
to setup the FEC IOMUX and to register the network ports via the
old board_eth_init() method.
Remove these FEC related pieces of code.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Update reference in files detected by
scripts/documentation-file-ref-check
doc/README.<board> => board/<board>/README
Files moved in board directory in
commit 702e6014f1 ("doc: cleanup - move board
READMEs into respective board directories")'
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Update reference in many files detected by
scripts/documentation-file-ref-check
README.imx8image => imx/mkimage/imx8image.txt
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Update reference in many files detected by
scripts/documentation-file-ref-check
README.imximage => imx/mkimage/imximage.txt
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Currently we are not able to test reservations created by ft_board_setup().
Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>
Use the correct macro to test presence CONFIG_LED:
replace CONFIG_IS_ENABLED(CONFIG_LED) by CONFIG_IS_ENABLED(LED)
Issue see during review unrelated patch
"board: stm32mp1: update management of boot-led"
http://patchwork.ozlabs.org/patch/1264823/
Cc: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Activate ARCH_SUPPORT_TFABOOT and replace the arch stm32mp
specific config CONFIG_STM32MP1_TRUSTED by the generic CONFIG_TFABOOT
introduced by the commit 535d76a121 ("armv8: layerscape: Add TFABOOT
support").
This config CONFIG_TFABOOT is activated for the trusted boot chain,
when U-Boot is loaded by TF-A.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Add DT entries, Kconfig entries and board-specific entries to configure
FMC2 bus and make KS8851-16MLL on that bus accessible to U-Boot.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Cc: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Use the new a3700_fdt_fix_pcie_regions function in turris_mox.c so that
MOX boards with 4 GB RAM are fully supported.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
In order to support MOX boards with 2 GB or 4 GB RAM, we use the new
Armada-3700 generic code for memory information structures. This is done
by removing dram_init and dram_init_banksize from turris_mox.c, in order
for the generic, weak definitions to be used.
Also for boards with 4 GB RAM it is needed to increase
CONFIG_NR_DRAM_BANKS to 2 in turris_mox_defconfig.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Sort #includes alphabetically, the only exception is common.h, which is
included first in most parts of U-Boot.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Use macro MVEBU_REGISTER to access register addresses instead of
hardcoded addresses.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Patch Linux's device tree according to which Mox modules are connected.
Linux's device tree has all possible Mox module nodes preprogrammed, but
in disabled state.
If MOX B, MOX F or MOX G module is present, this code enables the PCI
node.
For the network modules (MOX C, MOX D and MOX E) are present, the code
enables corresponding ethernet and swtich nodes and DSA connections.
For the SFP cage the SFP GPIO controller node and SFP node are also
enabled.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
The SPI clock signal changes value when the SPI configuration register
is configured. This can sometimes lead to the device misinterpreting
the enablement of the SPI controller as actual clock tick.
This can be solved by first setting the SPI CS1 pin from GPIO to SPI mode,
and only after that writing the SPI configuration register.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Switch to explicitly using the Pro variant DT, which has been
available since Linux 4.11.
Signed-off-by: Joel Johnson <mrjoel@lixil.net>
Reviewed-by: Stefan Roese <sr@denx.de>
Migrate the values for ENV_SIZE and ENV_OFFSET into board specific
Kconfig defaults so they're more accessible for configuration.
Signed-off-by: Joel Johnson <mrjoel@lixil.net>
Reviewed-by: Stefan Roese <sr@denx.de>
Add reasonable default SPI offsets and ENV size when configured to
boot from SPI flash.
Signed-off-by: Joel Johnson <mrjoel@lixil.net>
Reviewed-by: Stefan Roese <sr@denx.de>
Unify the location of DT selection into board_late_init instead of
split between detection and static configuration paths.
Signed-off-by: Joel Johnson <mrjoel@lixil.net>
Reviewed-by: Stefan Roese <sr@denx.de>
The mPCIe slots on ClearFog Pro and ClearFog Base may be alternately
configured for SATA usage.
Signed-off-by: Joel Johnson <mrjoel@lixil.net>
Reviewed-by: Stefan Roese <sr@denx.de>
While newer Linux kernels provide autoconfiguration of SFP, provide
an option for setting in U-Boot Kconfig for use prior to booting.
Signed-off-by: Joel Johnson <mrjoel@lixil.net>
Reviewed-by: Stefan Roese <sr@denx.de>
Add a unique entry for ClearFog Base variant, reflected in the board
name and adjusted SerDes topology.
Signed-off-by: Joel Johnson <mrjoel@lixil.net>
Reviewed-by: Stefan Roese <sr@denx.de>
Make the board version printed indicate the Pro variant default.
Also adjust static name casing to match what is expected for
EEPROM product name to share string constants.
Signed-off-by: Joel Johnson <mrjoel@lixil.net>
Reviewed-by: Stefan Roese <sr@denx.de>
This patch enables the guardian board to provide feedback
about the boot stage in headless mode. The on-board led
would behave in the following pattern
* U-boot -> GLOW LED
* Linux -> BLINK LED [HEART-BEAT PATTERN]
Signed-off-by: Moses Christopher <BollavarapuMoses.Christopher@in.bosch.com>
For some layouts it is necessary to adjust the CK_DELAY parameter to
successfully complete DDR training. Add the ability to specify the
CK_DELAY in the mv_ddr_topology_map.
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Pull in changes that have been pending in our 'next' branch. This
includes:
- A large number of CI improvements including moving to gcc-9.2 for all
platforms.
- amlogic, xilinx, stm32, TI SoC updates
- USB and i2c subsystem updtaes
- Re-sync Kbuild/etc logic with v4.19 of the Linux kernel.
- RSA key handling improvements
- sync all Amlogic DT from Linux v5.6-rc2
- MMC clock fixups
- add support for Libre Computer AML-S905D-PC and AML-S912-PC
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Merge tag 'u-boot-amlogic-20200406' of https://gitlab.denx.de/u-boot/custodians/u-boot-amlogic into next
- clk: meson-g12a: missing break
- sync all Amlogic DT from Linux v5.6-rc2
- MMC clock fixups
- add support for Libre Computer AML-S905D-PC and AML-S912-PC
This fixes the issue when PHY auto negotiation never completes.
Fixes: 431cd76dd8("colibri_imx6: migrate to DM_ETH")
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
Parameter order is not correct based on zynqmp_mmio_write() declaration.
Fixes: be52372ff1 ("arm64: zynqmp: Use zynqmp_mmio_read/write functions")
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Delay required for clock propagation is tighly coupled with initialization
done in psu_init(). That's why call it also for u-boot proper with
CONFIG_ZYNQMP_PSU_INIT_ENABLED enabled.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
board_early_init_f() is the right location where debug uart can be
configurated (after MIO initialization).
The patch is taking this call from SPL to also make it available for U-Boot
proper.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
ZynqMP mini configurations works without PMU firmware that's why there is
no reason to enable the driver and check if it was probed properly.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Multi boot register can be used for using different boot images and design
better boot strategy. Let EL3 SPL or U-Boot to read it and print it.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Add support for the Amlogic based libretech-pc platform.
This platform comes with 2 variant, based on the s905d or s912 SoC.
Acked-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
[narmstrong: update board/amlogic/q200/MAINTAINERS]
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
The Jetson Nano Developer Kit is a Tegra X1-based development board. It
is similar to Jetson TX1 but it is not pin compatible. It features 4GB
of LPDDR4, a SPI NOR flash for early boot firmware and an SD card slot
used for storage.
HDMI 2.0 or DP 1.2 are available for display, four USB ports (3 USB 2.0
and 1 USB 3.0) can be used to attach a variety of peripherals and a PCI
Ethernet controller provides onboard network connectivity. NVMe support
has also been added. Env save is at the end of QSPI (4MB-8K).
A 40-pin header on the board can be used to extend the capabilities and
exposed interfaces of the Jetson Nano.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Tested-by: Peter Robinson <pbrobinson@gmail.com>
T210 CBoot is now doing the full pinmux and GPIO init, based on the DTB
tables. Remove pinmux/GPIO init tables & code from all T210-based builds
below:
p2371-2180 aka TX1
p2371-0000
e2220-1170
p2571
Signed-off-by: Tom Warren <twarren@nvidia.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
compatibility with stm32mp15_dhcom_basic_defconfig
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Merge tag 'u-boot-stm32-20200401' of https://gitlab.denx.de/u-boot/custodians/u-boot-stm
- Fix device tree of Avenger96 board from Arrow Electronics and add
compatibility with stm32mp15_dhcom_basic_defconfig
Use DT /aliases node to establish a stable phandle to the configuration
EEPROM. This permits the configuration EEPROM to be moved e.g. to a
different address or a different bus. Adjust the board code to handle
new phandle lookup.
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Cc: Patrice Chotard <patrice.chotard@st.com>
If the DM_ETH is enabled, the board-specific ethernet registeration
should be disabled, make it so.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Add code to reset the board through PMIC, by writing the required
PMIC registers in the CPU reset handler.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Add config to enable the PFE and ETH support.
Also change the pfe secure boot header address.
Signed-off-by: Priyanka Singh <priyanka.singh@nxp.com>
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
This supports i2c DM and enables CONFIG_DM_I2C
for SoC LS1046A
Signed-off-by: Biwen Li <biwen.li@nxp.com>
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
This supports i2c DM and enables CONFIG_DM_I2C
for SoC LS1043A
Signed-off-by: Biwen Li <biwen.li@nxp.com>
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
The SDHC1_DAT4 signal could be routes to SDHC1_VS or SDHC1
adapter slot for SDHC1 usage. When SDHC1 is selected in RCW,
do not force to route it to SDHC1 adapter slot if find it
has already been configued for SDHC1_VS.
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Set VID to 800 mV for Rev1 and set VID as per switch settings
for Rev2.
Signed-off-by: Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Program GIC LPI configuration table:
1. Redistributor PROCBASER configuration table (which
is common for all redistributors)
2. Redistributor pending table (PENDBASER), for all the
available redistributors.
Signed-off-by: Manish Tomar <manish.tomar@nxp.com>
Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Update "board_fix_fdt" with correct counter value "i".
This will fix the issue while fetching the "reg_names"
resource from fdt after fixup.
Signed-off-by: Vikas Singh <vikas.singh@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Since commit 8e9a8d0d0c ("rockchip: elgin-rv1108: use board_early_init_f
for per-boar init") the function that configure the board GPIOs is no
longer called since CONFIG_BOARD_EARLY_INIT_F=y is not selected.
These GPIOs do not need to be configured in such early stagem, so change it
to rk_board_late_init() and also select CONFIG_BOARD_LATE_INIT=y
to fix the regression.
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Signed-off-by: Fabio Berton <fabio.berton@ossystems.com.br>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Use syscon API to get grf base instead of get from dts.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Use syscon API to get grf base instead of get from dts.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Otavio Salvador <otavio@ossystems.com.br>
Need to increase the LPDDR2/LPDDR3 the voltage vdd2_ddr: buck2
form 1.2V to 1.25V for 32bits configuration.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Acked-by: Patrice Chotard <patrice.chotard@st.com>
Display the reference MBxxxx found in OTP49
only for STMicroelectronics boards when CONFIG_CMD_STBOARD
is activated.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Acked-by: Patrice Chotard <patrice.chotard@st.com>
# Conflicts:
# board/st/stm32mp1/stm32mp1.c
Update the command stboard to support the updated coding of OTP 59 with
finished good.
The ST product codification have several element
- "Commercial Product Name" (CPN): type of product board (DKX, EVX)
associated to the board ID "MBxxxx"
- "Finished Good" or "Finish Good" (FG):
effective content of the product without chip STM32MP1 (LCD, Wifi, …)
- BOM: cost variant for same FG
(for example, several provider of the same component)
For example
- commercial product = STM32MP157C-EV1
- Finished Good = EVA32MP157A1$AU1
Booth information are written on board and these information is also saved
in OTP59:
bit [31:16] (hex) => Board id, MBxxxx
bit [15:12] (dec) => Variant CPN (1....15)
bit [11:8] (dec) => Revision board (index with A = 1, Z = 26)
bit [7:4] (dec) => Variant FG : finished good (NEW)
bit [3:0] (dec) => BOM (01, .... 255)
The updated command is:
stboard [-y] <Board> <VarCPN> <Revision> <VarFG> <BOM>
And the displayed STMicroelectronics board identification is:
Board: MB<Board> Var<VarCPN>.<VarFG> Rev.<Revision>-<BOM>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Lock the OTP used for board identification for the ST boards after
programming.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Acked-by: Patrice Chotard <patrice.chotard@st.com>
