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ARM: imx6: DHCOM i.MX6 PDK: Convert to DM_ETH
Use DM_ETH instead of legacy networking. Add VIO as a fixed regulator to the relevant device-trees and augment the FEC node with properties for the reset GPIO. It should be noted that the relevant properties for the reset GPIO already exist in the PHY node (reset-gpios, reset-delay-us, reset-post-delay-us) but U-Boot currently ignores those and only supports the bus-level reset properties in the FEC node (phy-reset-gpios, phy-reset-duration, phy-reset-post-delay). Signed-off-by: Harald Seiler <hws@denx.de>
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parent
fe2f432c1c
commit
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5 changed files with 33 additions and 49 deletions
6
arch/arm/dts/imx6dl-dhcom-pdk2-u-boot.dtsi
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6
arch/arm/dts/imx6dl-dhcom-pdk2-u-boot.dtsi
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@ -0,0 +1,6 @@
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// SPDX-License-Identifier: (GPL-2.0+)
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/*
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* Copyright (C) 2020 Harald Seiler <hws@denx.de>
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*/
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#include "imx6qdl-dhcom-pdk2-u-boot.dtsi"
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@ -3,6 +3,8 @@
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* Copyright (C) 2019 Claudius Heine <ch@denx.de>
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*/
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#include "imx6qdl-dhcom-pdk2-u-boot.dtsi"
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/ {
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wdt-reboot {
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compatible = "wdt-reboot";
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21
arch/arm/dts/imx6qdl-dhcom-pdk2-u-boot.dtsi
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arch/arm/dts/imx6qdl-dhcom-pdk2-u-boot.dtsi
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@ -0,0 +1,21 @@
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// SPDX-License-Identifier: (GPL-2.0+)
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/*
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* Copyright (C) 2020 Harald Seiler <hws@denx.de>
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*/
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/ {
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fec_vio: regulator-fec {
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compatible = "regulator-fixed";
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regulator-name = "fec-vio";
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gpio = <&gpio1 7 GPIO_ACTIVE_LOW>;
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};
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};
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&fec {
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phy-reset-gpios = <&gpio5 0 GPIO_ACTIVE_LOW>;
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phy-reset-duration = <1>;
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phy-reset-post-delay = <10>;
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phy-supply = <&fec_vio>;
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};
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@ -28,10 +28,7 @@
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#include <fsl_esdhc_imx.h>
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#include <fuse.h>
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#include <i2c_eeprom.h>
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#include <miiphy.h>
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#include <mmc.h>
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#include <net.h>
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#include <netdev.h>
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#include <usb.h>
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#include <usb/ehci-ci.h>
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@ -52,24 +49,6 @@ int overwrite_console(void)
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return 1;
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}
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#ifdef CONFIG_FEC_MXC
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static void eth_phy_reset(void)
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{
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/* Reset PHY */
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gpio_direction_output(IMX_GPIO_NR(5, 0) , 0);
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udelay(500);
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gpio_set_value(IMX_GPIO_NR(5, 0), 1);
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/* Enable VIO */
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gpio_direction_output(IMX_GPIO_NR(1, 7) , 0);
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/*
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* KSZ9021 PHY needs at least 10 mSec after PHY reset
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* is released to stabilize
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*/
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mdelay(10);
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}
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static int setup_fec_clock(void)
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{
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struct iomuxc *iomuxc_regs = (struct iomuxc *)IOMUXC_BASE_ADDR;
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@ -80,34 +59,6 @@ static int setup_fec_clock(void)
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return enable_fec_anatop_clock(0, ENET_50MHZ);
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}
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int board_eth_init(bd_t *bis)
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{
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uint32_t base = IMX_FEC_BASE;
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struct mii_dev *bus = NULL;
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struct phy_device *phydev = NULL;
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gpio_request(IMX_GPIO_NR(5, 0), "PHY-reset");
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gpio_request(IMX_GPIO_NR(1, 7), "VIO");
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setup_fec_clock();
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eth_phy_reset();
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bus = fec_get_miibus(base, -1);
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if (!bus)
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return -EINVAL;
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/* Scan PHY 0 */
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phydev = phy_find_by_mask(bus, 0xf, PHY_INTERFACE_MODE_RGMII);
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if (!phydev) {
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printf("Ethernet PHY not found!\n");
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return -EINVAL;
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}
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return fec_probe(bis, -1, base, bus, phydev);
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}
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#endif
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#ifdef CONFIG_USB_EHCI_MX6
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static void setup_usb(void)
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{
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@ -190,6 +141,8 @@ int board_init(void)
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setup_dhcom_mac_from_fuse();
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setup_fec_clock();
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return 0;
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}
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@ -74,6 +74,8 @@ CONFIG_SPI_FLASH_MTD=y
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CONFIG_PHYLIB=y
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CONFIG_PHY_MICREL=y
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CONFIG_PHY_MICREL_KSZ90X1=y
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CONFIG_DM_ETH=y
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CONFIG_DM_MDIO=y
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CONFIG_FEC_MXC=y
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CONFIG_MII=y
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CONFIG_PINCTRL=y
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