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ARM: dts: stm32: Add KS8851-16MLL ethernet on FMC2

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Add DT entries, Kconfig entries and board-specific entries to configure
FMC2 bus and make KS8851-16MLL on that bus accessible to U-Boot.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Cc: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
This commit is contained in:
Marek Vasut 2020-03-28 02:01:58 +01:00 committed by Patrice Chotard
parent cb25126801
commit de80a2476a
3 changed files with 121 additions and 0 deletions
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68
arch/arm/dts/stm32mp15xx-dhcom-u-boot.dtsi
View file

@ -37,6 +37,12 @@
default-state = "on";
};
};
/* This is actually on FMC2, but we do not have bus driver for that */
ksz8851: ks8851mll@64000000 {
compatible = "micrel,ks8851-mll";
reg = <0x64000000 0x20000>;
};
};
&i2c4 {
@ -50,6 +56,68 @@
};
};
&pinctrl {
/* These should bound to FMC2 bus driver, but we do not have one */
pinctrl-0 = <&fmc_pins_b>;
pinctrl-1 = <&fmc_sleep_pins_b>;
pinctrl-names = "default", "sleep";
fmc_pins_b: fmc-0 {
pins1 {
pinmux = <STM32_PINMUX('D', 4, AF12)>, /* FMC_NOE */
<STM32_PINMUX('D', 5, AF12)>, /* FMC_NWE */
<STM32_PINMUX('B', 7, AF12)>, /* FMC_NL */
<STM32_PINMUX('D', 14, AF12)>, /* FMC_D0 */
<STM32_PINMUX('D', 15, AF12)>, /* FMC_D1 */
<STM32_PINMUX('D', 0, AF12)>, /* FMC_D2 */
<STM32_PINMUX('D', 1, AF12)>, /* FMC_D3 */
<STM32_PINMUX('E', 7, AF12)>, /* FMC_D4 */
<STM32_PINMUX('E', 8, AF12)>, /* FMC_D5 */
<STM32_PINMUX('E', 9, AF12)>, /* FMC_D6 */
<STM32_PINMUX('E', 10, AF12)>, /* FMC_D7 */
<STM32_PINMUX('E', 11, AF12)>, /* FMC_D8 */
<STM32_PINMUX('E', 12, AF12)>, /* FMC_D9 */
<STM32_PINMUX('E', 13, AF12)>, /* FMC_D10 */
<STM32_PINMUX('E', 14, AF12)>, /* FMC_D11 */
<STM32_PINMUX('E', 15, AF12)>, /* FMC_D12 */
<STM32_PINMUX('D', 8, AF12)>, /* FMC_D13 */
<STM32_PINMUX('D', 9, AF12)>, /* FMC_D14 */
<STM32_PINMUX('D', 10, AF12)>, /* FMC_D15 */
<STM32_PINMUX('G', 9, AF12)>, /* FMC_NE2_FMC_NCE */
<STM32_PINMUX('G', 12, AF12)>; /* FMC_NE4 */
bias-disable;
drive-push-pull;
slew-rate = <3>;
};
};
fmc_sleep_pins_b: fmc-sleep-0 {
pins {
pinmux = <STM32_PINMUX('D', 4, ANALOG)>, /* FMC_NOE */
<STM32_PINMUX('D', 5, ANALOG)>, /* FMC_NWE */
<STM32_PINMUX('B', 7, ANALOG)>, /* FMC_NL */
<STM32_PINMUX('D', 14, ANALOG)>, /* FMC_D0 */
<STM32_PINMUX('D', 15, ANALOG)>, /* FMC_D1 */
<STM32_PINMUX('D', 0, ANALOG)>, /* FMC_D2 */
<STM32_PINMUX('D', 1, ANALOG)>, /* FMC_D3 */
<STM32_PINMUX('E', 7, ANALOG)>, /* FMC_D4 */
<STM32_PINMUX('E', 8, ANALOG)>, /* FMC_D5 */
<STM32_PINMUX('E', 9, ANALOG)>, /* FMC_D6 */
<STM32_PINMUX('E', 10, ANALOG)>, /* FMC_D7 */
<STM32_PINMUX('E', 11, ANALOG)>, /* FMC_D8 */
<STM32_PINMUX('E', 12, ANALOG)>, /* FMC_D9 */
<STM32_PINMUX('E', 13, ANALOG)>, /* FMC_D10 */
<STM32_PINMUX('E', 14, ANALOG)>, /* FMC_D11 */
<STM32_PINMUX('E', 15, ANALOG)>, /* FMC_D12 */
<STM32_PINMUX('D', 8, ANALOG)>, /* FMC_D13 */
<STM32_PINMUX('D', 9, ANALOG)>, /* FMC_D14 */
<STM32_PINMUX('D', 10, ANALOG)>, /* FMC_D15 */
<STM32_PINMUX('G', 9, ANALOG)>, /* FMC_NE2_FMC_NCE */
<STM32_PINMUX('G', 12, ANALOG)>; /* FMC_NE4 */
};
};
};
&pmic {
u-boot,dm-pre-reloc;
};

52
board/dhelectronics/dh_stm32mp1/board.c
View file

@ -375,6 +375,56 @@ static void sysconf_init(void)
#endif
}
static void board_init_fmc2(void)
{
#define STM32_FMC2_BCR1 0x0
#define STM32_FMC2_BTR1 0x4
#define STM32_FMC2_BWTR1 0x104
#define STM32_FMC2_BCR(x) ((x) * 0x8 + STM32_FMC2_BCR1)
#define STM32_FMC2_BCRx_FMCEN BIT(31)
#define STM32_FMC2_BCRx_WREN BIT(12)
#define STM32_FMC2_BCRx_RSVD BIT(7)
#define STM32_FMC2_BCRx_FACCEN BIT(6)
#define STM32_FMC2_BCRx_MWID(n) ((n) << 4)
#define STM32_FMC2_BCRx_MTYP(n) ((n) << 2)
#define STM32_FMC2_BCRx_MUXEN BIT(1)
#define STM32_FMC2_BCRx_MBKEN BIT(0)
#define STM32_FMC2_BTR(x) ((x) * 0x8 + STM32_FMC2_BTR1)
#define STM32_FMC2_BTRx_DATAHLD(n) ((n) << 30)
#define STM32_FMC2_BTRx_BUSTURN(n) ((n) << 16)
#define STM32_FMC2_BTRx_DATAST(n) ((n) << 8)
#define STM32_FMC2_BTRx_ADDHLD(n) ((n) << 4)
#define STM32_FMC2_BTRx_ADDSET(n) ((n) << 0)
#define RCC_MP_AHB6RSTCLRR 0x218
#define RCC_MP_AHB6RSTCLRR_FMCRST BIT(12)
#define RCC_MP_AHB6ENSETR 0x19c
#define RCC_MP_AHB6ENSETR_FMCEN BIT(12)
const u32 bcr = STM32_FMC2_BCRx_WREN |STM32_FMC2_BCRx_RSVD |
STM32_FMC2_BCRx_FACCEN | STM32_FMC2_BCRx_MWID(1) |
STM32_FMC2_BCRx_MTYP(2) | STM32_FMC2_BCRx_MUXEN |
STM32_FMC2_BCRx_MBKEN;
const u32 btr = STM32_FMC2_BTRx_DATAHLD(3) |
STM32_FMC2_BTRx_BUSTURN(2) |
STM32_FMC2_BTRx_DATAST(0x22) |
STM32_FMC2_BTRx_ADDHLD(2) |
STM32_FMC2_BTRx_ADDSET(2);
/* Set up FMC2 bus for KS8851-16MLL and X11 SRAM */
writel(RCC_MP_AHB6RSTCLRR_FMCRST, STM32_RCC_BASE + RCC_MP_AHB6RSTCLRR);
writel(RCC_MP_AHB6ENSETR_FMCEN, STM32_RCC_BASE + RCC_MP_AHB6ENSETR);
/* KS8851-16MLL -- Muxed mode */
writel(bcr, STM32_FMC2_BASE + STM32_FMC2_BCR(1));
writel(btr, STM32_FMC2_BASE + STM32_FMC2_BTR(1));
/* AS7C34098 SRAM on X11 -- Muxed mode */
writel(bcr, STM32_FMC2_BASE + STM32_FMC2_BCR(3));
writel(btr, STM32_FMC2_BASE + STM32_FMC2_BTR(3));
setbits_le32(STM32_FMC2_BASE + STM32_FMC2_BCR1, STM32_FMC2_BCRx_FMCEN);
}
/* board dependent setup after realloc */
int board_init(void)
{
@ -398,6 +448,8 @@ int board_init(void)
sysconf_init();
board_init_fmc2();
if (CONFIG_IS_ENABLED(CONFIG_LED))
led_default_state();

1
configs/stm32mp15_dhcom_basic_defconfig
View file

@ -93,6 +93,7 @@ CONFIG_SPI_FLASH_MTD=y
CONFIG_SPL_SPI_FLASH_MTD=y
CONFIG_DM_ETH=y
CONFIG_DWC_ETH_QOS=y
CONFIG_KS8851_MLL=y
CONFIG_PHY=y
CONFIG_PHY_STM32_USBPHYC=y
CONFIG_PINCONF=y