The U_BOOT_CMD_COMPLETE() macro has a semicolon at the end, perhaps
inadvertently. Some code has taken advantage of this.
Tidy this up by dropping the semicolon from the macro and adding it to
macro invocations as required.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Add initial support for STM32MP2 SoCs family.
SoCs information are available here :
https://www.st.com/content/st_com/en/campaigns/microprocessor-stm32mp2.html
Migrate all MP1 related code into stm32mp1/ directory
Create stm32mp2 directory dedicated for STM32MP2 SoCs.
Common code to MP1, MP13 and MP25 is kept into
arch/arm/mach-stm32/mach-stm32mp directory :
- boot_params.c
- bsec
- cmd_stm32key
- cmd_stm32prog
- dram_init.c
- syscon.c
- ecdsa_romapi.c
For STM32MP2, it also :
- adds memory region description needed for ARMv8 MMU.
- enables early data cache before relocation.
During the transition before/after relocation, the MMU, initially setup
at the beginning of DDR, must be setup again at a correct address after
relocation. This is done in enables_caches() by disabling cache, force
arch.tlb_fillptr to NULL which will force the MMU to be setup again but
with a new value for gd->arch.tlb_addr. gd->arch.tlb_addr has been
updated after relocation in arm_reserve_mmu().
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
The migration deadline for moving to DM_SCSI was v2023.04. A further
reminder was sent out in August 2023 to the remaining platforms that had
not migrated already, and that a few more over the line (or configs
deleted).
With this commit we:
- Rename CONFIG_DM_SCSI to CONFIG_SCSI.
- Remove all of the non-DM SCSI code. This includes removing other
legacy symbols and code and removes some legacy non-DM AHCI code.
- Some platforms that had previously been DM_SCSI=y && SCSI=n are now
fully migrated to DM_SCSI as a few corner cases in the code assumed
DM_SCSI=y meant SCSI=y.
Signed-off-by: Tom Rini <trini@konsulko.com>
As we call sprintf in this file we need to include vsprintf.h in order
to get the function prototype and we need linux/string.h for strcmp.
Signed-off-by: Tom Rini <trini@konsulko.com>
As we call sprintf in this file we need to include vsprintf.h in order
to get the function prototype and we need linux/string.h for strcmp.
Signed-off-by: Tom Rini <trini@konsulko.com>
Given that this file references CFG_* defines, we need to be explicit in
our inclusion of config.h, so that these will be defined.
Reviewed-by: Aleksandar Gerasimovski <aleksandar.gerasimovski@hitacienergy.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Rather than selecting CMD_QFW, we should make the option itself by
enabled by default on these platforms. Then in the board-specific
Kconfig we should select the appropriate back-end as needed if the
command is enabled.
Signed-off-by: Tom Rini <trini@konsulko.com>
This adds support for the Inteno XG6846 board based on the
Broadcom MIPS 6328 SoC.
The default boot will read a uImage from flash and boot it.
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Move ASUS Transformers, Grouper, P895 and P880 config fragments into
their respective device directory in /board/../configs/
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Remove nvidia_board_late_init calls from board since this setup is
performed in board2 of mach-tegra. Call of nvidia_board_late_init
from within the board does not provide any additional data.
Tested-by: Andreas Westman Dorcsak <hedmoo@yahoo.com> # ASUS Transformer T30
Tested-by: Svyatoslav Ryhel <clamor95@gmail.com> # LG P895 T30
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Default configuration matches values which are set in the board
so this configuration is not required.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
JTAG pins are mapped as below. To access the JTAG pins, we need to
control the GPIO pins from SPL which seems to be the earliest stage for
JTAG.
- JTAG nTRST: GPIO36 / Input
- JTAG TDI: GPIO61 / Input
- JTAG TMS: GPIO63 / Input
- JTAG TCK: GPIO60 / Input
- JTAG TDO: GPIO44 / Output
Signed-off-by: Chanho Park <chanho61.park@samsung.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
1. Fix incorrect ram size of 4GB dram with ECC enabled
2. Fix wrong place to set dram bank size
- The dram bank size should be set in dram_init_banksize
- Dram_init should not access gd->bd because the board info
struct is not reserved yet.
Signed-off-by: Jim Liu <JJLIU0@nuvoton.com>
[trini: Rework slightly]
Signed-off-by: Tom Rini <trini@konsulko.com>
Similar change was done by commit b4c2c151b1 ("Kconfig: Remove all
default n/no options") and again sync is required.
default n/no doesn't need to be specified. It is default option anyway.
Signed-off-by: Michal Simek <michal.simek@amd.com>
Reviewed-by: Svyatoslav Ryhel <clamor95@gmail.com> # tegra
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Angelo Dureghello <angelo@kernel-space.org>
The SynQuacer Developerbox, in EFI mode, supports A/B capsule
updates and single image ones. The flash layout in the latter case is
outdated, update it with the new offsets and images
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Tested-By: Masahisa Kojima <masahisa.kojima@linaro.org>
The "simpler" the logic, the higher the probability to not test and get
things wrong, again: The absence of a "-PG2" suffix is not sufficient to
derive that we are on PG1. There is also "IOT2050-ADVANCED-M2".
Finally fix that by exactly matching against the two PG1 device names.
While changing this, we can also drop the not really needed check for
!board_is_sr1 in board_is_m2 and call the boards by their names
("board_is_pg1").
Reported-and-tested-by: Bao Cheng Su <baocheng.su@siemens.com>
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Extend Turris Mox board code to support CZ.NIC's RIPE Atlas Probe.
Signed-off-by: Marek Behún <kabel@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
We can remove common.h from most cases of the code here, and only a few
places need an additional header instead.
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Rick Chen <rick@andestech.com>
We can remove common.h from most cases of the code here, and only a few
places need an additional header instead.
Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Michal Simek <michal.simek@amd.com>
We can remove common.h from most cases of the code here, and only a few
places need an additional header instead.
Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Alexey Brodkin <abrodkin@synopsys.com>
- Add Board: rk3588 NanoPC-T6, Orange Pi 5, Orange Pi 5 Plus;
- clk driver fix for rk3568 and rk3588;
- rkmtd cmd support for rockchip nand device;
- dts update and sync from linux;
Xunlong Orange Pi 5 Plus is a single-board computer based on the
Rockchip RK3588 SoC. The board provides abundant interfaces, including
two HDMI output ports, one HDMI input port, two 2.5G Ethernet ports,
M.2 M-Key slot, M.2 E-Key slot, two USB 3.0, two USB 2.0, and two Type-C.
Features tested on a Orange Pi 5 Plus 4GB v1.2:
- SD-card boot
- eMMC boot
- SPI Flash boot
- PCIe/NVMe
- USB 2.0 host
- Ethernet
Device tree is imported from linux v6.7-rockchip-dts64-1 tag.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Xunlong Orange Pi 5 is a single-board computer based on the Rockchip
RK3588S SoC. The board provides abundant interfaces, HDMI output, GPIO
interface, M.2 PCIe2.0, Type-C, Gigabit LAN port, 2*USB2.0, 1*USB3.0,
etc.
Features tested on a Orange Pi 5 4GB v1.2:
- SD-card boot
- SPI Flash boot
- PCIe/NVMe
- USB 2.0 host
- Ethernet
Device tree is imported from linux v6.7-rockchip-dts64-1 tag.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
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Merge tag 'u-boot-at91-2024.01-b' of https://source.denx.de/u-boot/custodians/u-boot-at91
Second set of u-boot-at91 features for the 2024.01 cycle
This feature set a new board named Conclusive KSTR sama5d27 with some
small prerequisites patches.
This is mostly about support for the Allwinner R528/T113s SoC, which is
reportedly the same die as the Allwinner D1, but with the two
Arm Cortex-A7 cores activated instead of the RISC-V one.
Using sunxi code outside of arch/arm proved to be difficult, so apart
from enabling this Arm SoC, the patches also prepare for more refactoring
to get the D1 nicely supported some day:
- We get rid of some Kconfig (hard-)coded GPIO pins, responsible for
enabling regulators.
- The GPIO code is moved out of arch/arm, into drivers/gpio.
- Some definitions are moved out of header files under asm/arch.
- Some T113s/D1 specific definitions are guarded by a generic Kconfig
symbol (CONFIG_SUNXI_GEN_NCAT2).
- The DRAM controller initialisation code is located under drivers/ram.
- The base SoC .dtsi files are shared (under arch/riscv, as in Linux).
Of course there are also the usual new SoC specific patches, like clock
and pinmux descriptions, alongside a rework of the pinctrl code, since
Allwinner changed the GPIO register layout, for the first time since
sunxi's inception.
On top of this the PSCI code sees some update, to provide SMP services
for R528/T113s boards. Many thanks to Sam for providing this code and
staying strong through the review cycles.
The final patch enables support for one popular board, I hope to see
more DTs and defconfigs contributed in the future!
Many thanks to all the various contributors, testers and reviewers,
that series was a real team effort!
Introduce support for Conclusive KSTR-SAMA5D27 Single Board Computer.
Co-developed-by: Jakub Klama <jakub@conclusive.pl>
Signed-off-by: Jakub Klama <jakub@conclusive.pl>
Co-developed-by: Marcin Jabrzyk <marcin@conclusive.pl>
Signed-off-by: Marcin Jabrzyk <marcin@conclusive.pl>
Signed-off-by: Artur Rojek <artur@conclusive.pl>
The NanoPC-T6 is a Rockchip RK3588 based SBC by FriendlyElec.
There are four variants depending on the DRAM size: 4G/32GB eMMC,
8G/64GB eMMC, 16G/16MB SPI NOR, and 16G/256GB eMMC/16MB SPI NOR
Specifications:
CPU: Rockchip RK3588, 4x Cortex-A76 (up to 2.4GHz)
+ 4x Cortex-A55 (up to 1.8GHz)
GPU: Mali-G610 MP4
VPU: 8K@60fps H.265 and VP9 decoder, 8K@30fps H.264 decoder,
4K@60fps AV1 decoder, 8K@30fps H.264 and H.265 encoder
NPU: 6TOPs, supports INT4/INT8/INT16/FP16
RAM: 64-bit 4GB/8GB/16GB LPDDR4X at 2133MHz
eMMC: 0GB/32GB/64GB/256GB HS400
MicroSD Slot: MicroSD SDR104
PCIe 3.0: M.2 M-Key x1, PCIe 3.0 x4 for NVMe SSDs up to 2,500 MB/s
Ethernet: PCIe 2.5G 2x Ethernet (RTL8125BG)
PCIe 2.1: M.2 E-Key x1, PCIe 2.1 x1 and USB2.0 Host,
supports M.2 WiFi and Bluetooth
4G Module: MiniPCIe x1, MicroSIM Card Slot x1
Audio Out: 3.5mm jack for stereo headphone output
Audio In: 2.0mm PH-2A connector for analog microphone input
Video Input: standard HDMI input port, up to 4Kp60
2x 4-lane MIPI-CSI, compatible with MIPI V1.2
Video Output: 2x standard HDMI output ports compatible with HDMI2.1,
HDMI2.0, and HDMI1.4
2x 4-lane MIPI-DSI, compatible with MIPI DPHY 2.0 or CPHY 1.1
USB-A: USB 3.0, Type A
USB-C: Full function USB Type‑C port, DP display up to 4Kp60, USB 3.0
40-pin 2.54mm header connector: up to 2x SPIs, 6x UARTs, 1x I2Cs,
8x PWMs, 2x I2Ss, 28x GPIOs
Debug UART: 3 Pin 2.54mm header, 3V level, 1500000bps
Onboard IR receiver: 38KHz carrier frequency
RTC Battery: 2 Pin 1.27/1.25mm RTC battery connector for low power
RTC IC HYM8563TS
5V Fan connector
Working Temperature: 0C to 70C
Power: 5.5*2.1mm DC Jack, 12VDC input
Dimensions: 110x80x1.6mm (without case) / 86x114.5x30mm (with case)
Kernel commits:
893c17716d0c ("arm64: dts: rockchip: Add NanoPC T6")
a721e28dfad2 ("arm64: dts: rockchip: Add NanoPC T6 PCIe Ethernet support")
ac76b786cc37 ("arm64: dts: rockchip: Add NanoPC T6 PCIe e-key support")
Signed-off-by: John Clark <inindev@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Add support for eMMC (SMHC2) pin pull ups for R528 boards.
The D1 and T113s (and even R329) SoCs do not support 8-bit eMMC anymore,
so it's just four data pins to cover here.
Signed-off-by: Okhunjon Sobirjonov <Okhunjon.Sobirjonov@Mec-electronics.com>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
[Andre: adjust commit message]
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
U-Boot's generic GPIO_EXTRA_HEADER is a convenience symbol to allow code
to more easily include platform specific GPIO headers. This should not
be needed in a DM world anymore, since the generic GPIO framework
handles that nicely.
For Allwinner boards we still need to deal with non-DM GPIO in the SPL,
but this should become the exception, not the rule.
Make this more obvious by removing the definition of GPIO_EXTRA_HEADER,
and just force every legacy user of platform specific GPIO to include
the new sunxi_gpio.h header explicitly. Everyone doing so should feel
ashamed and should find a way to avoid it from now on.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Tested-by: Samuel Holland <samuel@sholland.org>
The CONFIG_MACPWR Kconfig symbol is used to point to a GPIO that enables
the power for the Ethernet "MAC" (mostly PHY, really).
In the DT this is described with the phy-supply property in the MAC DT
node, pointing to a (GPIO controlled) regulator. Since we need Ethernet
only in U-Boot proper, and use a DM driver there, we should use the DT
instead of hardcoding this.
Add code to the sun8i_emac and sunxi_emac drivers to check the DT for
that regulator and enable it, at probe time. Then drop the current code
from board.c, which was doing that job before.
This allows us to remove the MACPWR Kconfig definition and the respective
values from the defconfigs.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Sam Edwards <CFSworks@gmail.com>
The CONFIG_SATAPWR Kconfig symbol was used to point to a GPIO that
enables the power for a SATA harddisk.
In the DT this is described with the target-supply property in the AHCI
DT node, pointing to a (GPIO controlled) regulator. Since we need SATA
only in U-Boot proper, and use a DM driver for AHCI there, we should use
the DT instead of hardcoding this.
Add code to the sunxi AHCI driver to check the DT for that regulator and
enable it, at probe time. Then drop the current code from board.c, which
was doing that job before.
This allows us to remove the SATAPWR Kconfig definition and the
respective values from the defconfigs.
We also select the generic fixed regulator driver, which handles those
GPIO controlled regulators.
Please note that the OrangePi Plus is a bit special here, it's a H3
board without native SATA, but with a USB-to-SATA bridge. The DT models
the SATA power via a VBUS supply regulator, which we don't parse yet in
the USB PHY driver. Use the hardcoded CONFIG_USB3_VBUS_PIN for that
board meanwhile.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Sam Edwards <CFSworks@gmail.com>
Reviewed-by: Samuel Holland <samuel@sholland.org>
Originally, u-boot SPL will place the DTB directly after the kernel,
but the size of the kernel does not include the BSS section, This
means that u-boot SPL places the DTB in the kernel BSS section causing
the DTB to be cleared by the kernel BSS initialisation.
Moving the DTB in front of the kernel can avoid this error.
Signed-off-by: Randolph <randolph@andestech.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Introduce two new weak functions, arch_spl_mmc_get_uboot_raw_sector() and
board_spl_mmc_get_uboot_raw_sector(), each of which can be overridden at
a matching level, that is arch/ and board/ , in addition to the existing
weak function spl_mmc_get_uboot_raw_sector().
This way, architecture code can define a default architecture specific
implementation of arch_spl_mmc_get_uboot_raw_sector(), while the board
code can override that using board_spl_mmc_get_uboot_raw_sector() which
takes precedence over the architecture code. In some sort of unlikely
special case where code has to take precedence over board code too, the
spl_mmc_get_uboot_raw_sector() is still left out to be a weak function,
but it should be unlikely that this is ever needed to be overridden.
Signed-off-by: Marek Vasut <marex@denx.de>
The Renesas RZ/G2L SMARC Evaluation Board Kit consists of the RZ/G2L
System-on-Module (SOM) based on the R9A07G044L2 SoC, and a common SMARC
carrier board.
The ARM TrustedFirmware code for the Renesas RZ/G2L SoC family passes a
devicetree blob to the bootloader as an argument in the same was
previous R-Car gen3/gen4 SoCs. This blob contains a compatible string
which can be used to identify the particular SoC we are running on and
this is used to select the appropriate device tree to load.
The configuration renesas_rzg2l_smarc_defconfig is added to support
building for this target. In the future this defconfig will be extended
to support other SoCs and evaluation boards from the RZ/G2L family.
Signed-off-by: Paul Barker <paul.barker.ct@bp.renesas.com>
Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
The current imx8mp-dhcom-som.dtsi describes production rev.200 SoM,
add DT overlay which reinstates rev.100 SoM description to permit
prototype rev.100 SoMs to be used until they get phased out.
Signed-off-by: Marek Vasut <marex@denx.de>
Add DT overlays to support additional DH i.MX8MP DHCOM SoM 660-100
population options with 1x or 2x RMII PHY mounted on PDK2 or PDK3
carrier boards.
Use SPL DTO support to apply matching SoM specific DTO to cater
for the SoM differences. Remove ad-hoc patching of control DT from
fdtdec_board_setup().
Signed-off-by: Marek Vasut <marex@denx.de>
- Generally we just drop the #ifdef CONFIG_SYS_LONGHELP and endif lines
and use U_BOOT_LONGHELP to declare the same variable name as before
- In a few places, either rename the variable to follow convention or
introduce the variable as it was being done inline before.
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
