Commit graph

78097 commits

Author SHA1 Message Date
Ashok Reddy Soma
de5358a82c firmware: zynqmp: Add and update firmware enums
Update enum pm_ioctl_id with more IOCTLs.
Add enum pm_sd_config_type to support dynamic sd configuration.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/9aba090ec11d2591dbe6978e73e64384873c99fc.1645626962.git.michal.simek@xilinx.com
2022-03-09 12:34:47 +01:00
Michal Simek
2f6e1dde38 arm64: zynqmp: Fix level of gpio reset for usb on kv260 boards
Active level is low that's why it should be fixed.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/86b3a96ce990b0ee0adab221146b5a5c751bd4a9.1645629459.git.michal.simek@xilinx.com
2022-03-07 16:33:47 +01:00
Michal Simek
8b82a3a7fe arm64: zynqmp: Enable DP driver for SOMs
The main reason is to send pmufw cfg overlay from U-Boot to PMUFW to enable
access to DP. Overlay is sent when cls command is called and for that IP
has to be enabled in carrier cards.
And IP needs to be also enabled in SOM dt because with DTB reselection new
DT is not parsed in pre reloc U-Boot instance. It is called from board_f
via embedded_dtb_select(). That's why bind function is not able to allocate
memory and it ends up with error:
"Video device 'display@fd4a0000' cannot allocate frame buffer memory
-ensure the device is set up before relocation"

To avoid this situation DP is placed also to SOM where bind function is
called and frame buffer memory is allocated and just reused after DTB
reselection. Result is the same. There could be a problem in Linux with
different DP configurations but that's need to be solved there because
console should be on from u-boot already.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/c4f31641f917fddb09d976f56875057c658f264c.1645629459.git.michal.simek@xilinx.com
2022-03-07 16:33:47 +01:00
Michal Simek
ff79448294 arm64: zynqmp: Switch to ethernet-phy-id in kv260
Use ethernet-phy-id compatible string to properly describe phy reset on
kv260 boards. Previous description wasn't correct because reset was done
for mdio bus to operate and it was in this case used for different purpose
which was eth phy reset. With ethernet-phy-id phy reset happens only for
the phy via phy framework.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/73b64f1a2b873b4e26bd2b365364bdf313794ae2.1645629459.git.michal.simek@xilinx.com
2022-03-07 16:33:47 +01:00
Michal Simek
a3efa53c01 arm64: zynqmp: Use assigned-clock-rates for setting up clock in SOM
With limited low level configuration done via psu-init only IPs connected
on SOM are initialized and configured. All IPs connected to carrier card
are not initialized. There is a need to do proper reset, pin configuration
and also clock setting.
The patch targets the last part which is setting up proper clock for USBs
and SDs.
Also setup proper bus width for SD cards.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Sai Krishna Potthuri <lakshmi.sai.krishna.potthuri@xilinx.com>
Link: https://lore.kernel.org/r/d9f80b2551bd246c3d7ecb09b516806c8dc83ed9.1645629459.git.michal.simek@xilinx.com
2022-03-07 16:33:47 +01:00
Michal Simek
59e1bdd48d arm64: zynqmp: Setup clock for DP and DPDMA
Clocks are coming from shared HW design where these frequencies should be
aligned with PLL setup.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/04454c50d0d13e450976942085d763ab5aa38f98.1645629459.git.michal.simek@xilinx.com
2022-03-07 16:33:47 +01:00
Michal Simek
c36dc2449b arm64: zynqmp: Move usb hub from i2c to usb node
Based on upstream discussion based on link below usb hub should be placed
to usb node directly as child node. Based on this Linux driver was updated
and the same change should be also reflected in kv260 board.

Link: https://lore.kernel.org/all/CAL_JsqJZBbu+UXqUNdZwg-uv0PAsNg55026PTwhKr5wQtxCjVQ@mail.gmail.com/
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/aa18df1978f161b933e6cdc6cd99c807b5f74398.1645629459.git.michal.simek@xilinx.com
2022-03-07 16:33:47 +01:00
Michal Simek
d7b5cc89d3 microblaze: Do not place u-boot to reserved memory location
Microblaze can also have reserved space in DT which u-boot has to avoid to
placing self to that location. The same change was done in Zynqmp by commit
ce39ee28ec ("zynqmp: Do not place u-boot to reserved memory location").

This feature was tested with this memory description on kc705:

	memory {
		device_type = "memory";
		reg = <0x80000000 0x40000000>;
	};

	reserved-memory {
		#address-cells = <1>;
		#size-cells = <1>;
		ranges;

		alloc@b00000000 {
			reg = <0xb0000000 0x10000000>;
			no-map;
		};

		alloc@a8000000 {
			reg = <0xa8000000 0x00010000>;
			no-map;
		};
	};

And in U-Boot log you can check u-boot relocation address and reserved
locations.
U-Boot 2022.01-03974-gb1b4c2dea9b9 (Feb 25 2022 - 11:59:48 +0100)

Model: Xilinx MicroBlaze
DRAM:  1 GiB
Flash: 128 MiB
Loading Environment from nowhere... OK
In:    serial
Out:   serial
Err:   serial
Model: Xilinx MicroBlaze
Net:   AXI EMAC: 40c00000, phyaddr 7, interface gmii
eth0: ethernet@40c00000
U-BOOT for microblaze-generic

U-Boot-mONStR> bdi
...
DRAM bank   = 0x00000000
-> start    = 0x80000000
-> size     = 0x40000000
...
relocaddr   = 0xaff69000
...
lmb_dump_all:
 memory.cnt  = 0x1
 memory[0]	[0x80000000-0xbfffffff], 0x40000000 bytes flags: 0
 reserved.cnt  = 0x3
 reserved[0]	[0xa8000000-0xa800ffff], 0x00010000 bytes flags: 4
 reserved[1]	[0xafe87bb0-0xafffffff], 0x00178450 bytes flags: 0
 reserved[2]	[0xb0000000-0xbfffffff], 0x10000000 bytes flags: 4

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/ea0a8ccce723478eb518f6fdceb91d4f129efb68.1646122398.git.michal.simek@xilinx.com
2022-03-07 16:33:47 +01:00
Michal Simek
fda7cbfefd power: zynqmp: Use zynqmp_pmufw_node() from firmware
Remove private xpm_configobject[] and use zynqmp_pmufw_node() which
provides the same functionality.
Also add debug messages for easier debugging.

Fixes: e0283cbdfd ("power: zynqmp: Add power domain driver for ZynqMP")
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Link: https://lore.kernel.org/r/bddf11459b9b9e849fac9a50db2f1a5fdfae4119.1646122254.git.michal.simek@xilinx.com
2022-03-07 16:33:47 +01:00
T Karthik Reddy
15efe0f3a5 gpio: slg7xl45106: Add support for slg7xl45106 i2c gpo expander
slg7xl45106 is i2c based 8-bit gpo expander, gpo pins are set and get by
writing and reading corresponding gpo bit value into its data register.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Link: https://lore.kernel.org/r/839f475cc75c97ffb3496a4caa93de2faabdbca2.1645629688.git.michal.simek@xilinx.com
2022-03-07 16:33:47 +01:00
Ashok Reddy Soma
980e55518f mmc: zynq_sdhci: Enable card detect workaround for ZynqMP
Card detect state stable issue is observed on few ZynqMP boards(SOM),
so enable the workaround 'commit b6f44082d5 ("mmc: zynq_sdhci: Wait
till sd card detect state is stable")' for ZynqMP platforms also.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/0bf6154c79f24227d786efc5e2c1f506185b2bce.1645625609.git.michal.simek@xilinx.com
2022-03-07 08:55:14 +01:00
Ashok Reddy Soma
8d32bca205 mmc: zynq_sdhci: Change granularity of timeout to 1us
The timeout used in 'commit b6f44082d5 ("mmc: zynq_sdhci: Wait
till sd card detect state is stable")' workaround is 1000ms at a
granularity of 1msec. Change it to 1usec, to not waste time incase the
cd is stable.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/f008d2bcf864702a01564789f14f9cdecb8acd45.1645625609.git.michal.simek@xilinx.com
2022-03-07 08:55:14 +01:00
Ashok Reddy Soma
c252b27747 mmc: zynq_sdhci: Fix timeout issue
In the workaround added with 'commit b6f44082d5 ("mmc: zynq_sdhci: Wait
till sd card detect state is stable")' the timeout variable has post
decrement. Whenever timeout happens, this post decrement is making
timeout=0xffffffff, so timeout error print and return statement are
never reached. Fix it by decrementing it inside the while loop.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/61fc1160ada0dd622cd29e381a74af7bf3d9a200.1645625609.git.michal.simek@xilinx.com
2022-03-07 08:55:14 +01:00
Michael Walle
03a8e826e0 ARM: dts: zynq: add NAND flash controller node
Recently, a driver for the ARM Primecell PL35x static memory controller
(including NAND controller) was added in linux. Add the corresponding
device tree node.

Also update cfi-flash registers and location in DT.

Signed-off-by: Michael Walle <michael@walle.cc>
Signed-off-by: Amit Kumar Mahapatra <amit.kumar-mahapatra@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/20210616155437.27378-3-michael@walle.cc
Link: https://lore.kernel.org/r/ee81d3846a1ce93f240d61537d404796e5599c1c.1645625433.git.michal.simek@xilinx.com
2022-03-07 08:52:20 +01:00
Michal Simek
c2b74edf15 mtd: nand: Update driver to match new DT binding
New binding changed node name from flash@e1000000 to nand-controller@0,0
which should be reflected in the driver. Both names are supported for
backward compatibility.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/61f6edd965e0c0b179184823d5283c6c61a1eb35.1645625433.git.michal.simek@xilinx.com
2022-03-07 08:52:20 +01:00
Ashok Reddy Soma
4173a42685 dm: pinctrl: Use explicit values for enums
Based on discussion at
https://lore.kernel.org/r/20200318125003.GA2727094@kroah.com we got
recommendation to use explicit values for all enums.

So, add explicit values to all pinctrl related enums for readability.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Link: https://lore.kernel.org/r/dcdb20e7252ea7465e9f984d815e9624c30e9558.1645624969.git.michal.simek@xilinx.com
2022-03-07 08:49:42 +01:00
T Karthik Reddy
2569b51e32 Revert "board: zynqmp: Fix for wrong AMS setting by ROM"
This reverts commit dfbe492ede.
Analog bus control register should be programmed in SPL only. This commit
3414712ba8 ("arm64: zynqmp: Writing correct value to ANALOG_BUS") is
programming the same. So revert this commit.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/215bc936e36f88d2e7c4422ec68cad6d40cb8f68.1645624892.git.michal.simek@xilinx.com
2022-03-07 08:49:08 +01:00
Ashok Reddy Soma
7a036b674f fru: ops: Add support to read mac addresses from multirecord
Add support to read MAC addresses from mac address multirecord.
Check if multi record is found, then jump to mac address multirecord by
comparing the record type field. If it matches mac address
multirecord(0xD2), then copy mac addresses.

Copy these read MAC address in xilinx_read_eeprom_fru so that they are
updated to eth*addr in board_late_init_xilinx().

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/18f31bc528820934854ea5fd9dc581778fc1e40c.1645624855.git.michal.simek@xilinx.com
2022-03-07 08:48:22 +01:00
Ashok Reddy Soma
ff8ee707fb xilinx: common: Optimise updating ethaddr from eeprom
In board_late_init_xilinx() eth*addr are updated from the values read from
eeprom. Ideally the MAC addresses are updated sequencially. So if any
MAC address is invalid, it means there are no further valid values.
So optimise this logic by replacing continue with break.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/efef0d07add5d5777396ea111ad75411dc402db3.1645624855.git.michal.simek@xilinx.com
2022-03-07 08:48:21 +01:00
Ashok Reddy Soma
90e8f2db60 fru: ops: Return error from checksum if data is all zero's
fru_checksum function is simply adding all the bytes and returning the
sum. If the data passed to this function is all zero's then it will
return 0, and the functions calling this api will assume that checksum
is correct. Ideally this is not good. Fix this by returning error if all
the data is 0's.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/ac0366fe55c60a818a3f9ed33d96826c817d5520.1645624855.git.michal.simek@xilinx.com
2022-03-07 08:48:21 +01:00
Ashok Reddy Soma
952b2e60de fru: ops: Clear fru table before storing data
Fill fru table with 0's before using it, to avoid junk data.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/e5f15caf9c2102316e39f300d7c9c1ecb6be8439.1645624855.git.michal.simek@xilinx.com
2022-03-07 08:48:21 +01:00
Tom Rini
6d3c46ed0e Merge https://source.denx.de/u-boot/custodians/u-boot-sunxi
- Fix ARMv5/F1C100 FEL booting
- Fix F1C100 reset
- Introduce proper F1C100 boot method detection
- Enable SPI booting for F1C100

Boot tested from FEL, SPI, SD card and eMMC (where applicable) on
Pine64-LTS, Pine-H64, BananaPi M1, OrangePi Zero, LicheePi Nano(F1C100).
2022-03-05 20:46:55 -05:00
Tom Rini
0444cbbe77 Merge branch '2022-03-04-assorted-minor-fixes'
- mailmap file updates, OpenSSL code cleanup, assorted TI platform
  fixes, typo fix.
2022-03-05 11:34:31 -05:00
Yann Droneaud
9b5ad4f5da lib: rsa: use actual OpenSSL 1.1.0 EVP MD API
Since OpenSSL 1.1.0, EVP_MD_CTX_create() is EVP_MD_CTX_new()
                     EVP_MD_CTX_destroy() is EVP_MD_CTX_free()
                     EVP_MD_CTX_init() is EVP_MD_CTX_reset()

As there's no need to reset a newly created EVP_MD_CTX, moreover
EVP_DigestSignInit() does the reset, thus call to EVP_MD_CTX_init()
can be dropped.
As there's no need to reset an EVP_MD_CTX before it's destroyed,
as it will be reset by EVP_MD_CTX_free(), call to EVP_MD_CTX_reset()
is not needed and can be dropped.

Signed-off-by: Yann Droneaud <ydroneaud@opteya.com>
2022-03-04 15:20:07 -05:00
Michal Simek
4fa4227cdd .mailmap: Record all address for main U-Boot contributor
Based on looking at top contributors it was seen that top statistics from
top contributors don't include all contributions from different email
addresses. That's why I checked all top contributors are checked it.

git shortlog -n $START..$END -e -s

The patch is adding mapping for Bin Meng, Marek Vasut, Masahiro Yamada,
Michal Simek, Tom Rini, Wolfgang Denk.
And also use mapping for Stefan Roese and Wolfgang Denk to be properly
counted.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-03-04 15:20:06 -05:00
Heinrich Schuchardt
5017f9b595 mkimage: error handling for FIT image
If parameter -F is given but FIT support is missing, a NULL pointer might
dereferenced (Coverity CID 350249).

If incorrect parameters are given, provide a message and show usage.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2022-03-04 15:20:06 -05:00
Sébastien Szymanski
55fd1c442e cmd: pwm: fix typo 'eisable' -> 'disable'
Fixed misspelled 'disable' in help text.

Signed-off-by: Sébastien Szymanski <sebastien.szymanski@armadeus.com>
2022-03-04 15:20:06 -05:00
Jan Kiszka
39834ccdd4 arm: dts: iot2050: Add cfg register space for ringacc and udmap
Recent unrelated fixes (9876ae7db6) revealed that we were missing bits
from 2af181b53e in the IOT2050 dt. Add them, but only for main U-Boot.
SPL loads from QSPI only, thus cannot use DMA.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
2022-03-04 15:20:06 -05:00
Aswath Govindraju
4403e1a31c configs: j721e_*_evm_a72_defconfig: Enable config for setting mmc speed mode
Enable config for setting mmc speed mode from U-Boot command line.

Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
2022-03-04 15:20:06 -05:00
Christian Gmeiner
f7fbe547d9 arm: mach-k3: am6_init: Use CONFIG_TI_I2C_BOARD_DETECT
We only want to call do_board_detect() if CONFIG_TI_I2C_BOARD_DETECT
is set. Same as done for am64.

This makes it possible to add a custom am65 based board design to
U-Boot that does not use this board detection mechanism.

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
2022-03-04 15:20:06 -05:00
Romain Naour
4ff9a8c33c configs: ti: use standard configuration nodes naming
Currently, any u-boot bootloader for ti armv7 platforms using
DEFAULT_FIT_TI_ARGS to boot with a fitimage (boot_fit = 1)
doesn't boot when built with Yocto Poky (openembedded-core).

  ## Loading kernel from FIT Image at 90000000 ...
  Could not find configuration node
  ERROR: can't get kernel image!

Arago forked the kernel-fitimage class [1] and altered the
configuration nodes naming while adding the OPTEE support by
using FITIMAGE_CONF_BY_NAME by default [2].

The "upstream" kernel-fitimage class from openembedded-core still
add the "conf-" prefix for each configuration nodes [3].

The ITS file format (from doc/uImage.FIT/source_file_format.txt)
is not really accurate with the expected naming of these nodes.
But in practice the "conf-" prefix is widely used.

When the FIT image support has been added for ti armv7 platforms
the naming from Arago has been used [3]. Fix this issue by adding
the prefix expected by the ITS file generated by kernel-fitimage
class from openembedded-core.

[1] http://arago-project.org/git/meta-arago.git?p=meta-arago.git;a=commitdiff;h=719ab1b2098bcdc59c249e3529fa82cb1b9130e6
[2] http://arago-project.org/git/meta-arago.git?p=meta-arago.git;a=commitdiff;h=f23f2876a0cda89241d031bb7ba0b4256ed90035
[3] https://git.openembedded.org/openembedded-core/tree/meta/classes/kernel-fitimage.bbclass?h=yocto-3.1.13#n290
[3] 1e93cc8473

Signed-off-by: Romain Naour <romain.naour@smile.fr>
Cc: Tom Rini <trini@konsulko.com>
Reviewed-by: Denys Dmytriyenko <denys@konsulko.com>
2022-03-04 15:20:06 -05:00
Tom Rini
55b5c426ae Merge https://source.denx.de/u-boot/custodians/u-boot-marvell
- pci_mvebu: Minor cleanup (Pali)
- mvebu: turris_omnia: Enable ext4 write support (Marek)
- a37xx: Misc fixes in PCI and pinctrl (Pali & Marek)
- a38x/rtc: Fix null pointer access (Francios)
- mvebu: x530: clearfog: Fix ODT configuration (Chris)
- kwboot: Fix boot and terminal mode (Pali)
2022-03-04 08:27:32 -05:00
Pali Rohár
f4fa962fcd tools: kwboot: Update references with public links
Public documents about BootROM of some Marvell SoCs are available in the
public Web Archive. Put this information into source code.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-by: Stefan Roese <sr@denx.de>
2022-03-04 13:12:43 +01:00
Pali Rohár
0b5909d3af tools: kwboot: Update doc about Avanta
Testes proved that current kwboot version supports also Avanta SoCs.
It looks like that Avanta SoCs are using same kwbimage format as Armada.

Signed-off-by: Pali Rohár <pali@kernel.org>
Tested-by: Tony Dinh <mibodhi@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-by: Stefan Roese <sr@denx.de>
2022-03-04 13:12:38 +01:00
Pali Rohár
787fcf5c00 tools: kwboot: Update manpage
Document -D, -b, -d, -q and -s options.

Add common examples how to use kwboot.

Add information about Armada 38x BootROM bug for debug console mode and how
to workaround it.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-by: Stefan Roese <sr@denx.de>
2022-03-04 13:12:31 +01:00
Pali Rohár
bdc4dbaefe tools: kwboot: Update usage
Add all supported Armada SoCs and document -b and -d options in usage.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-by: Stefan Roese <sr@denx.de>
2022-03-04 13:12:26 +01:00
Pali Rohár
e8d26e8276 tools: kwboot: Add support for backspace key in mini terminal
Marvell BootROM recognize only '\b' byte as backspace. Use terminfo
for retrieving current backspace sequence and replace any occurrence of
backspace sequence by the '\b' byte.

Reading terminfo database is possible via tigetstr() function from system
library libtinfo.so.*. So link kwboot with -ltinfo.

Normally terminfo functions are in <term.h> system header file. But this
header file conflicts with U-Boot "termios_linux.h" header file. So declare
terminfo functions manually.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-by: Stefan Roese <sr@denx.de>
2022-03-04 13:12:20 +01:00
Pali Rohár
93976af589 tools: kwboot: Fix sending and processing debug message pattern (-d option)
-d option is currently broken. In most cases BootROM does not detect this
message pattern. For sending debug message pattern it is needed to do same
steps as for boot message pattern.

Implement sending debug message pattern via same separate thread like it is
for boot message pattern.

Checking if BootROM entered into UART debug mode is different than
detecting UART boot mode. When in boot mode, BootROM sends xmodem NAK
bytes. When in debug mode, BootROM activates console echo and reply back
every written byte (extept \r\n which is interpreted as executing command
and \b which is interpreting as removing the last sent byte).

So in kwboot, check that BootROM send back at least 4 debug message
patterns as a echo reply for debug message patterns which kwboot is sending
in the loop.

Then there is another observation, if host writes too many bytes (as
command) then BootROM command line buffer may overflow after trying to
execute such long command. To workaround this overflow, it is enough to
remove bytes from the input line buffer by sending 3 \b bytes for every
sent character. So do it.

With this change, it is possbile to enter into the UART debug mode with
kwboot -d option.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-by: Stefan Roese <sr@denx.de>
2022-03-04 13:12:13 +01:00
Pali Rohár
913866af6c tools: kwboot: Use separate thread for sending boot message pattern
After BootROM successfully detects boot message pattern on UART it waits
until host stop sending data on UART. For example Armada 385 BootROM
requires that host does not send anything on UART at least 24 ms. If host
is still sending something then BootROM waits (possibly infinitely).

BootROM successfully detects boot message pattern if it receives it in
small period of time after power on.

So to ensure that host put BootROM into UART boot mode, host must send
continuous stream of boot message pattern with a small gap (for A385 at
least 24 ms) after series of pattern. But this gap cannot be too often or
too long to ensure that it does not cover whole BootROM time window when it
is detecting for boot message pattern.

Therefore it is needed to do following steps in cycle without any delay:
1. send series of boot message pattern over UART
2. wait until kernel transmit all data
3. sleep small period of time

At the same time, host needs to monitor input queue, data received on the
UART and checking if it contains NAK byte by which BootROM informs that
xmodem transfer is ready.

But it is not possible to wait until kernel transmit all data on UART and
at the same time in the one process to also wait for input data. This is
limitation of POSIX tty API and also by linux kernel that it does not
provide asynchronous function for waiting until all data are transmitted.
There is only synchronous variant tcdrain().

So to correctly implement this handshake on systems with linux kernel, it
is needed to use tcdrain() in separate thread.

Implement sending of boot message pattern in one thread and reading of
reply in the main thread. Use pthread library for threads.

This change makes UART booting on Armada 385 more reliable. It is possible
to start kwboot and power on board after minute and kwboot correctly put
board into UART boot mode.

Old implementation without separate thread has an issue that it read just
one byte from UART input queue and then it send 128 message pattern to the
output queue. If some noise was on UART then kwboot was not able to read
BootROM response as its input queue was just overflowed and kwboot was
sending more data than receiving.

This change basically fixed above issue too.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-by: Stefan Roese <sr@denx.de>
2022-03-04 13:12:06 +01:00
Pali Rohár
c1d911f15f tools: kwboot: Cleanup bootmsg and debugmsg variables
Function kwboot_debugmsg() is always called with kwboot_msg_debug as msg
and function kwboot_bootmsg() with kwboot_msg_debug as msg. Function
kwboot_bootmsg() is never called with NULL msg.

Simplify, cleanup and remove dead code.

No functional change.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-by: Stefan Roese <sr@denx.de>
2022-03-04 13:12:00 +01:00
Pali Rohár
132016e270 tools: kwboot: Remove msg_req_delay
Variable msg_req_delay is set but never used. So completely remove it.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-by: Stefan Roese <sr@denx.de>
2022-03-04 13:11:54 +01:00
Pali Rohár
d8865f8677 tools: kwboot: Check for return value of kwboot_tty_send() and tcflush()
Failure of kwboot_tty_send() and tcflush() functions is fatal, it does not
make sense to continue. So return error back to the caller like in other
places where are called these functions.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-by: Stefan Roese <sr@denx.de>
2022-03-04 13:11:42 +01:00
Chris Packham
0a6f0297c6 ARM: mvebu: x530: clearfog: Add ODT configuration
Commit 369e532691 ("ddr: marvell: a38x: allow board specific ODT
configuration") added the odt_config member to struct
mv_ddr_topology_map ahead of the clk_enable and ck_delay members. This
means that any boards that configured either of clk_enable or ck_delay
needed to have their board topology updated. This affects the x530 and
clearfog boards. Other A38x boards don't touch any of the trailing
members of mv_ddr_topology_map so don't need updating.

Fixes: 369e532691 ("ddr: marvell: a38x: allow board specific ODT configuration")
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Acked-by: Baruch Siach <baruch@tkos.co.il>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-03-04 08:38:05 +01:00
Marek Behún
87724d5c90 arm64: a37xx: pinctrl: Fix PWM pins indexes
Commit 5534fb4f48 ("arm64: a37xx: pinctrl: Correct PWM pins
definitions") introduced bogus definitions os PWM pins: all 4 pins have
index 11, instead of having indexes 11, 12, 13, 14.

Fix this.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-03-04 08:38:05 +01:00
Francois Berder
2454de2c34 drivers: rtc: fix null pointer access in armada38x_rtc_reset
Replace null pointer by pointer to device registers when calling
armada38x_rtc_write.

Signed-off-by: Francois Berder <fberder@outlook.fr>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-03-04 08:38:05 +01:00
Pali Rohár
1fd54253bc arm: a37xx: pci: Fix a3700_fdt_fix_pcie_regions() function again
The a3700_fdt_fix_pcie_regions() function still computes nonsense.

It computes the fixup offset from the PCI address taken from the first
row of the "ranges" array, which means that:
- PCI address must equal CPU address (otherwise the computed fix offset
  will be wrong),
- the first row must contain the lowest address.

This is the case for the default device-tree, which is why we didn't
notice it.

It also adds the fixup offset to all PCI and CPU addresses, which is
wrong.

Instead:
1) The fixup offset must be computed from the CPU address, not PCI
   address.

2) The fixup offset must be computed from the row containing the lowest
   CPU address, which is not necessarily contained in the first row.

3) The PCI address - the address to which the PCIe controller remaps the
   address space as seen from the point of view of the PCIe device -
   must be fixed by the fix offset in the same way as the CPU address
   only in the special case when the CPU adn PCI addresses are the same.
   Same addresses means that remapping is disabled, and thus if we
   change the CPU address, we need also to change the PCI address so
   that the remapping is still disabled afterwards.

Consider an example:
  The ranges entries contain:
    PCI address   CPU address
    70000000      EA000000
    E9000000      E9000000
    EB000000      EB000000

  By default CPU PCIe window is at:        E8000000 - F0000000
  Consider the case when TF-A moves it to: F2000000 - FA000000

  Until now the function would take the PCI address of the first entry:
  70000000, and the new base, F2000000, to compute the fix offset:
  F2000000 - 70000000 = 82000000, and then add 8200000 to all addresses,
  resulting in
    PCI address   CPU address
    F2000000      6C000000
    6B000000      6B000000
    6D000000      6D000000
  which is complete nonsense - none of the CPU addresses is in the
  requested window.

  Now it will take the lowest CPU address, which is in second row,
  E9000000, and compute the fix offset F2000000 - E9000000 = 09000000,
  and then add it to all CPU addresses and those PCI addresses which
  equal to their corresponding CPU addresses, resulting in
    PCI address   CPU address
    70000000      F3000000
    F2000000      F2000000
    F4000000      F4000000
  where all of the CPU addresses are in the needed window.

Fixes: 4a82fca8e3 ("arm: a37xx: pci: Fix a3700_fdt_fix_pcie_regions() function")
Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-03-04 08:38:05 +01:00
Marek Behún
7f59ed6872 arm: mvebu: turris_omnia: Enable ext4 write support in defconfig
Enable ext4 write support in Turris Omnia's defconfig. Some users find
it useful.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-03-04 08:38:05 +01:00
Pali Rohár
fc27e5df63 pci: pci_mvebu: Cleanup macro names
Use "MVPCIE_" prefix instead of generic "PCIE_" prefix for pci_mvebu.c
specific macros. Define offset macros for Root Port registers and use
standard register macros from pci.h when accessing Root Port registers.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-03-04 08:38:05 +01:00
Pali Rohár
68285176a9 pci: pci_mvebu: Remove unused SELECT and lane_mask
Macro SELECT() is unused and struct mvebu_pcie field lane_mask is unused
too. Remove them.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-03-04 08:38:05 +01:00
Pali Rohár
7938b3be7c tools: kwboot: Fix quitting terminal
Sometimes kwboot after quitting terminal prints error message:

  terminal: Bad address

This is caused by trying to call write() syscall with count of (size_t)-1
bytes.

When quit sequence is split into more read() calls then number of input
bytes (nin) at the end of cycle can underflow and be negative. Fix it.

Fixes: de7514046e ("tools: kwboot: Fix detection of quit esc sequence")
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-03-04 08:38:05 +01:00