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ARM: dts: zynq: add NAND flash controller node
Recently, a driver for the ARM Primecell PL35x static memory controller (including NAND controller) was added in linux. Add the corresponding device tree node. Also update cfi-flash registers and location in DT. Signed-off-by: Michael Walle <michael@walle.cc> Signed-off-by: Amit Kumar Mahapatra <amit.kumar-mahapatra@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/20210616155437.27378-3-michael@walle.cc Link: https://lore.kernel.org/r/ee81d3846a1ce93f240d61537d404796e5599c1c.1645625433.git.michal.simek@xilinx.com
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3 changed files with 32 additions and 29 deletions
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@ -50,7 +50,7 @@
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ps-clk-frequency = <33333333>;
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};
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&nand0 {
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&nfc0 {
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status = "okay";
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};
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@ -246,33 +246,6 @@
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#size-cells = <0>;
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};
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smcc: memory-controller@e000e000 {
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#address-cells = <1>;
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#size-cells = <1>;
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status = "disabled";
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clock-names = "memclk", "apb_pclk";
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clocks = <&clkc 11>, <&clkc 44>;
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compatible = "arm,pl353-smc-r2p1", "arm,primecell";
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interrupt-parent = <&intc>;
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interrupts = <0 18 4>;
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ranges ;
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reg = <0xe000e000 0x1000>;
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nand0: flash@e1000000 {
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status = "disabled";
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compatible = "arm,pl353-nand-r2p1";
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reg = <0xe1000000 0x1000000>;
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#address-cells = <1>;
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#size-cells = <1>;
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};
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nor0: flash@e2000000 {
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status = "disabled";
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compatible = "cfi-flash";
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reg = <0xe2000000 0x2000000>;
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#address-cells = <1>;
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#size-cells = <1>;
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};
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};
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gem0: ethernet@e000b000 {
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compatible = "cdns,zynq-gem", "cdns,gem";
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reg = <0xe000b000 0x1000>;
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@ -295,6 +268,36 @@
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#size-cells = <0>;
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};
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smcc: memory-controller@e000e000 {
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compatible = "arm,pl353-smc-r2p1", "arm,primecell";
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reg = <0xe000e000 0x0001000>;
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status = "disabled";
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clock-names = "memclk", "apb_pclk";
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clocks = <&clkc 11>, <&clkc 44>;
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ranges = <0x0 0x0 0xe1000000 0x1000000 /* Nand CS region */
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0x1 0x0 0xe2000000 0x2000000 /* SRAM/NOR CS0 region */
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0x2 0x0 0xe4000000 0x2000000>; /* SRAM/NOR CS1 region */
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#address-cells = <2>;
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#size-cells = <1>;
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interrupt-parent = <&intc>;
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interrupts = <0 18 4>;
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nfc0: nand-controller@0,0 {
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compatible = "arm,pl353-nand-r2p1";
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reg = <0 0 0x1000000>;
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status = "disabled";
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#address-cells = <1>;
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#size-cells = <1>;
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};
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nor0: flash@1,0 {
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status = "disabled";
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compatible = "cfi-flash";
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reg = <1 0 0x2000000>;
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#address-cells = <1>;
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#size-cells = <1>;
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};
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};
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sdhci0: mmc@e0100000 {
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compatible = "arasan,sdhci-8.9a";
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status = "disabled";
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@ -47,7 +47,7 @@
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};
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};
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&nand0 {
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&nfc0 {
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status = "okay";
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};
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