Commit graph

63 commits

Author SHA1 Message Date
Masahiro Yamada
d47fe9bb83 ARM: uniphier: fix init page table for ProXstream2/PH1-LD6b USB boot
Currently, the USB boot mode is supported by an external loader and
U-boot proper image is put on the section 0.  This commit allows
access there.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2015-09-25 00:59:33 +09:00
Masahiro Yamada
019df879a9 ARM: uniphier: add ProXstream2 and PH1-LD6b support
The DDR SDRAM initialization code has not been mainlined yet, but
U-Boot proper should work.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2015-09-25 00:59:33 +09:00
Masahiro Yamada
28f40d4a4d ARM: uniphier: add PH1-Pro5 support
The DDR SDRAM initialization code has not been mainlined yet, but
U-Boot proper should work.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2015-09-25 00:59:28 +09:00
Masahiro Yamada
323d1f9d5b ARM: uniphier: allow to enable multiple SoCs
Before this commit, the Kconfig menu in mach-uniphier only allowed us
to choose one SoC to be compiled.  Each SoC has its own defconfig file
for the build-test coverage.  Consequently, some defconfig files are
duplicated with only the difference in CONFIG_DEFAULT_DEVICE_TREE and
CONFIG_{SOC_NAME}=y.

Now, most of board-specific parameters have been moved to device trees,
so it makes sense to include init code of multiple SoCs into a single
image as long as the SoCs have similar architecture.  In fact, some
SoCs of UniPhier family are very similar:
 - PH1-LD4 and PH1-sLD8
 - PH1-LD6b and ProXstream2 (will be added in the upcoming commit)

This commit will be helpful to merge some defconfig files for better
maintainability.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2015-09-25 00:58:38 +09:00
Masahiro Yamada
e6eecca54f ARM: uniphier: unify low-level debug init code
Move init code of low-level debug into a single file.
This is helpful to create an image that runs on multiple SoCs.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2015-09-25 00:27:53 +09:00
Masahiro Yamada
fcbcd59730 ARM: uniphier: fix glitch signal problem for low-level debug
Currently, IECTRL is enabled after pin-mux settings for the low-level
debugging for PH1-LD4 and PH1-sLD8.  While IECTRL is disabled, input
signals are pulled-down, i.e. glitch signal (Low to High transition)
problem occurs if pin-mux is set up first.  As a result, one invalid
character is input to the UART block and the auto-boot counting is
terminated immediately.

The correct initialization procedure is:
 [1] Enable IECTRL (if IECTRL exists for the pins)
 [2] Set up pin-muxing
 [3] Deassert the reset of the hardware block

Currently, the low-level debugging is working for PH1-sLD3 and
PH1-Pro4, but just in case, follow the sequence for all the SoCs.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2015-09-25 00:27:53 +09:00
Masahiro Yamada
257b11f32d ARM: uniphier: delete unneeded input enable for low-level debug
The UART I/O ports for PH1-Pro4 has no input enable controlling.
This code is useless.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2015-09-25 00:27:53 +09:00
Masahiro Yamada
8497ccc4c2 ARM: uniphier: rename CONFIG_MACH_* to CONFIG_ARCH_UNIPHIER_*
I want these prefixed with CONFIG_ARCH_UNIPHIER_ to clarify
they belong to UniPhier SoC family.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2015-09-25 00:27:53 +09:00
Masahiro Yamada
c8df23cf33 ARM: uniphier: allow to disable CONFIG_MICRO_SUPPORT_CARD
Without this, build fails if CONFIG_MICRO_SUPPORT_CARD is disabled.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2015-09-25 00:27:53 +09:00
Masahiro Yamada
d7728aa408 ARM: uniphier: move CONFIG_SUPPORT_CARD_* macros to local file
It is no longer necessary to define CONFIG_SUPPORT_CARD_* globally.
Move them to a C file as local macros.  Also, rename the C file.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2015-09-25 00:27:53 +09:00
Masahiro Yamada
8469700b6c ARM: uniphier: refactor LED function
The macro, led_write(), is now only used in C sources.  There is no
more reason to keep the tricky assembly macro.  Replace it with a
new C function led_puts().

Also, rename board.h to micro-support-card.h.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2015-09-25 00:27:53 +09:00
Masahiro Yamada
0b198670c6 ARM: uniphier: remove useless wrapper functions
The wrapper functions, uniphier_board_*, are just making function
calls complex.  Remove them.

Also, use empty inline functions in case CONFIG_MICRO_SUPPORT_CARD
is disabled, so that prototype checking works.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2015-09-25 00:27:53 +09:00
Masahiro Yamada
f1378cabc0 ARM: uniphier: remove unused header file
This has been unused since commit f4e190e317 ("ARM: uniphier:
enable SPL_OF_CONTROL").

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2015-09-25 00:27:53 +09:00
Masahiro Yamada
cf88affab6 ARM: uniphier: parse device tree to determine DRAM base and size
Device tree specifies the available memory ranges in its "/memory"
node.  Use it to simplify the CONFIG defines.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2015-09-25 00:27:53 +09:00
Masahiro Yamada
9628afa7f5 ARM: uniphier: remove ifdef CONFIG_{SOC} conditionals from sg-regs.h
To achieve the complete run-time configuration by device trees, ifdef
conditionals in header files are not preferable.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2015-09-25 00:27:53 +09:00
Masahiro Yamada
d5ed8c5727 ARM: uniphier: change the external bus address mapping
In UniPhier SoCs before ProXstream2 and PH1-LD6b, two address spaces
 0x00000000 - 0x0fffffff
 0x40000000 - 0x4fffffff
are both mapped to the external bus (also called system bus),
so either was OK.

In the newest two SoCs, the former (0x00000000 - 0x0fffffff) is
assigned for the serial NOR interface.

Going forward, use the latter for the external bus.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2015-09-25 00:27:53 +09:00
Masahiro Yamada
9879842c6f ARM: uniphier: drop DCC micro support card support
Historically (for compatibility with very old platforms), two
different types of micro support cards have been used with the
UniPhier SoC development boards.  It has been painful to maintain
both.  Having one of them is enough.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2015-09-25 00:27:52 +09:00
Masahiro Yamada
1386233da3 ARM: uniphier: drop ad-hoc input enable settings
These input enable settings are handled by the pinctrl drivers.

Because the external bus pins are input-enabled by default, on-board
devices such as LED still work fine even with this delayed input
enabling.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2015-09-25 00:27:52 +09:00
Masahiro Yamada
11f3afeaa5 ARM: uniphier: drop ad-hoc early pin-muxing settings
As the UniPhier serial driver had already switched to Drive Model
and the pinctrl drivers are now enabled, these pin-muxing settings
are properly handled by the pinctrl drivers.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2015-09-25 00:27:52 +09:00
Masahiro Yamada
f4e190e317 ARM: uniphier: enable SPL_OF_CONTROL
Device Tree really improves code maintainability and is now
available for SPL too.

This is the state-of-the-art implementation in U-boot.

The board files (platform data) are no longer needed.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2015-08-31 00:25:06 +09:00
Masahiro Yamada
94bd3699ee ARM: uniphier: fix build error when CONFIG_DEBUG_LL is defined
The build error happens if CONFIG_DEBUG_LL and CONFIG_MACH_PH1_SLD3
are both enabled.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2015-08-30 22:19:00 +09:00
Masahiro Yamada
3365b4eb55 ARM: UniPhier: add PH1-sLD3 SoC support
The init code for UMC (Unified Memory Controller) and PLL has not
been mainlined yet, but U-boot proper should work.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2015-07-23 23:42:22 +09:00
Masahiro Yamada
8101b98298 ARM: UniPhier: add IDs for PH1-Pro5, ProXstream2, PH1-LD6b
This prepares for new SoCs support.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2015-07-02 01:07:25 +09:00
Masahiro Yamada
fcb2525d37 ARM: UniPhier: add pin mux setting for NAND CS1 of PH1-Pro4
The chip select 1 of the NAND controller is available if you want to
use, although the pins are shared with UART port 2.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2015-05-31 02:56:02 +09:00
Masahiro Yamada
28148b060d ARM: UniPhier: fix pin mux setting for USB port 2 of PH1-sLD8
The register value should be 1, not 4.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2015-05-31 02:56:00 +09:00
Masahiro Yamada
585b38c585 ARM: UniPhier: update DDR PHY register map for PH1-Pro5
PH1-Pro5 includes a newer version of DDR PHY IP.  Some registers
have been added to the reserved areas.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2015-05-31 02:55:57 +09:00
Masahiro Yamada
7fff91ffc0 ARM: UniPhier: set MACH_PH1_PRO4 as default SoC
One disadvantage of commit a26cd04920 (arch: Make board selection
choices optional) is that Kconfig could create such an insane
.config file that no board is selected.

As PH1-Pro4 is the main stream of UniPhier SoC family, rip off the
"optional" again in favor of PH1-Pro4 as the default SoC.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2015-05-31 02:55:53 +09:00
Masahiro Yamada
4e143cd6da ARM: UniPhier: remove meaningless CONFIG_SPL_BUILD ifdefs
This file is only built for SPL.  These ifdef conditionals are
unnecessary because UniPhier platform now supports UART on SPL.
Show appropriate messages on error.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2015-05-31 02:55:41 +09:00
Masahiro Yamada
9fc5f9daa1 ARM: UniPhier: remove unnecessary cache coherency code
Cache coherency for SMP is cared by Linux.  In U-Boot, the secondary
CPU(s) are just sleeping.  Nothing in memory is shared with the
primary CPU.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2015-05-31 02:55:38 +09:00
Masahiro Yamada
12a70e3c96 ARM: UniPhier: use 32 bit register access for debug UART setting
For the same reason as commit d0c47b3ef7 (serial: UniPhier: use
32 bit register access), use "str" instead of "strb" for the LCR
register setting.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2015-05-31 02:55:34 +09:00
Masahiro Yamada
b6ef3a3f04 ARM: UniPhier: update the vendor name of UniPhier in Kconfig
The business for UniPhier Soc family has been transferred from
Panasonic Corporation to Socionext Inc.

Update the SoC select menu in Kconfig.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2015-05-31 02:55:30 +09:00
Masahiro Yamada
f6e7f07c17 ARM: UniPhier: replace <asm/io.h> with <linux/io.h>
In the Linux coding style, it is recommended to include <linux/io.h>
rather than <asm/io.h>.  Follow this trend.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2015-05-31 02:53:56 +09:00
Joe Hershberger
a26cd04920 arch: Make board selection choices optional
By making the board selections optional, every defconfig will include
the board selection when running savedefconfig so if a new board is
added to the top of the list of choices the former top's defconfig will
still be correct.

Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Cc: Tom Rini <trini@konsulko.com>
2015-05-12 18:10:02 -04:00
Masahiro Yamada
326a682358 malloc_f: enable SYS_MALLOC_F by default if DM is on
This option has a bool type, not hex.
Fix it and enable it if CONFIG_DM is on because Driver Model always
requires malloc memory.  Devices are scanned twice, before/after
relocation.  CONFIG_SYS_MALLOC_F should be enabled to use malloc
memory before relocation.  As it is board-independent, handle it
globally.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Robert Baldyga <r.baldyga@samsung.com>
2015-03-28 09:03:09 -04:00
Masahiro Yamada
91405b7fa9 malloc_f: remove redundant defalut values of CONFIG_SYS_MALLOC_F_LEN
The default value of CONFIG_SYS_MALLOC_F_LEN is defined by ./Kconfig
as 0x400.  Each defconfig or Kconfig need not repeat the same value.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Robert Baldyga <r.baldyga@samsung.com>
2015-03-28 09:03:08 -04:00
Masahiro Yamada
90e357efed ARM: UniPhier: remove unnecessary ifdef conditional
The callee (arch/arm/lib/cache-cp15.c) has a #ifdef
CONFIG_SYS_DCACHE_OFF conditional.  The same conditional in the
caller (arch/arm/mach-uniphier/cache_uniphier.c) is redundant.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2015-03-24 00:16:02 +09:00
Masahiro Yamada
a509161a21 ARM: UniPhier: disable L2 cache by lowlevel_init of U-Boot proper
The L2 cache is used as a temporary SRAM on SPL.
Now the secondary CPUs store the necessary code for jumping to
Linux on their L1 I-caches.  So, the L2 cache can be disabled
much earlier, at the very entry of U-Boot proper (lowlevel_init).
This makes the boot sequence clearer.
Also, as the L1 cache has been disabled by the start.S,
enable_caches() does not need to do it again.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2015-03-24 00:15:58 +09:00
Masahiro Yamada
62118b7b01 ARM: UniPhier: optimize kicking secondary CPUs code
Currently, the secondary CPU(s) are kicked three times:
Boot ROM ---(kick)--> SPL ---(kick)--> U-boot ---(kick)--> Linux.
It makes the boot sequence very complicated.

This commit merges the first and the second kicks, so the secondary
CPU(s) can directly jump from SPL to Linux.
arch/arm/mach-uniphier/smp.S is no longer necessary.

Linux boot test passed.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2015-03-24 00:15:55 +09:00
Masahiro Yamada
4d13b1b708 ARM: UniPhier: fix typos in comments
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2015-03-24 00:15:52 +09:00
Masahiro Yamada
def3feb8cb ARM: UniPhier: add empty lowlevel_init to U-boot proper
To remove the ifdef conditional of CONFIG_SKIP_LOWLEVEL_INIT,
add late_lowlevel_init.S to U-Boot proper.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2015-03-24 00:15:48 +09:00
Masahiro Yamada
ce3a63905b ARM: UniPhier: use CONFIG_SPL_STACK to define SPL stack pointer
Ifdef conditionals for CONFIG options are not Kconfig-friendly.
Instead, define CONFIG_SPL_STACK to prepare for Kconfig moves.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2015-03-24 00:15:38 +09:00
Masahiro Yamada
499785b970 ARM: UniPhier: enable Driver Model and UART on SPL
Enable CONFIG_SPL_DM and CONFIG_SPL_SERIAL_SUPPORT, which provide
Driver Model UART support on SPL.

CONFIG_SYS_SPL_MALLOC_{START,SIZE} should be dropped because simple
malloc is preferred on SPL.  Dlmalloc requires some static variables
on .data section that is not available yet for NOR boot mode etc.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2015-03-24 00:15:35 +09:00
Masahiro Yamada
7d1a3a67bc ARM: UniPhier: move UART pin settings to SPL
The UniPhier platform is going to enable Driver Model and UART
support on SPL.  Move UART pin settings to early_pin_init(),
which is called from SPL.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2015-03-24 00:15:28 +09:00
Masahiro Yamada
94ab98bb1c ARM: UniPhier: move platform devices to SPL
Since we do not have OF_CONTROL support for SPL, platform devices
are necessary to enable Driver Model on SPL.

To prepare for that, move platdevice.o to SPL and enable it by
CONFIG_SPL_DM.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2015-03-24 00:15:24 +09:00
Masahiro Yamada
d5e7305013 ARM: UniPhier: include PH1-LD4 Makefile from PH1-sLD8
The two Makefiles arch/arm/mach-uniphier/{ph1-ld4,ph1-sld8}/Makefile
are completely the same.  We can improve the maintainability by
having one to include the other.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2015-03-24 00:15:21 +09:00
Masahiro Yamada
4ab994b16a ARM: UniPhier: remove unnecessary CONFIG_SYS_SOC
Since commit a86ac9540e (ARM: UniPhier: include <mach/*.h> instead
of <asm/arch/*.h>), UniPhier platform does not need the symbolic
link arch/arm/include/asm.  This option is not necessary either.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2015-03-24 00:15:10 +09:00
Masahiro Yamada
105a9e705e ARM: UniPhier: remove SSC_WAY_SIZE and SSC_NUM_ENTRIES macros
Each way of the system cache has 256 entries for PH1-Pro4 and older
SoCs, whereas 512 entries for PH1-Pro5 and newer SoCs.  The line
size is still 128 byte.  Thus, the way size is 32KB/64KB for old/new
SoCs.

To keep lowlevel_init SoC-independent, set BOOT_RAM_SIZE to the
constant value 32KB.  It is large enough for temporary RAM and
should work for all the SoCs of UniPhier family.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2015-03-01 00:03:21 +09:00
Masahiro Yamada
b76fa3a34b ARM: UniPhier: remove stop_mpll() from PH1-Pro4 PLL initialization
This function was intended for MN2WS0235 (what we call PH1-Pro4TV).
On that SoC, MPLL is already running on the power-on reset and it
makes sense to stop the PLL at early boot-up.
On the other hand, PH1-Pro4(R) does not have SC_MPLLOSCCTL register,
so this function has no point.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2015-03-01 00:03:18 +09:00
Masahiro Yamada
6cc2120646 ARM: UniPhier: consolidate MEMCONF setting code
This code is duplicated in ph1-ld4/sg_init.c and ph1-pro4/sg_init.c.
Merge the same code into a new file, memconf.c.

The helper functions no longer have to be placed in the header file.
Also, move them into memconf.c.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2015-03-01 00:03:13 +09:00
Masahiro Yamada
ea6de4ac80 ARM: UniPhier: support 1CS support card for all the UniPhier SoCs
Two support card variants are used with UniPhier reference boards:
 - 1 chip select support card (original CPLD)
 - 3 chip selects support card (ARIMA-compatible CPLD)

Currently, the former is only supported on PH1-Pro4, but it can be
expanded to PH1-LD4, PH1-sLD8 with a little code change.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2015-03-01 00:03:06 +09:00