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https://github.com/AsahiLinux/u-boot
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ARM: uniphier: enable SPL_OF_CONTROL
Device Tree really improves code maintainability and is now available for SPL too. This is the state-of-the-art implementation in U-boot. The board files (platform data) are no longer needed. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Marek Vasut <marex@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
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parent
9271614eb3
commit
f4e190e317
14 changed files with 31 additions and 67 deletions
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@ -816,6 +816,7 @@ config ARCH_UNIPHIER
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select SUPPORT_SPL
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select SPL
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select OF_CONTROL
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select SPL_OF_CONTROL
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select DM
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select SPL_DM
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select DM_SERIAL
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@ -1,9 +1,7 @@
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/*
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* Device Tree Source for UniPhier PH1-LD4 Reference Board
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*
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* Copyright (C) 2014-2015 Panasonic Corporation
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* Copyright (C) 2015 Socionext Inc.
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* Author: Masahiro Yamada <yamada.masahiro@socionext.com>
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* Copyright (C) 2014-2015 Masahiro Yamada <yamada.masahiro@socionext.com>
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*
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* SPDX-License-Identifier: GPL-2.0+ X11
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*/
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@ -57,3 +55,8 @@
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&usb1 {
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status = "okay";
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};
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/* for U-boot only */
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&uart0 {
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u-boot,dm-pre-reloc;
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};
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@ -1,9 +1,7 @@
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/*
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* Device Tree Source for UniPhier PH1-Pro4 Reference Board
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*
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* Copyright (C) 2014-2015 Panasonic Corporation
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* Copyright (C) 2015 Socionext Inc.
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* Author: Masahiro Yamada <yamada.masahiro@socionext.com>
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* Copyright (C) 2014-2015 Masahiro Yamada <yamada.masahiro@socionext.com>
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*
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* SPDX-License-Identifier: GPL-2.0+ X11
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*/
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@ -56,3 +54,8 @@
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&usb0 {
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status = "okay";
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};
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/* for U-boot only */
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&uart0 {
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u-boot,dm-pre-reloc;
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};
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@ -1,9 +1,7 @@
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/*
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* Device Tree Source for UniPhier PH1-sLD3 Reference Board
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*
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* Copyright (C) 2014-2015 Panasonic Corporation
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* Copyright (C) 2015 Socionext Inc.
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* Author: Masahiro Yamada <yamada.masahiro@socionext.com>
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* Copyright (C) 2014-2015 Masahiro Yamada <yamada.masahiro@socionext.com>
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*
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* SPDX-License-Identifier: GPL-2.0+ X11
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*/
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@ -56,3 +54,8 @@
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&usb1 {
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status = "okay";
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};
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/* for U-boot only */
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&uart0 {
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u-boot,dm-pre-reloc;
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};
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@ -1,9 +1,7 @@
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/*
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* Device Tree Source for UniPhier PH1-sLD8 Reference Board
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*
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* Copyright (C) 2014-2015 Panasonic Corporation
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* Copyright (C) 2015 Socionext Inc.
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* Author: Masahiro Yamada <yamada.masahiro@socionext.com>
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* Copyright (C) 2014-2015 Masahiro Yamada <yamada.masahiro@socionext.com>
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*
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* SPDX-License-Identifier: GPL-2.0+ X11
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*/
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@ -57,3 +55,8 @@
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&usb1 {
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status = "okay";
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};
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/* for U-boot only */
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&uart0 {
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u-boot,dm-pre-reloc;
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};
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@ -8,7 +8,6 @@ obj-y += bcu_init.o sg_init.o pll_init.o early_clkrst_init.o \
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early_pinctrl.o pll_spectrum.o umc_init.o ddrphy_init.o
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obj-$(CONFIG_PFC_MICRO_SUPPORT_CARD) += sbc_init.o
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obj-$(CONFIG_DCC_MICRO_SUPPORT_CARD) += sbc_init_3cs.o
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obj-$(CONFIG_SPL_DM) += platdevice.o
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else
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obj-$(CONFIG_BOARD_EARLY_INIT_F) += pinctrl.o clkrst_init.o
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endif
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@ -1,15 +0,0 @@
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/*
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* Copyright (C) 2014-2015 Panasonic Corporation
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* Author: Masahiro Yamada <yamada.m@jp.panasonic.com>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <mach/platdevice.h>
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#define UART_MASTER_CLK 36864000
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SERIAL_DEVICE(0, 0x54006800, UART_MASTER_CLK)
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SERIAL_DEVICE(1, 0x54006900, UART_MASTER_CLK)
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SERIAL_DEVICE(2, 0x54006a00, UART_MASTER_CLK)
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SERIAL_DEVICE(3, 0x54006b00, UART_MASTER_CLK)
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@ -8,7 +8,6 @@ obj-y += sg_init.o pll_init.o early_clkrst_init.o \
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early_pinctrl.o pll_spectrum.o umc_init.o ddrphy_init.o
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obj-$(CONFIG_PFC_MICRO_SUPPORT_CARD) += sbc_init.o
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obj-$(CONFIG_DCC_MICRO_SUPPORT_CARD) += sbc_init_3cs.o
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obj-$(CONFIG_SPL_DM) += platdevice.o
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else
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obj-$(CONFIG_BOARD_EARLY_INIT_F) += pinctrl.o clkrst_init.o
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endif
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@ -1,15 +0,0 @@
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/*
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* Copyright (C) 2014-2015 Panasonic Corporation
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* Author: Masahiro Yamada <yamada.m@jp.panasonic.com>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <mach/platdevice.h>
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#define UART_MASTER_CLK 73728000
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SERIAL_DEVICE(0, 0x54006800, UART_MASTER_CLK)
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SERIAL_DEVICE(1, 0x54006900, UART_MASTER_CLK)
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SERIAL_DEVICE(2, 0x54006a00, UART_MASTER_CLK)
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SERIAL_DEVICE(3, 0x54006b00, UART_MASTER_CLK)
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@ -8,7 +8,6 @@ obj-y += bcu_init.o memconf.o sg_init.o pll_init.o early_clkrst_init.o \
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early_pinctrl.o pll_spectrum.o umc_init.o
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obj-$(CONFIG_PFC_MICRO_SUPPORT_CARD) += sbc_init.o
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obj-$(CONFIG_DCC_MICRO_SUPPORT_CARD) += sbc_init_3cs.o
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obj-$(CONFIG_SPL_DM) += platdevice.o
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else
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obj-$(CONFIG_BOARD_EARLY_INIT_F) += pinctrl.o clkrst_init.o
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endif
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@ -1 +0,0 @@
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#include "../ph1-ld4/platdevice.c"
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@ -1,15 +0,0 @@
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/*
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* Copyright (C) 2014-2015 Panasonic Corporation
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* Author: Masahiro Yamada <yamada.m@jp.panasonic.com>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <mach/platdevice.h>
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#define UART_MASTER_CLK 80000000
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SERIAL_DEVICE(0, 0x54006800, UART_MASTER_CLK)
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SERIAL_DEVICE(1, 0x54006900, UART_MASTER_CLK)
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SERIAL_DEVICE(2, 0x54006a00, UART_MASTER_CLK)
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SERIAL_DEVICE(3, 0x54006b00, UART_MASTER_CLK)
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@ -52,12 +52,12 @@ Burn U-Boot images to NAND
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--------------------------
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Write two files to the NAND device as follows:
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- spl/u-boot-spl.bin at the offset address 0x00000000
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- u-boot-dtb.img at the offset address 0x00010000
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- spl/u-boot-spl-dtb.bin at the offset address 0x00000000
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- u-boot-dtb.img at the offset address 0x00010000
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If a TFTP server is available, the images can be easily updated.
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Just copy the u-boot-spl.bin and u-boot-dtb.img to the TFTP public directory,
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and then run the following command at the U-Boot command line:
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Just copy the u-boot-spl-dtb.bin and u-boot-dtb.img to the TFTP public
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directory, and then run the following command at the U-Boot command line:
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=> run nandupdate
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@ -129,4 +129,4 @@ newer SoCs. Even if it is, EA[25] is not connected on most of the boards.
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--
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Masahiro Yamada <yamada.masahiro@socionext.com>
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Jul. 2015
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Aug. 2015
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@ -288,7 +288,7 @@
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"netdev=eth0\0" \
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"verify=n\0" \
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"nandupdate=nand erase 0 0x00100000 &&" \
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"tftpboot u-boot-spl.bin &&" \
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"tftpboot u-boot-spl-dtb.bin &&" \
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"nand write $loadaddr 0 0x00010000 &&" \
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"tftpboot u-boot-dtb.img &&" \
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"nand write $loadaddr 0x00010000 0x000f0000\0" \
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