mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-25 22:20:45 +00:00
ARM: UniPhier: remove SSC_WAY_SIZE and SSC_NUM_ENTRIES macros
Each way of the system cache has 256 entries for PH1-Pro4 and older SoCs, whereas 512 entries for PH1-Pro5 and newer SoCs. The line size is still 128 byte. Thus, the way size is 32KB/64KB for old/new SoCs. To keep lowlevel_init SoC-independent, set BOOT_RAM_SIZE to the constant value 32KB. It is large enough for temporary RAM and should work for all the SoCs of UniPhier family. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
This commit is contained in:
parent
b76fa3a34b
commit
105a9e705e
2 changed files with 7 additions and 5 deletions
|
@ -60,8 +60,6 @@
|
|||
#define SSCOQCE0 0x506c0270
|
||||
|
||||
#define SSC_LINE_SIZE 128
|
||||
#define SSC_NUM_ENTRIES 256
|
||||
#define SSC_WAY_SIZE ((SSC_LINE_SIZE) * (SSC_NUM_ENTRIES))
|
||||
#define SSC_RANGE_OP_MAX_SIZE (0x00400000 - (SSC_LINE_SIZE))
|
||||
|
||||
#endif /* ARCH_SSC_REGS_H */
|
||||
|
|
|
@ -7,10 +7,12 @@
|
|||
|
||||
#include <config.h>
|
||||
#include <linux/linkage.h>
|
||||
#include <linux/sizes.h>
|
||||
#include <asm/system.h>
|
||||
#include <mach/led.h>
|
||||
#include <mach/arm-mpcore.h>
|
||||
#include <mach/sbc-regs.h>
|
||||
#include <mach/ssc-regs.h>
|
||||
|
||||
ENTRY(lowlevel_init)
|
||||
mov r8, lr @ persevere link reg across call
|
||||
|
@ -122,9 +124,11 @@ ENTRY(enable_mmu)
|
|||
mov pc, lr
|
||||
ENDPROC(enable_mmu)
|
||||
|
||||
#include <mach/ssc-regs.h>
|
||||
|
||||
#define BOOT_RAM_SIZE (SSC_WAY_SIZE)
|
||||
/*
|
||||
* For PH1-Pro4 or older SoCs, the size of WAY is 32KB.
|
||||
* It is large enough for tmp RAM.
|
||||
*/
|
||||
#define BOOT_RAM_SIZE (SZ_32K)
|
||||
#define BOOT_WAY_BITS (0x00000100) /* way 8 */
|
||||
|
||||
ENTRY(setup_init_ram)
|
||||
|
|
Loading…
Reference in a new issue