Commit graph

59907 commits

Author SHA1 Message Date
Laurentiu Tudor
aef654a2ed armv8: fsl-layerscape: make icid setup endianness aware
The current implementation assumes that the registers holding the ICIDs
are universally big endian. That's no longer the case on newer
platforms so update the code to take into account the endianness of
each register.

Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
Reviewed-by: Horia Geantă <horia.geanta@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-08-22 09:07:36 +05:30
Laurentiu Tudor
08f9bc9f43 armv8: fsl-layerscape: add base addresses for several devices
Add CCSR base addresses for ESDHC2, EDMA QDMA, DISPLAY and GPU devices.

Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-08-22 09:07:36 +05:30
Laurentiu Tudor
ef3f364a75 armv8: fsl-layerscape: add missing sec jr base address defines
Add defines for all the SEC job rings base addresses.

Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
Reviewed-by: Horia Geantă <horia.geanta@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-08-22 09:07:36 +05:30
Chuanhua Han
71a2da3fa9 armv8: kconfig: Fix some platforms incorrect I2C clock divider
By default, i2c input clock is platform clk / 2, but some of the
platform of i2c clock divider does not meet this kind of circumstance,
so alone to set default values for these platforms.

Signed-off-by: Chuanhua Han <chuanhua.han@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-08-22 09:07:36 +05:30
Chuanhua Han
1748990ab2 armv8: ls1088aqds: support DSPI mode by hwconfig
BRDCFG4[USBOSC] and BRDCFG5[SPR] register field of Qixis device is used
to control SPI and other IP signal routing.

USBOSC:
0= SPI_CLK used as external USB REFCLK input driven with 24.000 MHz.
SPI devices are unusable in this mode.
1= SPI_CLK used as SPI clock.
SPI devices are usable in this mode. USB block is clocked from
internal sources

SPR[3:2]:
SPI_CS / SDHC_DAT4:7 Routing (schematic net CFG_SPI_ROUTE[3:2]):
00= SDHC/eMMC 8-bit
01= SD Card Rev 2.0/3.0
10= SPI on-board memory
11= TDM Riser / SPI off-board connector.
The default value is 00 if an SDCard/eMMC card is selected as the boot
device.

SPR[1:0]:
SPI_SIN/SOUT/SCK Routing (schematic net CFG_SPI_ROUTE[1:0]):
00= SDHC Sync loop
01= TDM Riser / SPI off-board connector.
10= SPI on-board memory.
11= SPI off-board connector.

By default, the SPI feature is not available, so we need to configure
the above register fields to select the route to the SPI feature.

Signed-off-by: Chuanhua Han <chuanhua.han@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-08-22 09:07:36 +05:30
Pankaj Bansal
a02a9421f4 armv8: ls1028aqds: define ARCH_MISC_INIT to handle mux
Define ARCH_MISC_INIT for LS1028AQDS platform to handle board
related mux.

Signed-off-by: Pankaj Bansal <pankaj.bansal@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-08-22 09:07:36 +05:30
Alison Wang
64fb43dfae armv8: ls1046afrwy: Define CONFIG_ENV_ADDR for QSPI Boot
Defines CONFIG_ENV_ADDR for QSPI Boot which specifies the start
address of the flash sector containing the environment. It fixes
the issue that bootcmd is always set as default at bootup.

Signed-off-by: Alison Wang <alison.wang@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-08-22 09:07:36 +05:30
Pankaj Bansal
2e35d07658 boards: fsl: lx2160ardb: enable flexcan
Flexcan in LX2160ARDB is controlled by FPGA register boardcfg4
bit 5. enable this bit so that flexcan is enabled in LX2160ARDB.

Signed-off-by: Pankaj Bansal <pankaj.bansal@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-08-22 09:07:36 +05:30
Chuanhua Han
67d3a815cb configs: ls1088a: Enable DM support for pcf2127 rtc
Enable related configs on all ls1088aqds boards to support pcf2127
rtc DM function.

Signed-off-by: Chuanhua Han <chuanhua.han@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-08-22 09:07:36 +05:30
Chuanhua Han
f3b6a711a4 armv8: dts: ls1088aqds : Add pcf2127 node
Add the pcf2127-rtc node under the i2c0->i2c-mux@77->i2c@3 for ls1088aqds boards.

Signed-off-by: Chuanhua Han <chuanhua.han@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-08-22 09:07:36 +05:30
Chuanhua Han
c8b2e364b6 armv8: ls1088aqds: Add support of I2C driver model.
Udate ls1088aqds board init code to support DM_I2C.

Signed-off-by: Chuanhua Han <chuanhua.han@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-08-22 09:07:36 +05:30
Chuanhua Han
96d3fb4146 armv8: dts: ls1088ardb: Add slave nodes under the i2c0 controller
This patch adds some slave nodes to support the i2c dm on the device
side under the i2c0 controller.

Signed-off-by: Chuanhua Han <chuanhua.han@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-08-22 09:07:36 +05:30
Chuanhua Han
c2eda95a5b armv8: dts: ls1088a: add I2C node support
One ls1088a, there are four I2C controllers. So add all I2C node
for ls1088a in device tree.

Signed-off-by: Chuanhua Han <chuanhua.han@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-08-22 09:07:36 +05:30
Chuanhua Han
bd9eab46c8 gpio: do not include <asm/arch/gpio.h> on ARCH_LS1088A
As no gpio.h is defined for this architecture, to avoid
compilation failure, do not include <asm/arch/gpio.h> for
arch ls1088a.

Signed-off-by: Chuanhua Han <chuanhua.han@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-08-22 09:07:36 +05:30
Chuanhua Han
5dd043a082 boards: ls1088a: Add support of I2C driver model
DM_I2C_COMPAT is a compatibility layer that allows using the non-DM
I2C API when DM_I2C is used.When DM_I2C_COMPAT is not enabled for
compilation, a compilation error will be generated. This patch
solves the problem that the i2c-related api of the ls1088a platform
does not support dm.

Signed-off-by: Chuanhua Han <chuanhua.han@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-08-22 09:07:36 +05:30
Chuanhua Han
292370df1c configs: ls2088a: Enable DM support for ds3231 rtc
Enable related configs on all ls2088aqds boards to support ds3231
rtc DM function.

Signed-off-by: Chuanhua Han <chuanhua.han@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-08-22 09:07:36 +05:30
Chuanhua Han
1703aaff8b armv8: dts: ls2088aqds : Add ds3232 node
Add the ds3232-rtc node under the i2c0->i2c-mux@77->i2c@0 for ls2088aqds
boards.

Signed-off-by: Chuanhua Han <chuanhua.han@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-08-22 09:07:36 +05:30
Chuanhua Han
885ae0513a boards: ls2088aqds: Add support of I2C driver model.
Update ls2088aqds board init code to support DM_I2C.

Signed-off-by: Chuanhua Han <chuanhua.han@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-08-22 09:07:36 +05:30
Chuanhua Han
db07c447ca rtc: ds3232/ds3231: Add support to generate 32KHz output for driver module
Add an implementation of the rtc_enable_32khz_output() that uses the
driver model i2c APIs.

Also put code related to rtc_enable_32khz_output
under CONFIG_RTC_ENABLE_32KHZ_OUTPUT.

Signed-off-by: Chuanhua Han <chuanhua.han@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-08-22 09:07:36 +05:30
Chuanhua Han
6672ab1628 armv8: dts: ls2088ardb: Add slave nodes under the i2c0
Add some slave nodes to support the i2c dm on the device side under the i2c0.

Signed-off-by: Chuanhua Han <chuanhua.han@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-08-22 09:07:36 +05:30
chuanhua han
407916f5d7 armv8: dts: fsl-ls2088a: add i2c node support
One ls2088a, there are four I2C controllers. So add I2C nodes in dts
for ls2088a.

Signed-off-by: Chuanhua Han <chuanhua.han@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-08-22 09:07:36 +05:30
Chuanhua Han
b547dd9584 gpio: do not include <asm/arch/gpio.h> on ARCH_LS2080A
As no gpio.h is defined for this architecture, to avoid
compilation failure, do not include <asm/arch/gpio.h> for
arch ls2080a.

Signed-off-by: Chuanhua Han <chuanhua.han@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-08-22 09:07:36 +05:30
Chuanhua Han
654e4e70d4 boards: ls2088a: Add support of I2C driver model.
DM_I2C_COMPAT is a compatibility layer that allows using the non-DM
I2C API when DM_I2C is used.When DM_I2C_COMPAT is not enabled for
compilation, a compilation error will be generated. This patch
solves the problem that the i2c-related api of the ls2088a platform
does not support dm.

Signed-off-by: Chuanhua Han <chuanhua.han@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-08-22 09:07:35 +05:30
Chuanhua Han
bd9b0745f7 armv8: dts: ls1028aqds: Add pcf2127 node under i2c1
Add the pcf2127-rtc node under the i2c1 in dts for ls1028aqds boards.

Signed-off-by: Chuanhua Han <chuanhua.han@nxp.com>
Reviewed-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-08-22 09:07:35 +05:30
Chuanhua Han
25d9467c16 armv8: dts: ls1028aqds: Add pca9547 node under the i2c0 controller
Add pca9547 node to support i2c multiplexer under the i2c0 controller
in dts for ls1028aqds boards.

Signed-off-by: Chuanhua Han <chuanhua.han@nxp.com>
Reviewed-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-08-22 09:07:35 +05:30
Chuanhua Han
21d5e964da configs: ls1028a: Enable DM support for pcf2127 rtc
Enable related configs on all ls1028aqds boards to support pcf2127
rtc DM function.

Signed-off-by: Chuanhua Han <chuanhua.han@nxp.com>
Reviewed-by: Alex Marginean <alexm.osslist@gmail.com>
Tested-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-08-22 09:07:35 +05:30
Chuanhua Han
113214f02b armv8: ls1028aqds: Remove the definition of CONFIG_SYS_I2C_EARLY_INIT
Since i2c uses dm mode, i2c controller will be initialized when reading
and writing devices on i2c bus. So there is no need for the original
non-dm mode i2c early initialization function call, this patch removed
the definition of CONFIG_SYS_I2C_EARLY_INIT.

Signed-off-by: Chuanhua Han <chuanhua.han@nxp.com>
Reviewed-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-08-22 09:07:35 +05:30
Chuanhua Han
e120d1277d armv8: dts: ls1028ardb: Add slave nodes under the i2c0 controller
Add some slave nodes to support the i2c dm on the device side under the i2c0.

Signed-off-by: Chuanhua Han <chuanhua.han@nxp.com>
Reviewed-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-08-22 09:07:35 +05:30
Chuanhua Han
dcfb8f516d gpio: do not include <asm/arch/gpio.h> on ARCH_LS1028A
As no gpio.h is defined for this architecture, to avoid
compilation failure, do not include <asm/arch/gpio.h> for
arch ls1028a.

Signed-off-by: Chuanhua Han <chuanhua.han@nxp.com>
Reviewed-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-08-22 09:07:35 +05:30
Chuanhua Han
954cd78828 boards: ls1028a: Add support of I2C driver model
DM_I2C_COMPAT is a compatibility layer that allows using the non-DM
I2C API when DM_I2C is used.When DM_I2C_COMPAT is not enabled for
compilation, a compilation error will be generated. This patch
solves the problem that the i2c-related api of the ls1028a platform
does not support dm.

Signed-off-by: Chuanhua Han <chuanhua.han@nxp.com>
Reviewed-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-08-22 09:07:35 +05:30
Chuanhua Han
7abf9c16aa configs: lx2160: enable DM support for pcf2127 rtc
Enable related configs on all lx2160ardb boards to support pcf2127
rtc DM feature.

Also remove SYS_I2C_MXC_I2Cx, where x is from 1 to 8 from
Kconfig.

Signed-off-by: Chuanhua Han <chuanhua.han@nxp.com>
Signed-off-by: Biwen Li <biwen.li@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-08-22 09:07:35 +05:30
Chuanhua Han
07cb35fb71 armv8: dts: lx2160aqds : Add pcf2127 node
Add the pcf2127-rtc node under the i2c0->i2c-mux@77->i2c@3 in dts for
lx2160aqds boards.

Signed-off-by: Chuanhua Han <chuanhua.han@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-08-22 09:07:35 +05:30
Chuanhua Han
29b9e66683 armv8: dts: lx2160ardb : Add the "u-boot, dm-pre-reloc" for i2c0
Lx2160ardb need to use i2c0 before relocation, so we also need to set
u-boot, dm-pre-reloc to initialize node before relocation.

Signed-off-by: Chuanhua Han <chuanhua.han@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-08-22 09:07:35 +05:30
Chuanhua Han
16c22fb39d armv8: dts: Add pcf2127 node for lx2160ardb
Adds the pcf2127-rtc node under the i2c4 node dts of lx2160ardb boards.

Signed-off-by: Chuanhua Han <chuanhua.han@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-08-22 09:07:35 +05:30
Chuanhua Han
d1edea248a armv8: dts: fsl-lx2160a: add i2c controller and gpio DT nodes
In lx2160a soc, there are eight i2c controllers, this patch adds i2c
nodes for lx2160a, and the gpio2 nodes on which the i2c4 controller
depends.

Signed-off-by: Chuanhua Han <chuanhua.han@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-08-22 09:07:35 +05:30
Chuanhua Han
db717629ff gpio: do not include <asm/arch/gpio.h> on ARCH_LX2160A
As no gpio.h is defined for this architecture, to avoid
compilation failure, do not include <asm/arch/gpio.h> for
arch ls2160a.

Signed-off-by: Chuanhua Han <chuanhua.han@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-08-22 09:07:35 +05:30
Chuanhua Han
068cabe8f6 drivers: i2c: mxc: Fix compiler error when using i2c dm mode
I2C dm mode enablemenet causes below compilation errors:

In file included from include/config.h:8:0,
                 from include/common.h:20:
include/config_fallbacks.h:51:4: error: #error "Cannot define
CONFIG_SYS_I2C when CONFIG_DM_I2C is used"
 #  error "Cannot define CONFIG_SYS_I2C when CONFIG_DM_I2C is used"
    ^~~~~
In file included from include/config.h:8:0,
                 from include/common.h:20:
include/config_fallbacks.h:51:4: error: #error "Cannot define
CONFIG_SYS_I2C when CONFIG_DM_I2C is used"
 #  error "Cannot define CONFIG_SYS_I2C when CONFIG_DM_I2C is used"
    ^~~~~

board/freescale/lx2160a/lx2160a.c: In function 'board_early_init_f':
board/freescale/lx2160a/lx2160a.c:108:2: warning: implicit declaration
of function 'i2c_early_init_f'; did you mean 'arch_early_init_r'?
[-Wimplicit-function-declaration]
  i2c_early_init_f();
  ^~~~~~~~~~~~~~~~
  arch_early_init_r

 drivers/i2c/mxc_i2c.c: In function 'mxc_i2c_probe':
  drivers/i2c/mxc_i2c.c:824:8: warning: implicit declaration of function
'enable_i2c_clk';
  did you mean 'enable_irq_wake'? [-Wimplicit-function-declaration]
  ret = enable_i2c_clk(1, bus->seq);
        ^~~~~~~~~~~~~~
        enable_irq_wake

So fix these compilation errors.

Signed-off-by: Chuanhua Han <chuanhua.han@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-08-22 09:07:35 +05:30
Chuanhua Han
0eba65d201 boards: lx2160a: Add support of I2C driver model
DM_I2C_COMPAT is a compatibility layer that allows using the non-DM I2C
API when DM_I2C is used. When DM_I2C_COMPAT is not enabled for
compilation, a compilation error will be generated. This patch solves
the problem that the i2c-related api of the lx2160a platform does not
support dm.

Signed-off-by: Chuanhua Han <chuanhua.han@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-08-22 09:07:35 +05:30
Ashish Kumar
bc475d0fde configs: ls1043aqds: Move CONFIG_FSL_QSPI to defconfig
Move CONFIG_FSL_QSPI from header file to defconfigs,
consequently unset imply config(CONFIG_SPI_FLASH_BAR) which
is not valid for LS series.

Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-08-22 09:07:35 +05:30
Yuantian Tang
acf40f50b8 armv8: ls1028a: select BOARD_LATE_INIT config
Select BOARD_LATE_INIT for ls1028ardb and ls1028aqds targets
so that late init work can be done.

Signed-off-by: Yuantian Tang <andy.tang@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-08-22 09:07:35 +05:30
Yuantian Tang
0f6607f9e9 common: qixis: make the qixis compatible with new soc
This driver needs modification to work with new soc,
like ls1028, since bitmap of RCFG is changed to
RESV[7:5] LIVE[4] WDEN[3] RESV[2:1] GO[0]
   000      1       0        00      0

Also the RCW location is moved to only dutcfg0.
RESV[7:4] RCWSRC[3:0]
   1111   configurable

Following commands are functional now
qixis_reset
qixis_reset sd
qixis_reset qspi
qixis_reset emmc

Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Signed-off-by: Yuantian Tang <andy.tang@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-08-22 09:07:35 +05:30
Meenakshi Aggarwal
cf0bbbd1ee drivers: net: mc: Report extra memory to Linux
MC firmware need to be aligned to 512M, so minimum 512MB DDR is reserved.
But MC support to work with 128MB or 256MB DDR memory also, in this
case, rest of the memory is not usable.
So reporting this extra memory to Linux through dtb memory fixup.

Signed-off-by: Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-08-22 09:07:35 +05:30
Peng Fan
f62ec5c4bb clk: imx: add i.MX8MM clk driver
Add i.MX8MM clk driver support.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-08-22 00:10:15 +02:00
Peng Fan
543fdc2a16 clk: imx: add i.MX8M composite clk support
Import i.MX8M composite clk from Linux Kernel 5.3.0-rc2

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-08-22 00:10:14 +02:00
Peng Fan
bbb5871b8d clk: imx: add pll14xx driver
Add pll14xx driver for i.MX8MM usage, modifed
from Linux Kernel 5.3.0-rc1

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-08-22 00:10:14 +02:00
Peng Fan
ccab06689a clk: imx: expose CCF entry for all
Expose CCF entry, then we could avoid expand the SoC support list

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-08-22 00:10:14 +02:00
Peng Fan
c66f4f5e30 sandbox: clk: add clk enable/disable test code
Since we added clk enable_count and prograte clk child enabling
operation to clk parent, so add a new function sandbox_clk_enable_count
to get enable_count for test usage.

And add test code to get the enable_count after we enable/disable
the device clk.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-08-22 00:10:09 +02:00
Peng Fan
aeeb2e6d9c clk: support clk tree dump
The previous code only dump the clk list. This patch is
to support clk tree dump, and also dump the enable_cnt.

The code used in patch is similar to dm_dump_all, but
the code here only filter out the UCLASS_CLK devices.

On i.MX8MM, Partial output:
u-boot=> clk dump
 Rate               Usecnt      Name
------------------------------------------
 24000000             0        |-- clock-osc-24m
 24000000             0        |   |-- dram_pll_ref_sel
 750000000            0        |   |   `-- dram_pll
 750000000            0        |   |       `-- dram_pll_bypass
 750000000            0        |   |           `-- dram_pll_out
 24000000             0        |   |-- arm_pll_ref_sel
 1200000000           0        |   |   `-- arm_pll
 1200000000           0        |   |       `-- arm_pll_bypass
 1200000000           0        |   |           `-- arm_pll_out
 1200000000           0        |   |               `-- arm_a53_src
 1200000000           0        |   |                   `-- arm_a53_cg
 1200000000           0        |   |                       `-- arm_a53_div
 24000000             4        |   |-- sys_pll1_ref_sel
 800000000            4        |   |   `-- sys_pll1
 800000000            4        |   |       `-- sys_pll1_bypass
 800000000            4        |   |           `-- sys_pll1_out
 40000000             0        |   |               |-- sys_pll1_40m

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-08-22 00:10:09 +02:00
Peng Fan
0520be0f67 clk: prograte clk enable/disable to parent
On i.MX8MM, thinking such as clk path
OSC->PLL->PLL GATE->CCM ROOT->CCGR GATE->Device

Only enabling CCGR GATE is not enough, we also need to enable PLL GATE
to make sure the clk path work. So when enabling CCGR GATE,
we could prograte to enabling PLL GATE to make life easier.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-08-22 00:10:09 +02:00
Peng Fan
e6849e2fd8 clk: introduce enable_count
As what Linux Kernel 5.3.0 provides when enable/disable clk,
there is an enable_count in clk_core_disable/enable. Introduce
enable_count to track the clk enable/disable count when
clk_enable/disable for CCF. And Initialize enable_count to 0 when
register the clk.

And clk tree dump with enable_count will be supported, it will
be easy for us to check the clk status with enable_count

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-08-22 00:10:09 +02:00