Commit graph

13577 commits

Author SHA1 Message Date
Russ Dill
025a0d40e1 ARM: am33xx: Inhibit re-initialization of DDR during RTC-only
This inhibits the re-inititialization of DDR during an RTC-only resume. If
this is not done, an L3 NOC error is produced as the DDR gets accessed
before the re-init has time to complete. Tested on AM437x GP EVM.

Signed-off-by: Russ Dill <Russ.Dill@ti.com>
[j-keerthy@ti.com Ported to Latest Master branch]
Signed-off-by: Keerthy <j-keerthy@ti.com>
2018-04-06 17:04:33 -04:00
Dave Gerlach
e18945ad22 am43xx: Do not allow EMIF to control DDR_RESET in rtconly config
Prevent EMIF control of DDR_RESET line on DDR3 am43xx platforms for
am43xx_evm_rtconly_config. Without this DDR is unstable and can become
corrupted after multiple iterations of RTC+DDR mode.

Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
[j-keerthy@ti.com Ported to latest master branch]
Signed-off-by: Keerthy <j-keerthy@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-04-06 17:04:33 -04:00
Tero Kristo
7619badb9c ARM: AM43xx: Add support for RTC only + DDR in self-refresh mode
Kernel stores information to the RTC_SCRATCH0 and RTC_SCRATCH1 registers
for wakeup from RTC-only mode with DDR in self-refresh. Parse these
registers during SPL boot and jump to the kernel resume vector if the
device is waking up from RTC-only modewith DDR in Self-refresh.

The RTC scratch register layout used is:

SCRATCH0 : bits00-31 : kernel resume address
SCRATCH1 : bits00-15 : RTC magic value used to detect valid config
SCRATCH1 : bits16-31 : board type information populated by bootloader

During the normal boot path the SCRATCH1 : bits16-31 are updated with
the eeprom read board type data. In the rtc_only boot path the rtc
scratchpad register is read and the board type is determined and
correspondingly ddr dpll parameters are set. This is done so as to avoid
costly i2c read to eeprom.

RTC-only +DRR in self-refresh mode support is currently only enabled for
am43xx_evm_rtconly_config.
This is not to be used with epos evm builds.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
[j-keerthy@ti.com Rebased to latest u-boot master branch]
Signed-off-by: Keerthy <j-keerthy@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-04-06 17:04:33 -04:00
Christophe Leroy
c0bc2a7e06 powerpc: mpc8xx: move watchdog into drivers/watchdog
In preparation of DM watchdog, move basic actions into drivers/watchdog

Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
2018-04-06 16:31:11 -04:00
Christophe Leroy
5c5da4318b powerpc: mpc8xx: cleaning up watchdog
In preparation of migration to DM watchdog, clean up a bit.

The 8xx watchdog really is a HW watchdog, so declare it as is
then it goes through Kconfig

And the watchdog reset doesn't mind getting interrupted, so
no need to disable interrupts

Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
2018-04-06 16:30:37 -04:00
Christophe Leroy
ab0d819258 powerpc: mpc8xx: refactorise reginfo
reginfo is redundant with some of the commands in immap.c, so
move reginfo into that file and remove duplicated info.

Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
2018-04-06 16:30:37 -04:00
Christophe Leroy
b3ede33170 board: MCR3000: cleanup config
Some config is redundant with Kconfig. Fix it.
Also remove unused configs
Move SDRAM_MAX_SIZE in the only place it is used

include/environment.h already defines CONFIG_ENV_SIZE
from CONFIG_ENV_SECT_SIZE and defines CONFIG_ENV_ADDR as
(CONFIG_SYS_FLASH_BASE + CONFIG_ENV_OFFSET)

remove BOOTARGS as bootargs is set by the different boot commands

Fix CONFIG_SYS_INIT_RAM_ADDR and CONFIG_SYS_INIT_RAM_SIZE to be in
line with CPM DPRAM organisation

Remove CONFIG_SYS_GBL_DATA_SIZE, CONFIG_SYS_GBL_DATA_OFFSET and
CONFIG_SYS_INIT_SP_OFFSET which are unused

Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
2018-04-06 16:30:37 -04:00
Christophe Leroy
872807b1e5 powerpc: mpc8xx: initialisation of initial RAM
u-boot requires some RAM at startup, to store global data structure.
RAM is also needed when we migrate to DM for some initial malloc

This patch implements the proper init of that RAM by calling
board_init_f_alloc_reserve() and board_init_f_init_reserve()

Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
2018-04-06 16:30:37 -04:00
Christophe Leroy
b1d62424cb powerpc: mpc8xx: redistribute data in CPM dpram
Some malloc memory is needed at startup for DM model.
Lets reorganise the use of the CPM dpram.

The MPC866/885 dpram, we have 8kbytes dual port RAM, which is usable as:
IMMR + 0x2000..0x2800: BD/Data/Microcode
IMMR + 0x2800..0x2e00: BD/Data
IMMR + 0x2e00..0x3800: BD/Data/Microcode
IMMR + 0x3800..0x3a00: BD/Data
IMMR + 0x3a00..0x3c00: BD/Data/Microcode
IMMR + 0x3c00..0x4000: Parameters for the Peripheral Controllers

Lets reallocate all BDs in the 3800..3a00 area and give the full
2800..2e00 for dynamic RAM allocation including global data

That way, the microcode areas remain available if needed one day.

Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
2018-04-06 16:30:37 -04:00
Christophe Leroy
18f8d4c60d powercp: mpc8xx: move commproc.h
include/commproc.h is dedicated to the 8xx, rename it cpm_8xx.h and
move it into arch/powerpc/include/asm

Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
2018-04-06 16:30:37 -04:00
Christophe Leroy
ee1e600c13 powerpc: mpc8xx: Change CONFIG_8xx to CONFIG_MPC8xx
CONFIG_8xx doesn't mean much outside of arch/powerpc/
This patch renames it CONFIG_MPC8xx just like CONFIG_MPC85xx etc ...
It also renames 8xx_immap.h to immap_8xx.h to be consistent with
other file names.

Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
2018-04-06 16:30:37 -04:00
Christophe Leroy
0ebb5388b4 powerpc: mpc8xx: remove get_immr() argument
get_immr() is always called with 0 as an argument, so it is useless.

Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
2018-04-06 16:30:37 -04:00
Christophe Leroy
14119901fd powerpc: mpc8xx: make get_immr() independent of CONFIG_8xx
SPRN_IMMR is defined regardless of the CPU. Therefore, there
is no point in enclosing get_immr() inside a #ifdef CONFIG_8xx

As it a static inline function, it will in any case only be
compiled in functons using it.

Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
2018-04-06 16:30:37 -04:00
Christophe Leroy
fdef3895a0 powerpc: mpc8xx: get rid of the multiple PVR_ values
Avoid hardcoding the PVR values in C since they are defined
in processor.h

At the same time, remove those multiple PVR values for 8xx and
keep only one that we call PVR_8xx

Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
2018-04-06 16:30:37 -04:00
Christophe Leroy
374a0e306e powerpc: mpc8xx: harmonise initialisation of the immap local pointer
In most places, immap local pointer is defined as
	immap_t __iomem *immap = (immap_t __iomem *)CONFIG_SYS_IMMR;
In a few places, it is defined as
	immap_t __iomem *immap = (immap_t __iomem *)(immr & 0xFFFF0000);

This patch replaces the few of the latest form by the other one.

The two are fully equivalent since SPRN_IMMR is set with CONFIG_SYS_IMMR
very early in start.S

Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
2018-04-06 16:30:37 -04:00
Jagan Teki
4dc04ebfa3 at91: ma5d4evk: Enable DM_SPI
AT91 ma5d4evk board uses atmel spi driver, enable DM_SPI to
use dm functionality.

Kept few functions related to non-dm and gpio on board
files for reference and will be remove once code moved
to relevant drivers.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2018-04-06 16:11:09 -04:00
Jagan Teki
ca57bd6718 at91: ma5d4evk: Add FDT support
Sync DTS from Linux and add FDT support for AT91 ma5d4evk board.

usb0, usb1, usb2 and hlcdc_pwm nodes removed, since there is no support it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2018-04-06 16:11:09 -04:00
Jagan Teki
4d42f16b9f at91: ma5d4evk: Enable DM
Enable Driver model for AT91 ma5d4evk boards.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2018-04-06 16:11:09 -04:00
Jagan Teki
c60bfe9b0c at91: vinco: Enable DM_SPI
AT91 Vinco board uses atmel spi driver, enable DM_SPI to
use dm functionality.

Cc: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2018-04-06 16:11:09 -04:00
Jagan Teki
1e85626788 at91: vinco: Add FDT support
Sync DTS from Linux and add FDT support for AT91 vinco board.

usb0, usb1, and usb2 nodes removed, since there is no support it.

Cc: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2018-04-06 16:11:09 -04:00
Jagan Teki
1a2131ce05 at91: vinco: Enable DM
Enable Driver model for AT91 Vinco boards.

Cc: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2018-04-06 16:11:09 -04:00
Jagan Teki
8b562ef388 at91: taurus: Enable DM_SPI
Enable DM_SPI for atmel SPI driver on taurus board.

Kept few functions related to non-dm and gpio on board
files for reference and will be remove once code moved
to relevant drivers.

Cc: Heiko Schocher <hs@denx.de>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2018-04-06 16:11:09 -04:00
Jagan Teki
08afabc157 at91: gurnard: Enable DM_SPI
Enable DM_SPI for atmel SPI driver on gurnard board.

Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2018-04-06 16:11:09 -04:00
Tom Rini
6074c3879c Patch queue for rpi - 2018-04-06
Highlights this time around:
 
   - Support for new RPi3 B+ model
   - Fix for some SD cards on newer RPi firmware
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Merge tag 'signed-rpi-next' of git://github.com/agraf/u-boot

Patch queue for rpi - 2018-04-06

Highlights this time around:

  - Support for new RPi3 B+ model
  - Fix for some SD cards on newer RPi firmware
2018-04-06 08:30:10 -04:00
Heinrich Schuchardt
99b8db7291 arm: print information about loaded UEFI images
If an exception occurs in a UEFI loaded image we need the start address of
the image to determine the relocation offset.

This patch adds the necessary lines after the registers in the crash dump.
A possible output would be:

UEFI image [0xbffe6000:0xbffe631f] pc=0x138 '/\snp.efi'

With the offset 0x138 we can now find the relevant instruction in the
disassembled 'snp.efi' binary.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-04-05 15:24:01 +02:00
Jonathan Gray
8ae1f82988 mmc: use core clock frequency in bcm2835 sdhost
In raspberrypi-firmware 7fdcd00e00a42a1c91e8bd6f5eb8352fe9358557 and
later start.elf now sets the EMMC clock to 200 MHz.

According to Phil Elwell in
https://github.com/raspberrypi/firmware/issues/953
the SDHost controller shares the core/VPU clock and doesn't use
the EMMC clock.

Use the core clock id when determining the frequency to allow
U-Boot to work with recent versions of raspberrypi-firmware.
Otherwise U-Boot hangs at:

U-Boot 2018.03 (Mar 14 2018 - 20:36:00 +1100)

DRAM:  948 MiB
RPI 3 Model B (0xa02082)
MMC:   mmc@7e202000: 0, sdhci@7e300000: 1
Loading Environment from FAT...

Signed-off-by: Jonathan Gray <jsg@jsg.id.au>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-04-05 13:17:43 +02:00
Tom Rini
e294ba0678 Merge git://git.denx.de/u-boot-sunxi
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-04-04 14:10:39 -04:00
Heinrich Schuchardt
482fc90c0a efi_loader: add missing EFI_RESET_PLATFORM_SPECIFIC
EFI_RESET_PLATFORM_SPECIFIC is one of the values that can be used for the
EFI service ResetSystem. The missing definition is added. The value has to
handled in efi_reset_system().

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-04-04 11:00:07 +02:00
Heinrich Schuchardt
22c793e6a2 efi_loader: exit status for efi_reset_system_init
efi_reset_system_init provides the architecture or board specific
initialization of the EFI subsystem. Errors should be caught and
signalled by a return code.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-04-04 11:00:06 +02:00
Andre Przywara
0bb48ef243 arm: dts: sunxi: update H5 to new EMAC binding
The U-Boot driver for the sun8i-emac was using some preliminary DT
binding. Now since Linux got its own driver in v4.15 and our driver
can now cope with both bindings, let's convert the DT nodes used by the
OrangePi PC2 over to the new bindings used by the kernel.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-04-04 11:31:35 +05:30
Andre Przywara
e88d2a57f3 arm: dts: sunxi: update H3 to new EMAC binding
The U-Boot driver for the sun8i-emac was using some preliminary DT
binding. Now since Linux got its own driver in v4.15 and our driver
can now cope with both bindings, let's convert the DT nodes used by the
various H3 boards over to the new bindings used by the kernel.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-04-04 11:31:35 +05:30
Andre Przywara
06a57f656b arm: dts: sunxi: update A64 to new EMAC binding
The U-Boot driver for the sun8i-emac was using some preliminary DT
binding. Now since Linux got its own driver in v4.15 and our driver
can now cope with both bindings, let's convert the DT nodes used for the
Pine64+ board over to the new bindings used by the kernel.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-04-04 11:31:35 +05:30
Tom Rini
e63d142f6f Merge tag 'arc-for-2018.05' of git://git.denx.de/u-boot-arc
More ARC changes and fixes for v2018.05

 * Update of ARC tools to the most recent arc-2017.09
 * Fix for compile-time warning for AXS10x
 * Add support of platform-specific commands for HSDK
 * Add support for on-board SPI flash on HSDK
   Note though that for write support another series [1]
   is required. I hope that Jagan will be able to review and
   act on SPI flash improvement series before we get beyond RC1.

   Also note that to get clean build for HSDK we need to disable
   stack-usage check [2] as our current GCC erroneously tries to calculate
   stack-usage on a naked function which leads to warning.

[1] https://patchwork.ozlabs.org/project/uboot/list/?series=35796
[2] https://patchwork.ozlabs.org/patch/894139/
2018-04-03 08:33:15 -04:00
Miquel Raynal
491feffa88
sunxi: dts: enable NAND on NES classic
Let the Nintendo NES Classic use the Macronix NAND chip on it.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
2018-04-03 12:11:56 +02:00
Miquel Raynal
663e8a9b54
sunxi: allow NAND support to be compiled for sun8i platforms
Add some clocks/PLL definitions as well as the dependency on MACH_SUN8I
in Kconfig.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
2018-04-03 12:11:52 +02:00
Eugeniy Paltsev
f770b3ee18 ARC: HSDK: Enable SPI flash support
HSDK board has sst26wf016 SPI flash IC which we want to support.

Add SPI controller, CS-gpio and SPI flash nodes to hsdk device tree.
Enable corresponding options in hsdk defconfig.

For SPI write functionality to work we need [1] which
adds support of sst26xxx ICs.

[1] https://patchwork.ozlabs.org/project/uboot/list/?series=35796

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-04-02 12:27:56 +03:00
Eugeniy Paltsev
ada8affdfe ARC: HSDK: Add platform-specific commands
This patch add support of hsdk platform-specific commands:

hsdk_clock set - set clock from axi_freq, cpu_freq and tun_freq
environment variables/command line arguments

hsdk_clock get - save clock frequencies to axi_freq, cpu_freq
and tun_freq environment variables

hsdk_clock print - show CPU, AXI, DDR and TUNNEL current
clock frequencies.

hsdk_clock print_all - show all currently used clock frequencies.

hsdk_init - setup board HW in one of pre-defined configuration
(hsdk_hs34 / hsdk_hs36 / hsdk_hs36_ccm / hsdk_hs38 /
hsdk_hs38_ccm / hsdk_hs38x2 / hsdk_hs38x3 / hsdk_hs38x4)

hsdk_go - run baremetal application on hsdk configured
by hsdk_init command.

This patch changes default behaviour of 'bootm' command:
now we are able to set number of CPUs to be kicked by setting
'core_mask' environment variable before 'bootm' command run.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-04-02 12:27:56 +03:00
Eugeniy Paltsev
bdc9f02fab ARC: AXS10x: DTS: Remove unused interrupt properties
Some device tree nodes (like ethernet, ohci, ehci) in axs10x_mb.dtsi
were copied from linux device tree, so they have interrupts properties.
As we don't use interrupts in uboot we don't have interrupt controller
node in AXS10x device tree. In result we get warnings when we compile
such device tree.

So remove unused interrupts properties to get rid of this warnings.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-04-02 12:26:13 +03:00
Tom Rini
0e5d3e3111 Merge git://git.denx.de/u-boot-dm 2018-04-01 20:36:39 -04:00
Mario Six
e8d5291824 core: ofnode: Fix translation for #size-cells == 0
Commit 286ede6 ("drivers: core: Add translation in live tree case") made
dev_get_addr always use proper bus translations for addresses read from
the device tree. But this leads to problems with certain busses, e.g.
I2C busses, which run into an error during translation, and hence stop
working.

It turns out that of_translate_address() and fdt_translate_address()
stop the address translation with an error when they're asked to
translate addresses for busses where #size-cells == 0 (comment from
drivers/core/of_addr.c):

 * Note: We consider that crossing any level with #size-cells == 0 to mean
 * that translation is impossible (that is we are not dealing with a value
 * that can be mapped to a cpu physical address). This is not really specified
 * that way, but this is traditionally the way IBM at least do things

To fix this case, we check in both the live-tree and non-live tree-case,
whether the bus of the device whose address is about to be translated
has size-cell size zero. If this is the case, we just read the address
as a plain integer and return it, and only apply bus translations if the
size-cell size if greater than zero.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
Signed-off-by: Martin Fuzzey <mfuzzey@parkeon.com>
Reported-by: Martin Fuzzey <mfuzzey@parkeon.com>
Fixes: 286ede6 ("drivers: core: Add translation in live tree case")
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-04-01 22:19:10 +08:00
Tom Rini
f3b623fa52 Merge git://git.denx.de/u-boot-marvell 2018-03-30 18:18:22 -04:00
Tom Rini
80a66a55fa Merge git://git.denx.de/u-boot-x86 2018-03-30 18:17:23 -04:00
Tom Rini
0ca0a546b1 Merge git://git.denx.de/u-boot-riscv 2018-03-30 18:16:56 -04:00
Wilson Ding
9734104fe4 arm64: a37xx: dts: enable pcie port
This patch enabled PCIe port on both devel-board
and espressobin board.

Cc: Simon Glass <sjg@chromium.org>
Cc: Stefan Roese <sr@denx.de>
Signed-off-by: Wilson Ding <dingwei@marvell.com>
Signed-off-by: Ken Ma <make@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-03-30 12:52:49 +02:00
Wilson Ding
92e7a6814c arm64: a37xx: populate pcie memory region
This patch added a new region of 32MiB AT 0xe800.0000
to Armada37x0's memory map. This region is supposed to
be mapped in MMU in order to enable the access to the
PCI I/O or MEM resources.

Signed-off-by: Wilson Ding <dingwei@marvell.com>
Reviewed-on: http://vgitil04.il.marvell.com:8080/38724
Tested-by: iSoC Platform CI <ykjenk@marvell.com>
Reviewed-by: Victor Gu <xigu@marvell.com>
Signed-off-by: Ken Ma <make@marvell.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-03-30 12:52:49 +02:00
Ken Ma
fd81eb9edf Revert "arm64: a37xx: dts: Add pin control nodes to DT"
The commit "arm64: mvebu: Add pinctrl nodes for Armada 3700" has
added new pinctrl nodes.
This reverts commit f7cab0f95b.

Cc: Simon Glass <sjg@chromium.org>
Cc: Stefan Roese <sr@denx.de>
Signed-off-by: Ken Ma <make@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-03-30 12:52:48 +02:00
Ken Ma
30aecc02f7 arm64: a37xx: dts: Correct mpp definitions
This patch corrects below mpp definitions for armada 3720 DB board
and ESPRESSOBin board:
- "smi" pins group is added and "smi" function is set for eth0;
- Now pcie pins are used as gpio to implement PCIe function in
  hardware, so "pcie" group function is changed to "gpio".

Reviewed-on: http://vgitil04.il.marvell.com:8080/43287
Reviewed-by: Hua Jing <jinghua@marvell.com>
Tested-by: iSoC Platform CI <ykjenk@marvell.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Stefan Roese <sr@denx.de>
Signed-off-by: Ken Ma <make@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-03-30 12:52:48 +02:00
Ken Ma
8aecbcd166 arm64: a37xx: dts: Fix the number of GPIO on south bridge
The number of pins in South Bridge is 30 and not 29. There is a fix for
the driver for the pinctrl, but a fix is also need at device tree level
for the GPIO.

Reviewed-on: http://vgitil04.il.marvell.com:8080/43286
Reviewed-by: Hua Jing <jinghua@marvell.com>
Tested-by: iSoC Platform CI <ykjenk@marvell.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Stefan Roese <sr@denx.de>
Signed-off-by: Ken Ma <make@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-03-30 12:52:48 +02:00
Ken Ma
4382e53e96 arm64: a37xx: dts: Add additional pinctrl definition
Add mmc pins, pcie pins and sdio pins definition and do these pins'
configuration for DB board and espressobin board;
Add uart2 pins configuration for DB board.

Reviewed-on: http://vgitil04.il.marvell.com:8080/40914
Reviewed-by: Wilson Ding <dingwei@marvell.com>
Tested-by: Wilson Ding <dingwei@marvell.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Stefan Roese <sr@denx.de>
Signed-off-by: Ken Ma <make@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-03-30 12:52:48 +02:00
Ken Ma
d7d3ee5d64 arm64: a37xx: dts: Add pinctrl configuration for ESPRESSOBin board
Reviewed-on: http://vgitil04.il.marvell.com:8080/40913
Reviewed-by: Wilson Ding <dingwei@marvell.com>
Tested-by: Wilson Ding <dingwei@marvell.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Stefan Roese <sr@denx.de>
Signed-off-by: Ken Ma <make@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-03-30 12:52:48 +02:00
Ken Ma
d13d8ba1e4 arm64: a37xx: dts: add gpio head file including
Cc: Simon Glass <sjg@chromium.org>
Cc: Stefan Roese <sr@denx.de>
Signed-off-by: Ken Ma <make@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-03-30 12:52:48 +02:00
Ivan Gorinov
5d73292cf8 x86: zImage: Pass working device tree data to the kernel
On x86 platforms, U-Boot does not pass Device Tree data to the kernel.
This prevents the kernel from using FDT loaded by U-Boot.

Read the working FDT address from the "fdtaddr" environment variable
and add a copy of the FDT data to the kernel setup_data list.

Signed-off-by: Ivan Gorinov <ivan.gorinov@intel.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: add #include <linux/libfdt.h> to zimage.c to fix build error]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2018-03-30 16:06:58 +08:00
Rick Chen
d58717e425 riscv: ae250: Support DT provided by the board at runtime
Enable CONFIG_OF_BOAD to support delivery dtb to u-boot
at run time instead of embedded.

There are two methods to delivery dtb.
 1 Pass from loader:
   When u-boot boot from RAM, gdb or loader can pass dtb
   via a2 to u-boot dynamically. Of course gdb or loader
   shall be in charge of dtb delivery.

 2 Configure CONFIG_SYS_FDT_BASE:
   It can be configured as RAM or ROM base statically,
   no mater u-boot boot from RAM or ROM.
   If it was configured as ROM base, dtb can be burned
   into ROM(spi flash) by spi driver.

Meanwhile remove CONFIG_SKIP_LOWLEVEL_INIT which is
useless in nx25-ae250 configuration.

Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>
Cc: Greentime Hu <green.hu@gmail.com>
2018-03-30 13:13:56 +08:00
Rick Chen
ebce73f0af Drop CONFIG_FTSDC010_BASE
After drop non-dm code of ftsdc010, the sd register
base definition can be droppped now.

So CONFIG_FTSDC010_BASE and CONFIG_FTSDC010_BASE_LIST both
can be removed from config_whitelist.txt

Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>
Cc: Greentime Hu <green.hu@gmail.com>
2018-03-30 13:13:45 +08:00
Rick Chen
2060a69100 nds32: dts: AG101P support sd High-Speed mode
Enable High-Speed mode with cap-sd-highspeed in dts

Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>
2018-03-30 13:13:34 +08:00
Rick Chen
177c16c933 riscv: dts: AE250 support sd High-Speed mode
Enable High-Speed mode with cap-sd-highspeed in dts.

Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>
2018-03-30 13:13:34 +08:00
Rick Chen
22b7e6fbd3 riscv: bootm: Remove ATAGS
ATAGS is not supported and will be replaced
by DT in riscv-linux. So can be removed now.

Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>
2018-03-30 13:13:29 +08:00
Rick Chen
0462358b62 riscv: bootm: Support to boot riscv-linux
riscv-linux should use BBL (Berkeley bootloader) for
loading the Linux kernel.

U-Boot can play as FSBL(first stage bootloader)
to boot BBL and riscv-linux.

In BBL's init_first_hart(), it will pass dtb with a1.
So implement bootm to pass arguments to BBL correctly.

Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>
2018-03-30 13:13:29 +08:00
Rick Chen
22e8c0f02b riscv: checkpatch: Fix static const char * array declarations
It is reported by checkpatch.pl
WARNING: static const char * array
should probably be static const char * const

Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>
2018-03-30 13:13:22 +08:00
Rick Chen
b9076495db riscv: checkpatch: Fix missing a blank line after declarations
It is reported by checkpatch.pl
WARNING: Missing a blank line after declarations.

Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>
2018-03-30 13:13:22 +08:00
Rick Chen
45fc937576 riscv: checkpatch: Fix alignment should match open parenthesis
It is reported by checkpatch.pl.
CHECK: Alignment should match open parenthesis

Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>
2018-03-30 13:13:22 +08:00
Rick Chen
40717eb849 riscv: checkpatch: Fix use of volatile
It is reported by checkpatch.pl
WARNING: Use of volatile is usually wrong: see
Documentation/process/volatile-considered-harmful.rst

Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>
2018-03-30 13:13:22 +08:00
Rick Chen
bc0818a6a9 riscv: checkpatch: Fix Macro argument reuse
It is CHECK reported by checkpatch.pl
CHECK: Macro argument reuse 'PTE' - possible side-effects?

Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>
2018-03-30 13:13:22 +08:00
Alexander Kochetkov
7a6d7d3e12 rockchip: pinctrl: rk3188: Move the iomux definitions into pinctrl-driver
Clean the iomux definitions at grf_rk3188.h, and move them into
pinctrl-driver for resolving the compiling error of redefinition.

Signed-off-by: Alexander Kochetkov <al.kochet@gmail.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-03-28 23:30:30 +02:00
Alexander Kochetkov
b1d093d256 rockchip: pinctrl: rk3036: Move the iomux definitions into pinctrl-driver
Clean the iomux definitions at grf_rk3036.h, and move them into
pinctrl-driver for resolving the compiling error of redefinition.

Signed-off-by: Alexander Kochetkov <al.kochet@gmail.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-03-28 23:30:30 +02:00
Philipp Tomsich
41837e8a6b rockchip: pinctrl: rk3399: add support for I2C[123467]
This adds support for the (to date unsupported) I2C controllers 1~4
and 6~7 (i.e. now all controllers except I2C5, which is not accessible
on the RK3399-Q7, are supported by pinctrl).

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Tested-by: Klaus Goger <klaus.goger@theobroma-systems.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-03-28 23:30:30 +02:00
Philipp Tomsich
339267a08d rockchip: pinctrl: rk3399: fix GPIO2B1 and GPIO2B2 shift value
The shift values for GPIO2B1 and GPIO2B2 had in fact referred to
GPIO2B0 and GPIO2B1, respectively.  This substitutes the correct
values.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-03-28 23:30:30 +02:00
Tom Rini
89a650e0ff Xilinx changes for v2018.05
- Fix mkimage recognition
 - Update all my fragments
 
 ZynqMP:
 - Use clk driver
 - Support loading elfs in el1
 - Various DTS and defconfig changes
 - Enable newer pmufw versions
 - Support more clocks
 - Remove ep108
 - Secure image support
 - Fix memtest setup
 
 Zynq:
 - Enabling watchdog driver
 - Support more clocks
 - defconfig changes
 
 fpga:
 - Simplify error path
 
 net:
 - GMII case update
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 Version: GnuPG v1
 
 iEYEABECAAYFAlq1D5kACgkQykllyylKDCHt5gCaA4AhhC+BPrFvD8cTFKPix7vq
 ctYAnA63Ye8IkvyOhgn3QwBL5+YXbsVP
 =7++x
 -----END PGP SIGNATURE-----

Merge tag 'xilinx-for-v2018.05' of git://git.denx.de/u-boot-microblaze

Xilinx changes for v2018.05

- Fix mkimage recognition
- Update all my fragments

ZynqMP:
- Use clk driver
- Support loading elfs in el1
- Various DTS and defconfig changes
- Enable newer pmufw versions
- Support more clocks
- Remove ep108
- Secure image support
- Fix memtest setup

Zynq:
- Enabling watchdog driver
- Support more clocks
- defconfig changes

fpga:
- Simplify error path

net:
- GMII case update
2018-03-25 12:00:00 -04:00
Tom Rini
423effc04a Merge git://git.denx.de/u-boot-arc
Alexey:
 1. Significantly rework cache-related functionality.
    In particular that fixes coherency problems in some corner-cases,
    allows us to enable and disable caches in run-time and still
    have properly running system, finally support execution from
    real flash (before we used to run from DDR from the very beginning).

 2. Remove string routines implemented in assembly.
    That allows us to build and run U-Boot on wide range of ARC cores
    with different configurations. I.e. whatever tuning is used on GCC's
    command-line we'll get code for desired flavor of ARC.
    Otherwise for each and every corner-case we would need to add ifdefs
    in assembly code to accommodate missing instructions etc.

 3. Get use of GCC's garbage collector which helps to slim-down resulting image
    quite a bit.

 4. Also now we may disable U-Boot self-relocation for ARC if needed either
    by platform or for debugging purposes.
2018-03-23 09:31:24 -04:00
Eugeniy Paltsev
f665c14f04 ARC: bootm: Refactor GO and PREP subcommands implementation
Refactor GO and PREP subcommands implementation for a simpler
override in the boards platform code.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-03-23 15:57:51 +03:00
Siva Durga Prasad Paladugu
c436bf92f6 arm64: zynqmp: Add support for verifying secure images
This patch adds new command "zynqmp" to handle zynqmp
specific commands like "zynqmp secure". This secure command is
used for verifying zynqmp specific secure images. The secure
image can either be authenticated or encrypted or both encrypted
and authenticated. The secure image is prepared using bootgen
and will be in xilinx specific BOOT.BIN format. The optional
key can be used for decryption of encrypted image if user
key was specified while creation BOOT.BIN.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-03-23 09:36:15 +01:00
Michal Simek
348dbf4368 arm64: zynqmp: Remove ep108 board
ZynqMP Emulation board is no longer tested and there is no reason to
keep maintaining it.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-03-23 09:34:59 +01:00
Michal Simek
f5e2943b8b arm: zynq: Enable cadence driver on zc706
Enable watchdog with reset-on-timeout feature.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-03-23 09:34:43 +01:00
Michal Simek
e6cc3b25d7 arm: zynq: Wire watchdog internals
Watchdog is only enabled in full u-boot. Adoption for SPL should be also
done because that's the right place where watchdog should be enabled.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-03-23 09:34:43 +01:00
Michal Simek
1cf6cac4d1 arm64: zynqmp: Enable newer pmufw versions
As of now newer pmufw is keeping old interfaces. That's why permit
u-boot to run on newer version. Recommended version will be setup later.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-03-23 09:34:43 +01:00
Michal Simek
ee4983f73a arm64: zynqmp: Convert board to use zynqmp-clk driver
Use zynqmp clock driver instead of fixed clocks.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-03-23 09:30:44 +01:00
Tom Rini
b0af10443a Merge git://git.denx.de/u-boot-net 2018-03-22 16:35:43 -04:00
Lokesh Vutla
459353d43a ARM: dts: da850-lcdk: Sync from Linux 4.16
Sync dts from Linux 4.16 and also add u-boot specific
dtsi for OMAPl138 board.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-03-22 16:32:31 -04:00
Lokesh Vutla
891ab74b1f davinci: Enable DDR_INIT for DA8XX
Commit 6aa4ad8e38 ("Convert CONFIG_SOC_DA8XX et al to Kconfig")
converted SOC_DA8XX to Kconfig but missed enabling DDR_INIT for
SOC_DA8XX, which broke OMAPL138 to boot.

Commit 2e87980580 ("davinci: Fix omapl138_lcdk builds") disabled
DDR_INIT for all DA850 SoCs. This failed all DA850 boards to boot
as ddr is not being initialized.

Enable SYS_DA850_DDR_INIT for DA8XX so that all DA850 and OMAPL138
will have ddr initialized

Fixes: 2e87980580 ("davinci: Fix omapl138_lcdk builds")
Fixes: 6aa4ad8e38 ("Convert CONFIG_SOC_DA8XX et al to Kconfig")
Reported-by: Sekhar Nori <nsekhar@ti.com>
Tested-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: David Lechner <david@lechnology.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-03-22 16:32:31 -04:00
Calvin Johnson
ac0ba47b9c armv8: layerscape: csu: enable ns access to PFE registers
Enable all types of non-secure access to PFE block registers.

Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com>
Signed-off-by: Anjaneyulu Jagarlmudi <anji.jagarlmudi@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-03-22 15:05:30 -05:00
Calvin Johnson
c4dc68b02f armv8: fsl-lsch2: configure pfe's DDR and HDBUS interfaces and ECC
1. Set AWCACHE0 attribute of PFE DDR and HDBUS master interfaces
to bufferable.
2. Set RD/WR QoS for PFE DDR and HDBUS AXI master interfaces.
3. Disable ECC detection for PFE.

Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com>
Signed-off-by: Anjaneyulu Jagarlmudi <anji.jagarlmudi@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-03-22 15:05:30 -05:00
Calvin Johnson
c44f8125bc armv8: fsl-lsch2: add pfe macros and update ccsr_scfg structure
SoC specific PFE macros are defined and structure ccsr_scfg
is updated with members defined for PFE.

Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com>
Signed-off-by: Anjaneyulu Jagarlmudi <anji.jagarlmudi@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-03-22 15:05:30 -05:00
Prabhakar Kushwaha
6b1373f245 armv8: fsl-layerscape: Add support of GPIO structure
Layerscape Gen2 SoC supports GPIO registers to control GPIO
signals. Adding support of GPIO structure to access GPIO
registers.

Signed-off-by: Pratiyush Srivastava <pratiyush.srivastava@nxp.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-03-22 15:05:28 -05:00
Álvaro Fernández Rojas
358daa5b22 mips: bmips: add ar-5315 usb support
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
2018-03-21 23:23:13 +01:00
Álvaro Fernández Rojas
ee1f79b738 mips: bmips: add support for bcm6318 usb
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
2018-03-21 23:23:13 +01:00
Álvaro Fernández Rojas
485d2cd3d6 mips: bmips: add vr-3032u usb support
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
2018-03-21 23:23:13 +01:00
Álvaro Fernández Rojas
35e03f0011 mips: bmips: add support for bcm63268 usb
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
2018-03-21 23:23:13 +01:00
Álvaro Fernández Rojas
ddc5dc5a1b mips: bmips: add dgnd3700v2 usb support
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
2018-03-21 23:23:13 +01:00
Álvaro Fernández Rojas
ad7f6ed41e mips: bmips: add support for bcm6362 usb
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
2018-03-21 23:23:13 +01:00
Álvaro Fernández Rojas
56928dd570 mips: bmips: add ar-5387un usb support
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
2018-03-21 23:23:13 +01:00
Álvaro Fernández Rojas
f94e360614 mips: bmips: add support for bcm6328 usb
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
2018-03-21 23:23:13 +01:00
Álvaro Fernández Rojas
b8841ce18a mips: bmips: add wap-5813n usb support
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
2018-03-21 23:23:13 +01:00
Álvaro Fernández Rojas
fc5cf3a0c7 mips: bmips: add support for bcm6368 usb
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
2018-03-21 23:23:13 +01:00
Álvaro Fernández Rojas
e39f6c0b67 mips: bmips: add nb4-ser usb support
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
2018-03-21 23:23:13 +01:00
Álvaro Fernández Rojas
465d6971e9 mips: bmips: add hg556a usb support
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
2018-03-21 23:23:13 +01:00
Álvaro Fernández Rojas
e8dad2e739 mips: bmips: add support for bcm6358 usb
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
2018-03-21 23:23:13 +01:00
Álvaro Fernández Rojas
0975a61513 mips: bmips: add ct-5361 usb support
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
2018-03-21 23:23:13 +01:00
Álvaro Fernández Rojas
d51aaf84cb mips: bmips: add support for bcm6348 usb
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
2018-03-21 23:23:13 +01:00
Álvaro Fernández Rojas
9d466f2fe1 MIPS: add BMIPS Netgear DGND3700v2 board
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
2018-03-21 23:23:13 +01:00
Álvaro Fernández Rojas
8f240a3b45 MIPS: add support for Broadcom MIPS BCM6362 SoC family
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
2018-03-21 23:23:13 +01:00