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davinci: Fix omapl138_lcdk builds

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The omapl138_lcdk platform is not a DA850 SoC so we need to select
SOC_DA8XX and not SOC_DA850, as it was before.  It does however point
out a bit of a misnomer in how all of these PLL defines are named as
they are generic to DA8xx, not DA850 centric.  Remove the 'if SOC_DA850'
under the defaults as these are simply the defaults.  As SOC_DA8XX will
select SYS_DA850_DDR_INIT when needed, we do not need it under both SOC
options.

Fixes: 76e22222d3 ("Convert CONFIG_SYS_DV_CLKMODE et al to Kconfig")
Signed-off-by: Tom Rini <trini@konsulko.com>
This commit is contained in:
Tom Rini 2018-01-31 15:34:49 -05:00
parent ab21ecef7a
commit 2e87980580
1 changed files with 14 additions and 15 deletions
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29
arch/arm/mach-davinci/Kconfig
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@ -24,7 +24,7 @@ config TARGET_EA20
config TARGET_OMAPL138_LCDK
bool "OMAPL138 LCDK"
select SOC_DA850
select SOC_DA8XX
select SUPPORT_SPL
config TARGET_CALIMAIN
@ -54,7 +54,6 @@ config SYS_DA850_DDR_INIT
config SOC_DA850
bool
select SOC_DA8XX
select SYS_DA850_DDR_INIT if SUPPORT_SPL || DA850_LOWLEVEL
config SOC_DA8XX
bool
@ -68,79 +67,79 @@ comment "DA850 PLL Initialization Parameters"
config SYS_DV_CLKMODE
int "PLLCTL Clock Mode"
default 0 if SOC_DA850
default 0
help
Set PLLCTL Clock Mode bit as External Clock or On Chip oscillator
config SYS_DA850_PLL0_POSTDIV
int "PLLC0 PLL Post-Divider"
default 1 if SOC_DA850
default 1
help
Value written to PLLC0 PLL Post-Divider Control Register
config SYS_DA850_PLL0_PLLDIV1
hex "PLLC0 Divider 1"
default 0x8000 if SOC_DA850
default 0x8000
help
Value written to PLLC0 Divider 1 register
config SYS_DA850_PLL0_PLLDIV2
hex "PLLC0 Divider 2"
default 0x8001 if SOC_DA850
default 0x8001
help
Value written to PLLC0 Divider 2 register
config SYS_DA850_PLL0_PLLDIV3
hex "PLLC0 Divider 3"
default 0x8002 if SOC_DA850
default 0x8002
help
Value written to PLLC0 Divider 3 register
config SYS_DA850_PLL0_PLLDIV4
hex "PLLC0 Divider 4"
default 0x8003 if SOC_DA850
default 0x8003
help
Value written to PLLC0 Divider 4 register
config SYS_DA850_PLL0_PLLDIV5
hex "PLLC0 Divider 5"
default 0x8002 if SOC_DA850
default 0x8002
help
Value written to PLLC0 Divider 5 register
config SYS_DA850_PLL0_PLLDIV6
hex "PLLC0 Divider 6"
default 0x8000 if SOC_DA850
default 0x8000
help
Value written to PLLC0 Divider 6 register
config SYS_DA850_PLL0_PLLDIV7
hex "PLLC0 Divider 7"
default 0x8005 if SOC_DA850
default 0x8005
help
Value written to PLLC0 Divider 7 register
config SYS_DA850_PLL1_POSTDIV
hex "PLLC1 PLL Post-Divider"
default 1 if SOC_DA850
default 1
help
Value written to PLLC1 PLL Post-Divider Control Register
config SYS_DA850_PLL1_PLLDIV1
hex "PLLC1 Divider 2"
default 0x8000 if SOC_DA850
default 0x8000
help
Value written to PLLC1 Divider 1 register
config SYS_DA850_PLL1_PLLDIV2
hex "PLLC1 Divider 2"
default 0x8001 if SOC_DA850
default 0x8001
help
Value written to PLLC1 Divider 2 register
config SYS_DA850_PLL1_PLLDIV3
hex "PLLC1 Divider 3"
default 0x8002 if SOC_DA850
default 0x8002
help
Value written to PLLC1 Divider 3 register