Commit graph

56832 commits

Author SHA1 Message Date
Peng Fan
a87eb0405f imx: sip: add call_imx_sip_ret2
This function will be used by i.MX8 fuse driver.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-04-25 09:03:15 +02:00
Ley Foon Tan
bf068c7643 arm: socfpga: mailbox: Fix off-by-one error on command length checking
A mailbox command contains 1-u32 header + arguments. The "len" variable
only contains the length of the arguments, but not the 1-u32 header.
Include the length of header when checking the ring buffer space to
prevent off-by-one error.

Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Signed-off-by: Chee Hong Ang <chee.hong.ang@intel.com>
2019-04-25 00:00:49 +02:00
Simon Goldschmidt
4aab2329b2 arm: socfpga: clean up board config files
Remove outdated defines (not used any more, outdated due to DM
conversion) from various socfpga files in include/config.

Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Acked-by: Marek Vasut <marex@denx.de>
Series-version: 3
Series-changes: 2
- added (this) patch with further cleanups to the socfpga board config
  files
2019-04-25 00:00:49 +02:00
Simon Goldschmidt
faea9e7a78 arm: socfpga: remove CONFIG_SYS_BOOTMAPSZ
socfpga_common.h defines CONFIG_SYS_BOOTMAPSZ to 64 MiB.

Since having this define overrides the 'bootm_size' env variable for
the whole socfpga platform, let's remove this define from socfpga_common.h
and instead rely on the 'bootm_size' env variable (which is initialized
to 160 MiB in the same file's default env). This gives users the
chance to override it in their own environment.

Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Acked-by: Marek Vasut <marex@denx.de>
Series-to: Marek Vasut <marex@denx.de>
Series-to: u-boot@lists.denx.de
Cover-letter:
arm: socfpga: clean up socfpga_common.h
This series cleans up the include/configs/socfpga_common.h file a bit.

It removes some defines that are used nowhere and cleans up some
leftovers after various subsystems have been converted to use DM.
END
2019-04-25 00:00:49 +02:00
Simon Goldschmidt
71f574df9a arm: socfpga: clean up socfpga_common.h
Remove outdated macros and comments (not used any more, outdated due to
DM conversion) from socfpga_common.h.

Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Series-changes: 3
- changed commit message: s/defines/macros and comments/

Series-changes: 2
- remove even more outdated things
2019-04-25 00:00:49 +02:00
Simon Goldschmidt
0b7eb4337d arm: socfpga: move vining_fpga to DM_I2C
All socfpga boards except for vining_fpga use DM_I2C. Enable
DM_I2C for this board and set the EEPROM defines via Kconfig
(enabling CONFIG_I2C_EEPROM from MISC).

Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Series-changes: 2
- added (this) patch to move socfpga_vining to DM_I2C
2019-04-25 00:00:49 +02:00
Simon Goldschmidt
9dc61aac2d arm: socfpga: gen5: reduce SPL pre-reloc malloc
By enabling debug prints in malloc_simple, we can see that SPL for socfpga
gen5 does by far not need the 8 KiB malloc pool currently allocated for
SPL in pre-reloc phase.

On socfpga_socrates, 1304 bytes are currently used (and this increases by
~200 bytes only for the sdram/reset fixes in socfpga-next).

To prevent wasting precious SRAM space, let's reduce the initial heap used
for SPL to 2 KiB. This is still some hundred bytes more than currently
used. Also, the gen5 SPL enables stack and heap in DDR memory pretty
early. Only the initial uclass/dm parsing, serial console and DDR
initialization is done in the initial heap, so these 2 KiB should be
enough for all boards.

Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Acked-by: Marek Vasut <marex@denx.de>
2019-04-25 00:00:49 +02:00
Simon Goldschmidt
aef44283ac arm: socfpga: imply/default common config options
This commit moves common config options used in all socfpga boards
to select/imply in Kconfig. This both cleans up the defconfig files
as well as makes future changes easier.

Options implied/defaulted for all sub-arches:
- SPL, SPL_DM, USE_TINY_PRINTF, NR_DRAM_BANKS

Options implied/defaulted for implied for A10 & gen5:
- FPGA_SOCFPGA, SYS_MALLOC_F_LEN, SYS_TEXT_BASE

Options implied/defaulted for gen5:
- SPL_STACK_R, SPL_SYS_MALLOC_SIMPLE, SPL_STACK_R_ADDR

Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Acked-by: Marek Vasut <marex@denx.de>
2019-04-25 00:00:49 +02:00
Simon Goldschmidt
4399e48deb arm: socfpga: put initial U-Boot stack into DDR
If SPL post-reloc stage puts the stack into DDR, U-Boot should be able to
do that, too.

The reason to do so is that this way, U-Boot initial stack can be larger
than SPL initial stack. In situations where we want to save the SPL
in SRAM for next boot without reloading, this prevents overwriting the
SPL DTB in SRAM if U-Boot stack usage gets too high.

To achieve this, the malloc definition for a10 is moved up and sligthly
changed to ensure CONFIG_SYS_INIT_RAM_SIZE is the remaining available size.

Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Acked-by: Marek Vasut <marex@denx.de>
2019-04-25 00:00:49 +02:00
Simon Goldschmidt
798baf7ca3 arm: socfpga: fix comment about SPL memory layout
The comment about SPL memory layout for socfpga gen5 is outdated: the
initial malloc memory is now at the end of the SRAM, gd is below it
(see board_init_f_alloc_reserve).

Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Acked-by: Marek Vasut <marex@denx.de>
2019-04-25 00:00:49 +02:00
Simon Goldschmidt
ac1ec53e26 configs: socfpga: socrates: enable rtc support
This enables DM_RTC and RTC_M41T62 to enable support for the rtc on the
socrates board.

Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2019-04-25 00:00:49 +02:00
Simon Goldschmidt
d1aa159d99 arm: socfpga: socrates: make rtc work
This patch makes the on-board RTC work on the socfpga_socrates board.
This rtc is present on the board, but it does not work (fails with a
timeout).

This patch adds a weak pull-up on the I2C0-SCL pin connected to the m41t82
RTC on this board. While the SDA line has a pull-up on the pcb, the pull-up
on the SCL line seems to be missing. To work around this, enable the
weak-pull-up feature on this pin.

After applying this patch, the rtc timeout is gone and the 'date' command
can access the rtc chip.

Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2019-04-25 00:00:49 +02:00
Simon Goldschmidt
4e829e9841 rtc: m41t62: add compatible for m41t82
This adds a compatible string for m41t82. This ensures that this driver
can be used for m41t82 in DM mode, too (asit was usable for this model in
non-DM mode before).

In addition, the HT bit has to be reset during probe, since the m41t82
chip sets it when entering battery standby mode.

This patch ensures this driver works on socfpga_socrates.

Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2019-04-25 00:00:49 +02:00
Simon Goldschmidt
36821b3f55 i2c: designware: fix reset handling on socfpga gen5
Using this driver on socfpga gen5 with DM_I2C enabled leads to a data abort
as the 'i2c' reset property cannot be found (the gen5 dtsi does not provide
reset-names).

The actual bug was to check 'if (&priv->reset_ctl)', which is never false.

While at it, convert the driver to use 'reset_get_bulk' instead of looking
at a specific named reset and also make it release the reset on driver
remove before starting the OS.

Fixes: 622597dee4 ("i2c: designware: add reset ctrl to driver")
Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
2019-04-25 00:00:49 +02:00
Simon Goldschmidt
bbecfd4cf2 Revert "cmd: Kconfig: Do not include EEPROM if DM_I2C is used without DM_I2C_COMPAT"
This reverts commit 65a97e7fcf.

The 'eeprom' command has been converted to work with DM_I2C in a patch
submitted around the same time as this commit:
commit 0c07a9b407 ("eeprom: Add device model based I2C support to eeprom command")

Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heiko Schocher <hs@denx.de>
2019-04-25 00:00:49 +02:00
Simon Goldschmidt
4f25617758 eeprom: fix DM_I2C support without CONFIG_SYS_I2C_EEPROM_BUS
The current device model enabled eeprom code only works if
CONFIG_SYS_I2C_EEPROM_BUS is set.

This patch makes it work without that define so that the bus
number passed to 'eeprom_init' is used.

Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
2019-04-25 00:00:49 +02:00
Tom Rini
7d99406742 Various minor sandbox iumprovements
Fixes for tracing with sandbox
 Refactoring for boot_get_fdt()
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Merge tag 'pull-24apr19' of git://git.denx.de/u-boot-dm

Various minor sandbox iumprovements
Fixes for tracing with sandbox
Refactoring for boot_get_fdt()
2019-04-24 12:27:29 -04:00
Tom Rini
180e38ad2d Pull request for UEFI sub-system for v2019.07-rc1 (3)
This patch series reworks the implementation of the `bootefi` command to
 remove code duplication by using the LoadImage() boot service to load
 binaries.
 
 Missing short texts for UEFI protocols are added for display by the
 `efidebug dh` command.
 
 Missing parameter checks for AllocatePages() and CreateDeviceNode() are
 implemented.
 
 The constants for protocol GUIDs are changed to match the names in the UEFI
 specification.
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Merge tag 'efi-2019-07-rc1-3' of git://git.denx.de/u-boot-efi

Pull request for UEFI sub-system for v2019.07-rc1 (3)

This patch series reworks the implementation of the `bootefi` command to
remove code duplication by using the LoadImage() boot service to load
binaries.

Missing short texts for UEFI protocols are added for display by the
`efidebug dh` command.

Missing parameter checks for AllocatePages() and CreateDeviceNode() are
implemented.

The constants for protocol GUIDs are changed to match the names in the UEFI
specification.
2019-04-24 12:26:58 -04:00
Tom Rini
c2bb9c5b9e STM32 MCUs update:
_ DT rework and alignment with DT kernel v4.20
 _ mmc: arm_pl180_mmci: Synchronize compatible with kernel v4.20
 _ mmc: stm32_sdmmc2: Synchronize properties with kernel v4.20
 _ configs: update for F746/769 boards
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Merge tag 'u-boot-stm32-mcu-20190423' of https://github.com/pchotard/u-boot

STM32 MCUs update:
- DT rework and alignment with DT kernel v4.20
- mmc: arm_pl180_mmci: Synchronize compatible with kernel v4.20
- mmc: stm32_sdmmc2: Synchronize properties with kernel v4.20
- configs: update for F746/769 boards
2019-04-24 12:26:39 -04:00
Tom Rini
ceb6ddbc73 - Add support for Amlogic p200 & p201 Reference Designs
- Add Amlogic SoC information display
 - Add support for the Libretech-AC AML-S805X-AC board
 - Add Amlogic AXG reset compatible
 - Add I2C support for Amlogic AXG
 - Fix AXG PIN and BANK pinctrl definitions
 - Fix regmap_read_poll_timeout warning about sandbox_timer_add_offset
 - Add initial support for Amlogic G12A SoC and U200 board
 - Enable PHY_REALTEK for selected boards
 - Fix Khadas VIM2 README
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Merge tag 'u-boot-amlogic-20190423' of git://git.denx.de/u-boot-amlogic

- Add support for Amlogic p200 & p201 Reference Designs
- Add Amlogic SoC information display
- Add support for the Libretech-AC AML-S805X-AC board
- Add Amlogic AXG reset compatible
- Add I2C support for Amlogic AXG
- Fix AXG PIN and BANK pinctrl definitions
- Fix regmap_read_poll_timeout warning about sandbox_timer_add_offset
- Add initial support for Amlogic G12A SoC and U200 board
- Enable PHY_REALTEK for selected boards
- Fix Khadas VIM2 README
2019-04-24 12:26:25 -04:00
Simon Goldschmidt
a339f5249d socfpga: add Simon Goldschmidt as co-custodian
This updates MAINTAINERS and git-mailrc to add me as a
co-custodian for socfpga.

Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Acked-by: Stefan Roese <sr@denx.de>
Acked-by: Marek Vasut <marex@denx.de>
2019-04-24 17:01:38 +02:00
Tom Rini
3fbd2dce35 Merge branch '2019-04-22-master-imports'
- Add and enable brcmnand driver on a number of relevant platforms.
  Also add and enable LED drivers on more bcm platforms.
- Various ARMv8 fixes/improvements, including extending PSCI
  functionality.
- fs_loader improvments
- Various FIT/SPL improvements
- PCI bugfixes
- Poplar platform ethernet support
- MediaTek MMC improvements
- Android boot improvements
2019-04-24 09:04:23 -04:00
Eugeniu Rosca
74a7e0018a image: android: fix 'iminfo' typo
Fix below CP warning triggered by the 'iminfo' output in another patch:
WARNING: 'addrress' may be misspelled - perhaps 'address'?

Fixes: 4f1318b29c ("common: image: minimal android image iminfo support")
Signed-off-by: Eugeniu Rosca <erosca@de.adit-jv.com>
Acked-by: Marek Vasut <marek.vasut@gmail.com>
2019-04-24 07:27:32 -04:00
Eugeniu Rosca
829ceb2821 image: android: allow booting lz4-compressed kernels
According to Android image format [1], kernel image resides at 1 page
offset from the boot image address. Grab the magic number from there
and allow U-Boot to handle LZ4-compressed KNL binaries instead of
hardcoding compression type to IH_COMP_NONE. Other compression types,
if needed, can be added later.

Tested on H3ULCB-KF using the image detailed in [2].

[1] Excerpt from include/android_image.h
    +-----------------+
    | boot header     | 1 page
    +-----------------+
    | kernel          | n pages
    +-----------------+
    | ramdisk         | m pages
    +-----------------+
    | second stage    | o pages
    +-----------------+

[2] => iminfo 4c000000
    ## Checking Image at 4c000000 ...
    Android image found
    kernel size:      85b9d1
    kernel address:   48080000
    ramdisk size:     54ddbc
    ramdisk addrress: 4a180000
    second size:      0
    second address:   48000800
    tags address:     48000100
    page size:        800
    os_version:       1200012a (ver: 0.9.0, level: 2018.10)
    name:
    cmdline:          buildvariant=userdebug

Signed-off-by: Eugeniu Rosca <erosca@de.adit-jv.com>
2019-04-24 07:27:32 -04:00
Heinrich Schuchardt
0efe2b8f9e test: env: Enable env unit tests by default
If CONFIG_UNIT_TEST is enabled we should enable the individual tests by
default to ensure good test coverage.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2019-04-24 07:27:28 -04:00
Ramon Fried
8781d04f42 pci: pci.h: add missing maskbit
PCI_MSI_FLAGS_MASKBIT was missing from include file,
add it.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2019-04-23 20:26:43 -06:00
Thierry Reding
d81d96901e fdtdec: Use fdt_setprop_u32() for fdtdec_set_phandle()
The fdt_setprop_u32() function does everything that we need, so we
really only use the function as a convenience wrapper, in which case it
can simply be a static inline function.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-04-23 20:26:43 -06:00
Stefan Roese
f2100f6f77 dm: core: Change platform specific translation-offset handling
Testing has shown that the current DM implementation of a platform /
board specific translation offset, as its needed for the SPL on MVEBU
platforms is buggy. The translation offset is confingured too late,
after the driver bind functions are run. This may result in incorrect
address translations. With the current implementation its not possible
to configure the offset earlier, as the DM code has not run at all.

This patch now removed the set_/get_translation_offset() calls and
moves the translation offset into the GD variable translation_offset.
This variable will get used when CONFIG_TRANSLATION_OFFSET is enabled.
This option is enabled only for MVEBU on ARM32 platforms, where its
currenty needed and configured in the SPL.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Pierre Bourdon <delroth@gmail.com>
Cc: Baruch Siach <baruch@tkos.co.il>
Cc: Simon Glass <sjg@chromium.org>
Cc: Heiko Schocher <hs@denx.de>
Cc: Tom Rini <trini@konsulko.com>
Tested-by: Pierre Bourdon <delroth@gmail.com>
Tested-by: Baruch Siach <baruch@tkos.co.il>
2019-04-23 20:26:43 -06:00
Lukas Auer
3a7c45f6a7 simple-bus: add DM_FLAG_PRE_RELOC flag to simple-bus driver
Boards such as qemu-riscv, which receive their device tree at runtime,
for example from QEMU or firmware, are unable to add the appropriate
device tree properties to make devices available pre relocation.
Instead, they must rely on the DM_FLAG_PRE_RELOC flag to be set for the
required drivers.

Add the DM_FLAG_PRE_RELOC flag to the simple-bus driver to make devices
under it with drivers that have set the flag as well available pre
relocation for these boards.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
2019-04-23 20:26:43 -06:00
Simon Glass
569cec5e84 sandbox: Enable the 'trace' command when tracing is used
Enable this by default so that tracing can be inspected if enabled. This
cannot rely on the 'imply' in lib/Kconfig since this method of enabling
tracing relates on an environment variable (FTRACE) and does not use
Kconfig.

Signed-off-by: Simon Glass <sjg@chromium.org>
2019-04-23 20:26:43 -06:00
Simon Glass
1c6eb075a3 Convert CONFIG_TRACE_BUFFER_SIZE et al to Kconfig
This converts the following to Kconfig:
   CONFIG_TRACE_BUFFER_SIZE
   CONFIG_TRACE_EARLY_SIZE
   CONFIG_TRACE_EARLY
   CONFIG_TRACE_EARLY_ADDR

Signed-off-by: Simon Glass <sjg@chromium.org>
2019-04-23 20:26:43 -06:00
Simon Glass
a24a78d7e3 Convert CONFIG_TRACE to Kconfig
This converts the following to Kconfig:
   CONFIG_TRACE

Signed-off-by: Simon Glass <sjg@chromium.org>
2019-04-23 20:26:43 -06:00
Simon Glass
f564d09608 trace: Tidy up error returns
At present many functions in this file return -1. Update them to return a
valid error code. Also tidy up the 'return' statements at the same time,
since these should have a blank line before them.

Signed-off-by: Simon Glass <sjg@chromium.org>
2019-04-23 20:26:43 -06:00
Simon Glass
f611a46ef1 div64: Don't instrument the division function
This function may be called from tracing code, since that code needs to
read the timer and this often requires calling do_div(), which calls
__div64_32(). If this function is instrumented it causes an infinite loop,
since emitting a trace record requests the time, which in turn emits a
trace record, etc.

Update the prototype to prevent instrumentation code being added.

Signed-off-by: Simon Glass <sjg@chromium.org>
2019-04-23 20:26:43 -06:00
Simon Glass
ca49b2c6e2 div64: Use kernel types
These functions still use uint32_t and uint64_t but checkpatch now
requests that the kernel types be used instead. Update them as well as a
few resulting checkpatch errors.

Signed-off-by: Simon Glass <sjg@chromium.org>
2019-04-23 20:26:43 -06:00
Simon Glass
315f60d741 initcall: Drop use of header files
This file should not include header files. They have already been included
by the time initcall.h is included. Also, document how to enable debugging
in this file.

Signed-off-by: Simon Glass <sjg@chromium.org>
2019-04-23 20:26:43 -06:00
Simon Glass
b82de17eb2 sandbox: Increase the early-trace-buffer size
This buffer is too small now that sandbox has grown in size. Increase it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2019-04-23 20:26:43 -06:00
Simon Glass
173577252f bootstage: Allow calling bootstage_mark() before bootstage_init()
It is possible for this to happen if something goes wrong very early in
the init sequence. Add a check for this.

Signed-off-by: Simon Glass <sjg@chromium.org>
2019-04-23 20:26:43 -06:00
Simon Glass
a1396cdc4b sandbox: Move pre-console buffer out of the way of tracing
These two buffers currently conflict if tracing is enabled. Move the
pre-console buffer and update the documentation.

Signed-off-by: Simon Glass <sjg@chromium.org>
2019-04-23 20:26:43 -06:00
Simon Glass
5dbe794dc0 sandbox: Drop the printf() in setup_ram_buf()
This was really intended for debugging. Drop it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2019-04-23 20:26:43 -06:00
Simon Glass
4a6409b74c sandbox: Correct maths in allocation routines
Allocation routines were adjusted to ensure that the returned addresses
are a multiple of the page size, but the header code was not updated to
take account of this. These routines assume that the header size is the
same as the page size which is unlikely.

At present os_realloc() does not work correctly due to this bug. The only
user is the hostfs 'ls' command, and only if the directory contains a
unusually long filename, which likely explains why this bug was not
caught earlier.

Fix this by doing the calculations using the obtained page size.

Signed-off-by: Simon Glass <sjg@chromium.org>
2019-04-23 20:26:43 -06:00
Simon Glass
001d1885f0 sandbox: Improve debugging in initcall_run_list()
At present if one of the initcalls fails on sandbox the address printing
is not help, e.g.:

  initcall sequence 0000557678967c80 failed at call 00005576709dfe1f (err=-96)

This is because U-Boot gets relocated high into memory and the relocation
offset (gd->reloc_off) does not work correctly for sandbox.

Add support for finding the base address of the text region (at least on
Linux) and use that to set the relocation offset. This makes the output
better:

  initcall sequence 0000560775957c80 failed at call 0000000000048134 (err=-96)

Then you use can use grep to see which init call failed, e.g.:

   $ grep 0000000000048134 u-boot.map
   stdio_add_devices

Of course another option is to run it with a debugger such as gdb:

   $ gdb u-boot
   ...
   (gdb) br initcall.h:41
   Breakpoint 1 at 0x4db9d: initcall.h:41. (2 locations)

Note that two locations are reported, since this function is used in both
board_init_f() and board_init_r().

   (gdb) r
   Starting program: /tmp/b/sandbox/u-boot
   [Thread debugging using libthread_db enabled]
   Using host libthread_db library "/lib/x86_64-linux-gnu/libthread_db.so.1".

   U-Boot 2018.09-00264-ge0c2ba9814-dirty (Sep 22 2018 - 12:21:46 -0600)

   DRAM:  128 MiB
   MMC:

Breakpoint 1, initcall_run_list (init_sequence=0x5555559619e0 <init_sequence_f>)
    at /scratch/sglass/cosarm/src/third_party/u-boot/files/include/initcall.h:41
41				printf("initcall sequence %p failed at call %p (err=%d)\n",
   (gdb) print *init_fnc_ptr
   $1 = (const init_fnc_t) 0x55555559c114 <stdio_add_devices>
   (gdb)

Signed-off-by: Simon Glass <sjg@chromium.org>
2019-04-23 20:26:43 -06:00
Christoph Muellner
7ae31fccec common: command: Add command execution tracer.
When using boot scripts it can become quite hard to understand
which commands are actually executed during bootup (e.g. where
is a kernel image loaded from or which DTB is in use).

Shell scripts suffer from a similar problem and many shells address
this problem with a command execution tracer (e.g. BASH has xtrace,
which can be enabled by "set -x").

This patch introduces a command tracer for U-Boot, which prints
every command with its arguments before it is executed.

Signed-off-by: Christoph Muellner <christoph.muellner@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-04-23 20:26:43 -06:00
Eugeniu Rosca
62392675cd fdt: boot_get_fdt: android: use ENV 'fdtaddr' as fallback
Our platform doesn't store the DTB into the Android image second area,
but rather copies the DTB to RAM from a dedicated dtb.img partition [0],
prior to booting the Android image by calling bootm.

Similar to [1], we find it useful to just call 'bootm' and have the
right DTB being passed to OS (assuming its address has been previously
stored in 'fdtaddr' by calling `fdt addr <dtb-addr>`).

Booting Android with DTB from 'fdtaddr' will only occur if:
 - No DTB is embedded in the second area of Android image
 - 'fdtaddr' points to a valid DTB in RAM

[0] https://source.android.com/devices/architecture/dto/partitions
[1] https://patchwork.ozlabs.org/patch/1046652/
    ("Support boot Android image without address on bootm command")

Signed-off-by: Eugeniu Rosca <erosca@de.adit-jv.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2019-04-23 20:26:43 -06:00
Eugeniu Rosca
18b8f2c49e fdt: boot_get_fdt: android: compress handling (non-functional)
Prepare for booting Android images which lack any DTB in the second
area by using 'fdtaddr' environment variable as source/address of FDT.
No functional/behavioral change expected in this patch.

Signed-off-by: Eugeniu Rosca <erosca@de.adit-jv.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2019-04-23 20:26:43 -06:00
Eugeniu Rosca
80281829a6 fdt: boot_get_fdt: simplify no_fdt handling (non-functional)
Increase the readability of boot_get_fdt().
No change in behavior is expected.

Signed-off-by: Eugeniu Rosca <erosca@de.adit-jv.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2019-04-23 20:26:43 -06:00
Eugeniu Rosca
9ee9cf31ae fdt: boot_get_fdt: really boot w/o FDT when "goto no_fdt"
The 'no_fdt' goto label was introduced by v2015.01 commit [0] and it
had two review stages [1-2]. The *documented* purpose behind commit [0]
is (excerpt from commit description):

> allows both FDT and non-FDT kernels to boot by making the
> third parameter to the bootm/bootz optional

While [1] and [2] share the same goal, they have very different
implementations:
 - [1] was based on a very simple 'argc' check at function error out
   with returning success to the caller if the third parameter was NOT
   passed to bootm/bootz command. This approach had the downside of
   returning success to the caller even in case of legitimate internal
   errors, which should halt booting.
 - [2] added the "no_fdt" label and several "goto no_fdt" statements.
   This allowed to report the legitimate internal errors to the caller.

IOW the major difference between [1] and [2] is:
 - [1] boot w/o FDT if FDT address is not passed to boot{m,z,*}
 - [2] give *freedom* to the developer to boot w/o FDT from any
   (more or less) arbitrary point in the function flow (and here
   comes the peculiar aspect, which looks to be a leftover from [1])
   with the precondition that the 3rd argument (FDT address) is NOT
   provided to boot{m,z,*}. In practice, this means that only a subset
   of "goto no_fdt" end up booting w/o FDT while the other subset is
   returning an error to the caller.

This patch removes the peculiar behavior described above, such that
"goto no_fdt" performs really what it tells to the developer.

The motivation of this patch is to decrease the unneeded complexity
and increase the readability of boot_get_fdt().

[0] 48aead71c1 ("fdt: Allow non-FDT kernels to boot when CONFIG_OF_LIBFDT is defined")
[1] https://patchwork.ozlabs.org/patch/412923/
    ("[U-Boot,v1] fdt: Allow non-FDT kernels to boot when CONFIG_OF_LIBFDT is defined")
[2] https://patchwork.ozlabs.org/patch/415635/
    ("[U-Boot,v2] fdt: Allow non-FDT kernels to boot when CONFIG_OF_LIBFDT is defined")

Signed-off-by: Eugeniu Rosca <erosca@de.adit-jv.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2019-04-23 20:26:43 -06:00
Eugeniu Rosca
d9313efc2e fdt: boot_get_fdt: remove redundant zeroing out
Paranoid programming [1] lies at the foundation of proper software
development, but the repetitive zeroing-out of output arguments in the
context of the same function rather clutters the code and inhibits
further refactoring/optimization than is doing any good.

In boot_get_fdt(), we already perform zero/NULL-initialization of
*of_flat_tree and *of_size at the beginning of the function, so doing
the same at function error-out is redundant/superfluous.

Moreover, keeping the code unchanged might encourage the developers to
update *of_flat_tree and *of_size during some interim computations,
which is against the current design of boot_get_fdt(). Currently,
writing useful data into these arguments happens just before
successfully returning from boot_get_fdt() and it should better stay so.

[1] https://blog.regehr.org/archives/1106

Signed-off-by: Eugeniu Rosca <erosca@de.adit-jv.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2019-04-23 20:26:43 -06:00
Lars Povlsen
25c07c72fd ARMv8: PSCI: Fix PSCI_TABLE relocation issue
This fixes relaction isses with the PSCI_TABLE entries in
the psci_32_table and psci_64_table.

When using 32-bit adress pointers relocation was not being applied to
the tables, causing PSCI handlers to point to the un-relocated code
area. By using 64-bit data relocation is properly applied. The
handlers are thus in the "secure data" area, which is protected by
/memreserve/ in the FDT.

Signed-off-by: Lars Povlsen <lars.povlsen@microchip.com>
2019-04-23 17:57:28 -04:00
Trent Piepho
b4353b3713 bootm: Simplying cache flush code
The cache flush of the kernel load area needs to be aligned outward to
the DMA cache alignment.  The operations are simpler if we think of this
as aligning the start down, ALIGN_DOWN(load, ARCH_DMA_MINALIGN), and
aligning the end up, ALIGN(load_end, ARCH_DMA_MINALIGN), and then find
the length of the flushed region by subtracting the former from the
latter.

Cc: Tom Rini <trini@konsulko.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Signed-off-by: Trent Piepho <tpiepho@impinj.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2019-04-23 17:57:27 -04:00